From d81213c4a58b29f1ae7ee1b73f9fb207cb762a38 Mon Sep 17 00:00:00 2001 From: Sintendo <3380580+Sintendo@users.noreply.github.com> Date: Sun, 15 Dec 2024 02:16:01 +0100 Subject: [PATCH] JitArm64_Integer: Optimize subfic for -1 Another one backported from x86. Not sure why I didn't do this in #12891 already. - Without carry Before: 0x2a3a03fb mvn w27, w26 0x6b1a037b subs w27, w27, w26 After: 0x1280001b mov w27, #-0x1 ; =-1 - With carry Before: 0x2a3b03f7 mvn w23, w27 0x6b1b02f7 subs w23, w23, w27 0x1a9f37f6 cset w22, hs 0x390bd3b6 strb w22, [x29, #0x2f4] After: 0x12800017 mov w23, #-0x1 ; =-1 --- .../PowerPC/JitArm64/JitArm64_Integer.cpp | 31 +++++++++++++------ 1 file changed, 21 insertions(+), 10 deletions(-) diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp index 8b00447ffd..76f771abe5 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp @@ -1394,23 +1394,34 @@ void JitArm64::subfic(UGeckoInstruction inst) else { const bool will_read = d == a; - const bool is_zero = imm == 0; gpr.BindToRegister(d, will_read); - - // d = imm - a ARM64Reg RD = gpr.R(d); + + if (imm == -1) { - Arm64GPRCache::ScopedARM64Reg WA(ARM64Reg::WZR); - if (!is_zero) + // d = -1 - a = ~a + MVN(RD, gpr.R(a)); + // CA is always set in this case + ComputeCarry(true); + } + else + { + const bool is_zero = imm == 0; + + // d = imm - a { - WA = will_read ? gpr.GetScopedReg() : Arm64GPRCache::ScopedARM64Reg(RD); - MOVI2R(WA, imm); + Arm64GPRCache::ScopedARM64Reg WA(ARM64Reg::WZR); + if (!is_zero) + { + WA = will_read ? gpr.GetScopedReg() : Arm64GPRCache::ScopedARM64Reg(RD); + MOVI2R(WA, imm); + } + + CARRY_IF_NEEDED(SUB, SUBS, RD, WA, gpr.R(a)); } - CARRY_IF_NEEDED(SUB, SUBS, RD, WA, gpr.R(a)); + ComputeCarry(); } - - ComputeCarry(); } }