Jit64: Disable the fast address check if fastmem is disabled.

This was a huge speedup with disabled fastmem, but it still requires the fastmem arena.
So let's disable it for now, even if this commit has a huge performance hit with disabled fastmem.
This commit is contained in:
degasus 2019-12-06 10:36:48 +01:00
parent d735943aa2
commit aad8aab698
1 changed files with 4 additions and 4 deletions

View File

@ -371,7 +371,7 @@ void EmuCodeBlock::SafeLoadToReg(X64Reg reg_value, const Gen::OpArg& opAddress,
FixupBranch exit; FixupBranch exit;
const bool dr_set = (flags & SAFE_LOADSTORE_DR_ON) || MSR.DR; const bool dr_set = (flags & SAFE_LOADSTORE_DR_ON) || MSR.DR;
const bool fast_check_address = !slowmem && dr_set; const bool fast_check_address = !slowmem && dr_set && m_jit.jo.fastmem_arena;
if (fast_check_address) if (fast_check_address)
{ {
FixupBranch slow = CheckIfSafeAddress(R(reg_value), reg_addr, registersInUse); FixupBranch slow = CheckIfSafeAddress(R(reg_value), reg_addr, registersInUse);
@ -435,7 +435,7 @@ void EmuCodeBlock::SafeLoadToRegImmediate(X64Reg reg_value, u32 address, int acc
BitSet32 registersInUse, bool signExtend) BitSet32 registersInUse, bool signExtend)
{ {
// If the address is known to be RAM, just load it directly. // If the address is known to be RAM, just load it directly.
if (PowerPC::IsOptimizableRAMAddress(address)) if (m_jit.jo.fastmem_arena && PowerPC::IsOptimizableRAMAddress(address))
{ {
UnsafeLoadToReg(reg_value, Imm32(address), accessSize, 0, signExtend); UnsafeLoadToReg(reg_value, Imm32(address), accessSize, 0, signExtend);
return; return;
@ -539,7 +539,7 @@ void EmuCodeBlock::SafeWriteRegToReg(OpArg reg_value, X64Reg reg_addr, int acces
FixupBranch exit; FixupBranch exit;
const bool dr_set = (flags & SAFE_LOADSTORE_DR_ON) || MSR.DR; const bool dr_set = (flags & SAFE_LOADSTORE_DR_ON) || MSR.DR;
const bool fast_check_address = !slowmem && dr_set; const bool fast_check_address = !slowmem && dr_set && m_jit.jo.fastmem_arena;
if (fast_check_address) if (fast_check_address)
{ {
FixupBranch slow = CheckIfSafeAddress(reg_value, reg_addr, registersInUse); FixupBranch slow = CheckIfSafeAddress(reg_value, reg_addr, registersInUse);
@ -641,7 +641,7 @@ bool EmuCodeBlock::WriteToConstAddress(int accessSize, OpArg arg, u32 address,
m_jit.js.fifoBytesSinceCheck += accessSize >> 3; m_jit.js.fifoBytesSinceCheck += accessSize >> 3;
return false; return false;
} }
else if (PowerPC::IsOptimizableRAMAddress(address)) else if (m_jit.jo.fastmem_arena && PowerPC::IsOptimizableRAMAddress(address))
{ {
WriteToConstRamAddress(accessSize, arg, address); WriteToConstRamAddress(accessSize, arg, address);
return false; return false;