Merge pull request #947 from FioraAeterna/rsqrte

JIT: implement frsqte
This commit is contained in:
comex 2014-09-05 11:48:00 -04:00
commit aa1df21bb6
10 changed files with 357 additions and 165 deletions

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@ -90,6 +90,149 @@ u32 ClassifyFloat(float fvalue)
}
}
const int frsqrte_expected_base[] =
{
0x3ffa000, 0x3c29000, 0x38aa000, 0x3572000,
0x3279000, 0x2fb7000, 0x2d26000, 0x2ac0000,
0x2881000, 0x2665000, 0x2468000, 0x2287000,
0x20c1000, 0x1f12000, 0x1d79000, 0x1bf4000,
0x1a7e800, 0x17cb800, 0x1552800, 0x130c000,
0x10f2000, 0x0eff000, 0x0d2e000, 0x0b7c000,
0x09e5000, 0x0867000, 0x06ff000, 0x05ab800,
0x046a000, 0x0339800, 0x0218800, 0x0105800,
};
const int frsqrte_expected_dec[] =
{
0x7a4, 0x700, 0x670, 0x5f2,
0x584, 0x524, 0x4cc, 0x47e,
0x43a, 0x3fa, 0x3c2, 0x38e,
0x35e, 0x332, 0x30a, 0x2e6,
0x568, 0x4f3, 0x48d, 0x435,
0x3e7, 0x3a2, 0x365, 0x32e,
0x2fc, 0x2d0, 0x2a8, 0x283,
0x261, 0x243, 0x226, 0x20b,
};
double ApproximateReciprocalSquareRoot(double val)
{
union
{
double valf;
s64 vali;
};
valf = val;
s64 mantissa = vali & ((1LL << 52) - 1);
s64 sign = vali & (1ULL << 63);
s64 exponent = vali & (0x7FFLL << 52);
// Special case 0
if (mantissa == 0 && exponent == 0)
return sign ? -std::numeric_limits<double>::infinity() :
std::numeric_limits<double>::infinity();
// Special case NaN-ish numbers
if (exponent == (0x7FFLL << 52))
{
if (mantissa == 0)
{
if (sign)
return std::numeric_limits<double>::quiet_NaN();
return 0.0;
}
return 0.0 + valf;
}
// Negative numbers return NaN
if (sign)
return std::numeric_limits<double>::quiet_NaN();
if (!exponent)
{
// "Normalize" denormal values
do
{
exponent -= 1LL << 52;
mantissa <<= 1;
} while (!(mantissa & (1LL << 52)));
mantissa &= (1LL << 52) - 1;
exponent += 1LL << 52;
}
bool odd_exponent = !(exponent & (1LL << 52));
exponent = ((0x3FFLL << 52) - ((exponent - (0x3FELL << 52)) / 2)) & (0x7FFLL << 52);
int i = (int)(mantissa >> 37);
vali = sign | exponent;
int index = i / 2048 + (odd_exponent ? 16 : 0);
vali |= (s64)(frsqrte_expected_base[index] - frsqrte_expected_dec[index] * (i % 2048)) << 26;
return valf;
}
const int fres_expected_base[] =
{
0x7ff800, 0x783800, 0x70ea00, 0x6a0800,
0x638800, 0x5d6200, 0x579000, 0x520800,
0x4cc800, 0x47ca00, 0x430800, 0x3e8000,
0x3a2c00, 0x360800, 0x321400, 0x2e4a00,
0x2aa800, 0x272c00, 0x23d600, 0x209e00,
0x1d8800, 0x1a9000, 0x17ae00, 0x14f800,
0x124400, 0x0fbe00, 0x0d3800, 0x0ade00,
0x088400, 0x065000, 0x041c00, 0x020c00,
};
const int fres_expected_dec[] =
{
0x3e1, 0x3a7, 0x371, 0x340,
0x313, 0x2ea, 0x2c4, 0x2a0,
0x27f, 0x261, 0x245, 0x22a,
0x212, 0x1fb, 0x1e5, 0x1d1,
0x1be, 0x1ac, 0x19b, 0x18b,
0x17c, 0x16e, 0x15b, 0x15b,
0x143, 0x143, 0x12d, 0x12d,
0x11a, 0x11a, 0x108, 0x106,
};
// Used by fres and ps_res.
double ApproximateReciprocal(double val)
{
union
{
double valf;
s64 vali;
};
valf = val;
s64 mantissa = vali & ((1LL << 52) - 1);
s64 sign = vali & (1ULL << 63);
s64 exponent = vali & (0x7FFLL << 52);
// Special case 0
if (mantissa == 0 && exponent == 0)
return sign ? -std::numeric_limits<double>::infinity() : std::numeric_limits<double>::infinity();
// Special case NaN-ish numbers
if (exponent == (0x7FFLL << 52))
{
if (mantissa == 0)
return sign ? -0.0 : 0.0;
return 0.0 + valf;
}
// Special case small inputs
if (exponent < (895LL << 52))
return sign ? -std::numeric_limits<float>::max() : std::numeric_limits<float>::max();
// Special case large inputs
if (exponent >= (1149LL << 52))
return sign ? -0.0f : 0.0f;
exponent = (0x7FDLL << 52) - exponent;
int i = (int)(mantissa >> 37);
vali = sign | exponent;
vali |= (s64)(fres_expected_base[i / 1024] - (fres_expected_dec[i / 1024] * (i % 1024) + 1) / 2) << 29;
return valf;
}
} // namespace

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@ -123,6 +123,15 @@ u32 ClassifyDouble(double dvalue);
// More efficient float version.
u32 ClassifyFloat(float fvalue);
extern const int frsqrte_expected_base[];
extern const int frsqrte_expected_dec[];
extern const int fres_expected_base[];
extern const int fres_expected_dec[];
// PowerPC approximation algorithms
double ApproximateReciprocalSquareRoot(double val);
double ApproximateReciprocal(double val);
template<class T>
struct Rectangle
{

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@ -386,6 +386,29 @@ union UReg_MSR
#define FPRF_SHIFT 12
#define FPRF_MASK (0x1F << FPRF_SHIFT)
// FPSCR exception flags
const u32 FPSCR_FX = 1U << (31 - 0);
const u32 FPSCR_FEX = 1U << (31 - 1);
const u32 FPSCR_VX = 1U << (31 - 2);
const u32 FPSCR_OX = 1U << (31 - 3);
const u32 FPSCR_UX = 1U << (31 - 4);
const u32 FPSCR_ZX = 1U << (31 - 5);
const u32 FPSCR_XX = 1U << (31 - 6);
const u32 FPSCR_VXSNAN = 1U << (31 - 7);
const u32 FPSCR_VXISI = 1U << (31 - 8);
const u32 FPSCR_VXIDI = 1U << (31 - 9);
const u32 FPSCR_VXZDZ = 1U << (31 - 10);
const u32 FPSCR_VXIMZ = 1U << (31 - 11);
const u32 FPSCR_VXVC = 1U << (31 - 12);
const u32 FPSCR_VXSOFT = 1U << (31 - 21);
const u32 FPSCR_VXSQRT = 1U << (31 - 22);
const u32 FPSCR_VXCVI = 1U << (31 - 23);
const u32 FPSCR_VX_ANY = FPSCR_VXSNAN | FPSCR_VXISI | FPSCR_VXIDI | FPSCR_VXZDZ | FPSCR_VXIMZ |
FPSCR_VXVC | FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI;
const u32 FPSCR_ANY_X = FPSCR_OX | FPSCR_UX | FPSCR_ZX | FPSCR_XX | FPSCR_VX_ANY;
// Floating Point Status and Control Register
union UReg_FPSCR
{

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@ -16,27 +16,6 @@
#define MIN_SINGLE 0xc7efffffe0000000ull
#define MAX_SINGLE 0x47efffffe0000000ull
// FPSCR exception flags
const u32 FPSCR_OX = (u32)1 << (31 - 3);
const u32 FPSCR_UX = (u32)1 << (31 - 4);
const u32 FPSCR_ZX = (u32)1 << (31 - 5);
// ! XX shouldn't be accessed directly to set 1. Use SetFI() instead !
const u32 FPSCR_XX = (u32)1 << (31 - 6);
const u32 FPSCR_VXSNAN = (u32)1 << (31 - 7);
const u32 FPSCR_VXISI = (u32)1 << (31 - 8);
const u32 FPSCR_VXIDI = (u32)1 << (31 - 9);
const u32 FPSCR_VXZDZ = (u32)1 << (31 - 10);
const u32 FPSCR_VXIMZ = (u32)1 << (31 - 11);
const u32 FPSCR_VXVC = (u32)1 << (31 - 12);
const u32 FPSCR_VXSOFT = (u32)1 << (31 - 21);
const u32 FPSCR_VXSQRT = (u32)1 << (31 - 22);
const u32 FPSCR_VXCVI = (u32)1 << (31 - 23);
const u32 FPSCR_VX_ANY = FPSCR_VXSNAN | FPSCR_VXISI | FPSCR_VXIDI | FPSCR_VXZDZ |
FPSCR_VXIMZ | FPSCR_VXVC | FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI;
const u32 FPSCR_ANY_X = FPSCR_OX | FPSCR_UX | FPSCR_ZX | FPSCR_XX | FPSCR_VX_ANY;
const u64 PPC_NAN_U64 = 0x7ff8000000000000ull;
const double PPC_NAN = *(double* const)&PPC_NAN_U64;
@ -281,144 +260,3 @@ inline u64 ConvertToDouble(u32 _x)
}
}
// Used by fres and ps_res.
inline double ApproximateReciprocal(double val)
{
static const int expected_base[] = {
0x7ff800, 0x783800, 0x70ea00, 0x6a0800,
0x638800, 0x5d6200, 0x579000, 0x520800,
0x4cc800, 0x47ca00, 0x430800, 0x3e8000,
0x3a2c00, 0x360800, 0x321400, 0x2e4a00,
0x2aa800, 0x272c00, 0x23d600, 0x209e00,
0x1d8800, 0x1a9000, 0x17ae00, 0x14f800,
0x124400, 0x0fbe00, 0x0d3800, 0x0ade00,
0x088400, 0x065000, 0x041c00, 0x020c00,
};
static const int expected_dec[] = {
0x3e1, 0x3a7, 0x371, 0x340,
0x313, 0x2ea, 0x2c4, 0x2a0,
0x27f, 0x261, 0x245, 0x22a,
0x212, 0x1fb, 0x1e5, 0x1d1,
0x1be, 0x1ac, 0x19b, 0x18b,
0x17c, 0x16e, 0x15b, 0x15b,
0x143, 0x143, 0x12d, 0x12d,
0x11a, 0x11a, 0x108, 0x106,
};
union
{
double valf;
s64 vali;
};
valf = val;
s64 mantissa = vali & ((1LL << 52) - 1);
s64 sign = vali & (1ULL << 63);
s64 exponent = vali & (0x7FFLL << 52);
// Special case 0
if (mantissa == 0 && exponent == 0)
return sign ? -std::numeric_limits<double>::infinity() :
std::numeric_limits<double>::infinity();
// Special case NaN-ish numbers
if (exponent == (0x7FFLL << 52))
{
if (mantissa == 0)
return sign ? -0.0 : 0.0;
return 0.0 + valf;
}
// Special case small inputs
if (exponent < (895LL << 52))
return sign ? -std::numeric_limits<float>::max() :
std::numeric_limits<float>::max();
// Special case large inputs
if (exponent >= (1149LL << 52))
return sign ? -0.0f : 0.0f;
exponent = (0x7FDLL << 52) - exponent;
int i = (int)(mantissa >> 37);
vali = sign | exponent;
vali |= (s64)(expected_base[i / 1024] - (expected_dec[i / 1024] * (i % 1024) + 1) / 2) << 29;
return valf;
}
inline double ApproximateReciprocalSquareRoot(double val)
{
static const int expected_base[] = {
0x3ffa000, 0x3c29000, 0x38aa000, 0x3572000,
0x3279000, 0x2fb7000, 0x2d26000, 0x2ac0000,
0x2881000, 0x2665000, 0x2468000, 0x2287000,
0x20c1000, 0x1f12000, 0x1d79000, 0x1bf4000,
0x1a7e800, 0x17cb800, 0x1552800, 0x130c000,
0x10f2000, 0x0eff000, 0x0d2e000, 0x0b7c000,
0x09e5000, 0x0867000, 0x06ff000, 0x05ab800,
0x046a000, 0x0339800, 0x0218800, 0x0105800,
};
static const int expected_dec[] = {
0x7a4, 0x700, 0x670, 0x5f2,
0x584, 0x524, 0x4cc, 0x47e,
0x43a, 0x3fa, 0x3c2, 0x38e,
0x35e, 0x332, 0x30a, 0x2e6,
0x568, 0x4f3, 0x48d, 0x435,
0x3e7, 0x3a2, 0x365, 0x32e,
0x2fc, 0x2d0, 0x2a8, 0x283,
0x261, 0x243, 0x226, 0x20b,
};
union
{
double valf;
s64 vali;
};
valf = val;
s64 mantissa = vali & ((1LL << 52) - 1);
s64 sign = vali & (1ULL << 63);
s64 exponent = vali & (0x7FFLL << 52);
// Special case 0
if (mantissa == 0 && exponent == 0)
return sign ? -std::numeric_limits<double>::infinity() :
std::numeric_limits<double>::infinity();
// Special case NaN-ish numbers
if (exponent == (0x7FFLL << 52))
{
if (mantissa == 0)
{
if (sign)
return std::numeric_limits<double>::quiet_NaN();
return 0.0;
}
return 0.0 + valf;
}
// Negative numbers return NaN
if (sign)
return std::numeric_limits<double>::quiet_NaN();
if (!exponent)
{
// "Normalize" denormal values
do
{
exponent -= 1LL << 52;
mantissa <<= 1;
} while (!(mantissa & (1LL << 52)));
mantissa &= (1LL << 52) - 1;
exponent += 1LL << 52;
}
bool odd_exponent = !(exponent & (1LL << 52));
exponent = ((0x3FFLL << 52) - ((exponent - (0x3FELL << 52)) / 2)) & (0x7FFLL << 52);
int i = (int)(mantissa >> 37);
vali = sign | exponent;
int index = i / 2048 + (odd_exponent ? 16 : 0);
vali |= (s64)(expected_base[index] - expected_dec[index] * (i % 2048)) << 26;
return valf;
}

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@ -189,6 +189,8 @@ public:
void fctiwx(UGeckoInstruction inst);
void fmrx(UGeckoInstruction inst);
void frspx(UGeckoInstruction inst);
void frsqrtex(UGeckoInstruction inst);
void fresx(UGeckoInstruction inst);
void cmpXX(UGeckoInstruction inst);

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@ -324,7 +324,7 @@ static GekkoOPTemplate table59[] =
{20, &Jit64::fp_arith}, //"fsubsx", OPTYPE_FPU, FL_RC_BIT_F}},
{21, &Jit64::fp_arith}, //"faddsx", OPTYPE_FPU, FL_RC_BIT_F}},
// {22, &Jit64::FallBackToInterpreter}, //"fsqrtsx", OPTYPE_FPU, FL_RC_BIT_F}}, // Not implemented on gekko
{24, &Jit64::FallBackToInterpreter}, //"fresx", OPTYPE_FPU, FL_RC_BIT_F}},
{24, &Jit64::fresx}, //"fresx", OPTYPE_FPU, FL_RC_BIT_F}},
{25, &Jit64::fp_arith}, //"fmulsx", OPTYPE_FPU, FL_RC_BIT_F}},
{28, &Jit64::fmaddXX}, //"fmsubsx", OPTYPE_FPU, FL_RC_BIT_F}},
{29, &Jit64::fmaddXX}, //"fmaddsx", OPTYPE_FPU, FL_RC_BIT_F}},
@ -360,7 +360,7 @@ static GekkoOPTemplate table63_2[] =
{22, &Jit64::FallBackToInterpreter}, //"fsqrtx", OPTYPE_FPU, FL_RC_BIT_F}},
{23, &Jit64::FallBackToInterpreter}, //"fselx", OPTYPE_FPU, FL_RC_BIT_F}},
{25, &Jit64::fp_arith}, //"fmulx", OPTYPE_FPU, FL_RC_BIT_F}},
{26, &Jit64::FallBackToInterpreter}, //"frsqrtex", OPTYPE_FPU, FL_RC_BIT_F}},
{26, &Jit64::frsqrtex}, //"frsqrtex", OPTYPE_FPU, FL_RC_BIT_F}},
{28, &Jit64::fmaddXX}, //"fmsubx", OPTYPE_FPU, FL_RC_BIT_F}},
{29, &Jit64::fmaddXX}, //"fmaddx", OPTYPE_FPU, FL_RC_BIT_F}},
{30, &Jit64::fmaddXX}, //"fnmsubx", OPTYPE_FPU, FL_RC_BIT_F}},

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@ -149,6 +149,10 @@ void Jit64AsmRoutineManager::GenerateCommon()
GenFifoWrite(32);
fifoDirectWriteFloat = AlignCode4();
GenFifoFloatWrite();
frsqrte = AlignCode4();
GenFrsqrte();
fres = AlignCode4();
GenFres();
GenQuantizedLoads();
GenQuantizedStores();

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@ -366,3 +366,47 @@ void Jit64::frspx(UGeckoInstruction inst)
SetFPRFIfNeeded(inst, fpr.RX(d));
fpr.UnlockAll();
}
void Jit64::frsqrtex(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITFloatingPointOff);
FALLBACK_IF(inst.Rc);
int b = inst.FB;
int d = inst.FD;
// rsqrtex requires ECX and EDX free
gpr.FlushLockX(ECX, EDX);
fpr.Lock(b, d);
fpr.BindToRegister(d, d == b);
MOVSD(XMM0, fpr.R(b));
CALL((void *)asm_routines.frsqrte);
MOVSD(fpr.R(d), XMM0);
SetFPRFIfNeeded(inst, fpr.RX(d));
fpr.UnlockAll();
gpr.UnlockAllX();
}
void Jit64::fresx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITFloatingPointOff);
FALLBACK_IF(inst.Rc);
int b = inst.FB;
int d = inst.FD;
static double test[2];
// resx requires ECX and EDX free
gpr.FlushLockX(ECX, EDX);
fpr.Lock(b, d);
fpr.BindToRegister(d, d == b);
MOVSD(XMM0, fpr.R(b));
MOVSD(M(&test[0]), XMM0);
CALL((void *)asm_routines.fres);
MOVSD(M(&test[1]), XMM0);
MOVSD(fpr.R(d), XMM0);
SetFPRFIfNeeded(inst, fpr.RX(d));
ERROR_LOG(COMMON, "%f %f\n", test[0], test[1]);
fpr.UnlockAll();
gpr.UnlockAllX();
}

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@ -3,6 +3,7 @@
// Refer to the license.txt file included.
#include "Common/CPUDetect.h"
#include "Common/MathUtil.h"
#include "Common/MemoryUtil.h"
#include "Core/PowerPC/JitCommon/JitAsmCommon.h"
@ -51,6 +52,130 @@ void CommonAsmRoutines::GenFifoFloatWrite()
RET();
}
void CommonAsmRoutines::GenFrsqrte()
{
// Assume input in XMM0.
// This function clobbers EAX, ECX, and EDX.
MOVQ_xmm(R(RAX), XMM0);
// Negative and zero inputs set an exception and take the complex path.
TEST(64, R(RAX), R(RAX));
FixupBranch zero = J_CC(CC_Z, true);
FixupBranch negative = J_CC(CC_S, true);
MOV(64, R(RCX), R(RAX));
SHR(64, R(RCX), Imm8(52));
// Zero and max exponents (non-normal floats) take the complex path.
FixupBranch complex1 = J_CC(CC_Z, true);
CMP(32, R(ECX), Imm32(0x7FF));
FixupBranch complex2 = J_CC(CC_E, true);
SUB(32, R(ECX), Imm32(0x3FD));
SAR(32, R(ECX), Imm8(1));
MOV(32, R(EDX), Imm32(0x3FF));
SUB(32, R(EDX), R(ECX));
SHL(64, R(RDX), Imm8(52)); // exponent = ((0x3FFLL << 52) - ((exponent - (0x3FELL << 52)) / 2)) & (0x7FFLL << 52);
MOV(64, R(RCX), R(RAX));
SHR(64, R(RCX), Imm8(48));
AND(32, R(ECX), Imm8(0x1F));
XOR(32, R(ECX), Imm8(0x10)); // int index = i / 2048 + (odd_exponent ? 16 : 0);
SHR(64, R(RAX), Imm8(37));
AND(32, R(EAX), Imm32(0x7FF));
IMUL(32, EAX, MScaled(RCX, SCALE_4, (u32)(u64)MathUtil::frsqrte_expected_dec));
MOV(32, R(ECX), MScaled(RCX, SCALE_4, (u32)(u64)MathUtil::frsqrte_expected_base));
SUB(32, R(ECX), R(EAX));
SHL(64, R(RCX), Imm8(26));
OR(64, R(RDX), R(RCX)); // vali |= (s64)(frsqrte_expected_base[index] - frsqrte_expected_dec[index] * (i % 2048)) << 26;
MOVQ_xmm(XMM0, R(RDX));
RET();
// Exception flags for zero input.
SetJumpTarget(zero);
TEST(32, M(&FPSCR), Imm32(FPSCR_ZX));
FixupBranch skip_set_fx1 = J_CC(CC_NZ);
OR(32, M(&FPSCR), Imm32(FPSCR_FX));
SetJumpTarget(skip_set_fx1);
OR(32, M(&FPSCR), Imm32(FPSCR_ZX));
FixupBranch complex3 = J();
// Exception flags for negative input.
SetJumpTarget(negative);
TEST(32, M(&FPSCR), Imm32(FPSCR_VXSQRT));
FixupBranch skip_set_fx2 = J_CC(CC_NZ);
OR(32, M(&FPSCR), Imm32(FPSCR_FX));
SetJumpTarget(skip_set_fx2);
OR(32, M(&FPSCR), Imm32(FPSCR_VXSQRT));
SetJumpTarget(complex1);
SetJumpTarget(complex2);
SetJumpTarget(complex3);
ABI_PushRegistersAndAdjustStack(QUANTIZED_REGS_TO_SAVE, false);
ABI_CallFunction((void *)&MathUtil::ApproximateReciprocalSquareRoot);
ABI_PopRegistersAndAdjustStack(QUANTIZED_REGS_TO_SAVE, false);
RET();
}
void CommonAsmRoutines::GenFres()
{
// Assume input in XMM0.
// This function clobbers EAX, ECX, and EDX.
MOVQ_xmm(R(RAX), XMM0);
// Zero inputs set an exception and take the complex path.
TEST(64, R(RAX), R(RAX));
FixupBranch zero = J_CC(CC_Z);
MOV(64, R(RCX), R(RAX));
SHR(64, R(RCX), Imm8(52));
MOV(32, R(EDX), R(ECX));
AND(32, R(ECX), Imm32(0x7FF)); // exp
AND(32, R(EDX), Imm32(0x800)); // sign
CMP(32, R(ECX), Imm32(895));
// Take the complex path for very large/small exponents.
FixupBranch complex1 = J_CC(CC_L);
CMP(32, R(ECX), Imm32(1149));
FixupBranch complex2 = J_CC(CC_GE);
SUB(32, R(ECX), Imm32(0x7FD));
NEG(32, R(ECX));
OR(32, R(ECX), R(EDX));
SHL(64, R(RCX), Imm8(52)); // vali = sign | exponent
MOV(64, R(RDX), R(RAX));
SHR(64, R(RAX), Imm8(37));
SHR(64, R(RDX), Imm8(47));
AND(32, R(EAX), Imm32(0x3FF)); // i % 1024
AND(32, R(RDX), Imm8(0x1F)); // i / 1024
IMUL(32, EAX, MScaled(RDX, SCALE_4, (u32)(u64)MathUtil::fres_expected_dec));
ADD(32, R(EAX), Imm8(1));
SHR(32, R(EAX), Imm8(1));
MOV(32, R(EDX), MScaled(RDX, SCALE_4, (u32)(u64)MathUtil::fres_expected_base));
SUB(32, R(EDX), R(EAX));
SHL(64, R(RDX), Imm8(29));
OR(64, R(RDX), R(RCX)); // vali |= (s64)(fres_expected_base[i / 1024] - (fres_expected_dec[i / 1024] * (i % 1024) + 1) / 2) << 29
MOVQ_xmm(XMM0, R(RDX));
RET();
// Exception flags for zero input.
SetJumpTarget(zero);
TEST(32, M(&FPSCR), Imm32(FPSCR_ZX));
FixupBranch skip_set_fx1 = J_CC(CC_NZ);
OR(32, M(&FPSCR), Imm32(FPSCR_FX));
SetJumpTarget(skip_set_fx1);
OR(32, M(&FPSCR), Imm32(FPSCR_ZX));
SetJumpTarget(complex1);
SetJumpTarget(complex2);
ABI_PushRegistersAndAdjustStack(QUANTIZED_REGS_TO_SAVE, false);
ABI_CallFunction((void *)&MathUtil::ApproximateReciprocal);
ABI_PopRegistersAndAdjustStack(QUANTIZED_REGS_TO_SAVE, false);
RET();
}
// Safe + Fast Quantizers, originally from JITIL by magumagu
static const u8 GC_ALIGNED16(pbswapShuffle1x4[16]) = {3, 2, 1, 0, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};

View File

@ -24,6 +24,9 @@ public:
const u8 *dispatchPcInEAX;
const u8 *doTiming;
const u8 *frsqrte;
const u8 *fres;
// In: array index: GQR to use.
// In: ECX: Address to read from.
// Out: XMM0: Bottom two 32-bit slots hold the read value,
@ -56,5 +59,6 @@ public:
void GenFifoWrite(int size);
void GenFifoXmm64Write();
void GenFifoFloatWrite();
void GenFrsqrte();
void GenFres();
};