diff --git a/Source/Core/Core/PowerPC/Interpreter/Interpreter_SystemRegisters.cpp b/Source/Core/Core/PowerPC/Interpreter/Interpreter_SystemRegisters.cpp index db7ac1cdf7..455b224202 100644 --- a/Source/Core/Core/PowerPC/Interpreter/Interpreter_SystemRegisters.cpp +++ b/Source/Core/Core/PowerPC/Interpreter/Interpreter_SystemRegisters.cpp @@ -309,7 +309,7 @@ void Interpreter::mtspr(UGeckoInstruction inst) break; case SPR_TL_W: - TL = PowerPC::ppcState.gpr[inst.RD]; + TL(PowerPC::ppcState) = PowerPC::ppcState.gpr[inst.RD]; SystemTimers::TimeBaseSet(); break; diff --git a/Source/Core/Core/PowerPC/PowerPC.cpp b/Source/Core/Core/PowerPC/PowerPC.cpp index ff49eca4e6..6df289eb47 100644 --- a/Source/Core/Core/PowerPC/PowerPC.cpp +++ b/Source/Core/Core/PowerPC/PowerPC.cpp @@ -107,8 +107,8 @@ void DoState(PointerWrap& p) // conflict to mess with them here. // PowerPC::ppcState.spr[SPR_DEC] = SystemTimers::GetFakeDecrementer(); - // *((u64 *)&TL) = SystemTimers::GetFakeTimeBase(); //works since we are little endian and TL - // comes first :) + // *((u64 *)&TL(PowerPC::ppcState)) = SystemTimers::GetFakeTimeBase(); //works since we are little + // endian and TL comes first :) p.DoArray(ppcState.gpr); p.Do(ppcState.pc); @@ -206,7 +206,7 @@ static void ResetRegisters() DBATUpdated(); IBATUpdated(); - TL = 0; + TL(PowerPC::ppcState) = 0; TU = 0; SystemTimers::TimeBaseSet(); @@ -394,13 +394,13 @@ void RunLoop() u64 ReadFullTimeBaseValue() { u64 value; - std::memcpy(&value, &TL, sizeof(value)); + std::memcpy(&value, &TL(PowerPC::ppcState), sizeof(value)); return value; } void WriteFullTimeBaseValue(u64 value) { - std::memcpy(&TL, &value, sizeof(value)); + std::memcpy(&TL(PowerPC::ppcState), &value, sizeof(value)); } void UpdatePerformanceMonitor(u32 cycles, u32 num_load_stores, u32 num_fp_inst) diff --git a/Source/Core/Core/PowerPC/PowerPC.h b/Source/Core/Core/PowerPC/PowerPC.h index 9e9bb5d6f1..e751e4aef7 100644 --- a/Source/Core/Core/PowerPC/PowerPC.h +++ b/Source/Core/Core/PowerPC/PowerPC.h @@ -251,7 +251,7 @@ void UpdatePerformanceMonitor(u32 cycles, u32 num_load_stores, u32 num_fp_inst); #define SRR0(ppc_state) (ppc_state).spr[SPR_SRR0] #define SRR1(ppc_state) (ppc_state).spr[SPR_SRR1] #define GQR(ppc_state, x) (ppc_state).spr[SPR_GQR0 + (x)] -#define TL PowerPC::ppcState.spr[SPR_TL] +#define TL(ppc_state) (ppc_state).spr[SPR_TL] #define TU PowerPC::ppcState.spr[SPR_TU] inline void SetCarry(u32 ca)