From a7a744d33ce042b3ed72775de393149bee63663f Mon Sep 17 00:00:00 2001 From: Chris Burgener Date: Tue, 19 Jan 2016 19:29:19 -0500 Subject: [PATCH] Properly clear JIT cache on save states --- Source/Core/Core/HW/WiimoteEmu/EmuSubroutines.cpp | 4 ++++ Source/Core/Core/PowerPC/Jit64/Jit.cpp | 2 ++ Source/Core/Core/PowerPC/Jit64IL/JitIL.cpp | 5 ++++- Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp | 8 ++++++++ Source/Core/Core/PowerPC/JitCommon/Jit_Util.h | 1 + Source/Core/Core/PowerPC/JitInterface.cpp | 2 +- 6 files changed, 20 insertions(+), 2 deletions(-) diff --git a/Source/Core/Core/HW/WiimoteEmu/EmuSubroutines.cpp b/Source/Core/Core/HW/WiimoteEmu/EmuSubroutines.cpp index 0722364086..76cfc1b8cb 100644 --- a/Source/Core/Core/HW/WiimoteEmu/EmuSubroutines.cpp +++ b/Source/Core/Core/HW/WiimoteEmu/EmuSubroutines.cpp @@ -604,7 +604,11 @@ void Wiimote::DoState(PointerWrap& p) { //clear while (!m_read_requests.empty()) + { + delete[] m_read_requests.front().data; m_read_requests.pop(); + } + p.Do(size); while (size--) diff --git a/Source/Core/Core/PowerPC/Jit64/Jit.cpp b/Source/Core/Core/PowerPC/Jit64/Jit.cpp index 08806d3e89..f226ba4a37 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit.cpp @@ -203,6 +203,7 @@ void Jit64::Init() // important: do this *after* generating the global asm routines, because we can't use farcode in them. // it'll crash because the farcode functions get cleared on JIT clears. farcode.Init(jo.memcheck ? FARCODE_SIZE_MMU : FARCODE_SIZE); + Clear(); code_block.m_stats = &js.st; code_block.m_gpa = &js.gpa; @@ -216,6 +217,7 @@ void Jit64::ClearCache() trampolines.ClearCodeSpace(); farcode.ClearCodeSpace(); ClearCodeSpace(); + Clear(); UpdateMemoryOptions(); m_clear_cache_asap = false; } diff --git a/Source/Core/Core/PowerPC/Jit64IL/JitIL.cpp b/Source/Core/Core/PowerPC/Jit64IL/JitIL.cpp index 036e765145..39292b9530 100644 --- a/Source/Core/Core/PowerPC/Jit64IL/JitIL.cpp +++ b/Source/Core/Core/PowerPC/Jit64IL/JitIL.cpp @@ -254,6 +254,7 @@ void JitIL::Init() asm_routines.Init(nullptr); farcode.Init(jo.memcheck ? FARCODE_SIZE_MMU : FARCODE_SIZE); + Clear(); code_block.m_stats = &js.st; code_block.m_gpa = &js.gpa; @@ -269,7 +270,9 @@ void JitIL::ClearCache() { blocks.Clear(); trampolines.ClearCodeSpace(); + farcode.ClearCodeSpace(); ClearCodeSpace(); + Clear(); } void JitIL::Shutdown() @@ -455,7 +458,7 @@ void JitIL::Trace() void JitIL::Jit(u32 em_address) { - if (IsAlmostFull() || farcode.IsAlmostFull() || blocks.IsFull() || + if (IsAlmostFull() || farcode.IsAlmostFull() || trampolines.IsAlmostFull() || blocks.IsFull() || SConfig::GetInstance().bJITNoBlockCache) { ClearCache(); diff --git a/Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp b/Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp index 46b270d8e0..d52dc39b93 100644 --- a/Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp +++ b/Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp @@ -1014,3 +1014,11 @@ void EmuCodeBlock::JitClearCA() { MOV(8, PPCSTATE(xer_ca), Imm8(0)); } + +void EmuCodeBlock::Clear() +{ + registersInUseAtLoc.clear(); + pcAtLoc.clear(); + exceptionHandlerAtLoc.clear(); +} + diff --git a/Source/Core/Core/PowerPC/JitCommon/Jit_Util.h b/Source/Core/Core/PowerPC/JitCommon/Jit_Util.h index fe10691192..1442477495 100644 --- a/Source/Core/Core/PowerPC/JitCommon/Jit_Util.h +++ b/Source/Core/Core/PowerPC/JitCommon/Jit_Util.h @@ -128,6 +128,7 @@ public: void ConvertSingleToDouble(Gen::X64Reg dst, Gen::X64Reg src, bool src_is_gpr = false); void ConvertDoubleToSingle(Gen::X64Reg dst, Gen::X64Reg src); void SetFPRF(Gen::X64Reg xmm); + void Clear(); protected: std::unordered_map registersInUseAtLoc; std::unordered_map pcAtLoc; diff --git a/Source/Core/Core/PowerPC/JitInterface.cpp b/Source/Core/Core/PowerPC/JitInterface.cpp index 863605ebd9..17e954d98d 100644 --- a/Source/Core/Core/PowerPC/JitInterface.cpp +++ b/Source/Core/Core/PowerPC/JitInterface.cpp @@ -41,7 +41,7 @@ namespace JitInterface void DoState(PointerWrap &p) { if (jit && p.GetMode() == PointerWrap::MODE_READ) - jit->GetBlockCache()->Clear(); + jit->ClearCache(); } CPUCoreBase *InitJitCore(int core) {