From a784fe1f2fef2068e20d9c7170b7c4ced1219889 Mon Sep 17 00:00:00 2001 From: "Admiral H. Curtiss" Date: Tue, 10 Jan 2023 06:55:53 +0100 Subject: [PATCH] HW/ProcessorInterface: Avoid ppcState global. --- Source/Core/Core/HW/ProcessorInterface.cpp | 13 +++++++------ Source/Core/Core/HW/ProcessorInterface.h | 2 +- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/Source/Core/Core/HW/ProcessorInterface.cpp b/Source/Core/Core/HW/ProcessorInterface.cpp index a93b4342cc..a1540f6851 100644 --- a/Source/Core/Core/HW/ProcessorInterface.cpp +++ b/Source/Core/Core/HW/ProcessorInterface.cpp @@ -65,14 +65,14 @@ void ProcessorInterfaceManager::RegisterMMIO(MMIO::Mapping* mmio, u32 base) MMIO::ComplexWrite([](Core::System& system, u32, u32 val) { auto& processor_interface = system.GetProcessorInterface(); processor_interface.m_interrupt_cause &= ~val; - processor_interface.UpdateException(); + processor_interface.UpdateException(system); })); mmio->Register(base | PI_INTERRUPT_MASK, MMIO::DirectRead(&m_interrupt_mask), MMIO::ComplexWrite([](Core::System& system, u32, u32 val) { auto& processor_interface = system.GetProcessorInterface(); processor_interface.m_interrupt_mask = val; - processor_interface.UpdateException(); + processor_interface.UpdateException(system); })); mmio->Register(base | PI_FIFO_BASE, MMIO::DirectRead(&m_fifo_cpu_base), @@ -137,12 +137,13 @@ void ProcessorInterfaceManager::RegisterMMIO(MMIO::Mapping* mmio, u32 base) } } -void ProcessorInterfaceManager::UpdateException() +void ProcessorInterfaceManager::UpdateException(Core::System& system) { + auto& ppc_state = system.GetPPCState(); if ((m_interrupt_cause & m_interrupt_mask) != 0) - PowerPC::ppcState.Exceptions |= EXCEPTION_EXTERNAL_INT; + ppc_state.Exceptions |= EXCEPTION_EXTERNAL_INT; else - PowerPC::ppcState.Exceptions &= ~EXCEPTION_EXTERNAL_INT; + ppc_state.Exceptions &= ~EXCEPTION_EXTERNAL_INT; } static const char* Debug_GetInterruptName(u32 cause_mask) @@ -208,7 +209,7 @@ void ProcessorInterfaceManager::SetInterrupt(u32 cause_mask, bool set) m_interrupt_cause &= ~cause_mask; // is there any reason to have this possibility? // F|RES: i think the hw devices reset the interrupt in the PI to 0 // if the interrupt cause is eliminated. that isn't done by software (afaik) - UpdateException(); + UpdateException(Core::System::GetInstance()); } void ProcessorInterfaceManager::SetResetButton(bool set) diff --git a/Source/Core/Core/HW/ProcessorInterface.h b/Source/Core/Core/HW/ProcessorInterface.h index a0994ddf54..5247c03b2f 100644 --- a/Source/Core/Core/HW/ProcessorInterface.h +++ b/Source/Core/Core/HW/ProcessorInterface.h @@ -87,7 +87,7 @@ public: private: // Let the PPC know that an external exception is set/cleared - void UpdateException(); + void UpdateException(Core::System& system); void SetResetButton(bool set);