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guessing unknown extension (seems not to crash anything while other guesses did) 

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@2964 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
nakeee 2009-04-14 12:37:44 +00:00
parent 0fa48f2b44
commit a77c4f808b
3 changed files with 15 additions and 1 deletions
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3
Source/Core/DSPCore/Src/DSPTables.cpp
View File

@ -314,6 +314,9 @@ const DSPOPCTemplate cw =
const DSPOPCTemplate opcodes_ext[] =
{
// FIXME: guessing this is cr need checking
{"CR", 0x0000, 0x00fc, DSPInterpreter::Ext::cr, nop, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, NULL, NULL,},
{"DR", 0x0004, 0x00fc, DSPInterpreter::Ext::dr, nop, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, NULL, NULL,},
{"IR", 0x0008, 0x00fc, DSPInterpreter::Ext::ir, nop, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, NULL, NULL,},
{"NR", 0x000c, 0x00fc, DSPInterpreter::Ext::nr, nop, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, NULL, NULL,},

12
Source/Core/DSPCore/Src/gdsp_ext_op.cpp
View File

@ -35,6 +35,16 @@ namespace DSPInterpreter
namespace Ext
{
// CR $arR
// xxxx xxxx 0000 00rr
// Clearing addressing register $arR.
// This is not in any doc and as such just a guess
void cr(const UDSPInstruction& opc) {
u8 reg = opc.hex & 0x3;
g_dsp.r[reg] = 0;
}
// DR $arR
// xxxx xxxx 0000 01rr
// Decrement addressing register $arR.
@ -201,7 +211,7 @@ void dsp_op_ext_r_epi(const UDSPInstruction& opc)
switch (op) {
case 0x00: //
ERROR_LOG(DSPLLE, "dsp_op_ext_r_epi");
//g_dsp.r[reg] = 0;
break;
case 0x01: // DR

1
Source/Core/DSPCore/Src/gdsp_ext_op.h
View File

@ -62,6 +62,7 @@ void ldn(const UDSPInstruction& opc);
void ldm(const UDSPInstruction& opc);
void ldnm(const UDSPInstruction& opc);
void mv(const UDSPInstruction& opc);
void cr(const UDSPInstruction& opc);
void dr(const UDSPInstruction& opc);
void ir(const UDSPInstruction& opc);
void nr(const UDSPInstruction& opc);