Merge pull request #1910 from Sonicadvance1/LLVMDisassembly_improvements
Improve the LLVM disassembler in the debug window.
This commit is contained in:
commit
a5e9c5e718
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@ -49,7 +49,7 @@
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class HostDisassemblerLLVM : public HostDisassembler
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class HostDisassemblerLLVM : public HostDisassembler
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{
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{
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public:
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public:
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HostDisassemblerLLVM(const std::string host_disasm);
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HostDisassemblerLLVM(const std::string host_disasm, int inst_size = -1, const std::string cpu = "");
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~HostDisassemblerLLVM()
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~HostDisassemblerLLVM()
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{
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{
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if (m_can_disasm)
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if (m_can_disasm)
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@ -59,22 +59,24 @@ public:
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private:
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private:
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bool m_can_disasm;
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bool m_can_disasm;
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LLVMDisasmContextRef m_llvm_context;
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LLVMDisasmContextRef m_llvm_context;
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int m_instruction_size;
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std::string DisassembleHostBlock(const u8* code_start, const u32 code_size, u32* host_instructions_count) override;
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std::string DisassembleHostBlock(const u8* code_start, const u32 code_size, u32* host_instructions_count) override;
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};
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};
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HostDisassemblerLLVM::HostDisassemblerLLVM(const std::string host_disasm)
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HostDisassemblerLLVM::HostDisassemblerLLVM(const std::string host_disasm, int inst_size, const std::string cpu)
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: m_can_disasm(false)
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: m_can_disasm(false), m_instruction_size(inst_size)
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{
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{
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LLVMInitializeAllTargetInfos();
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LLVMInitializeAllTargetInfos();
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LLVMInitializeAllTargetMCs();
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LLVMInitializeAllTargetMCs();
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LLVMInitializeAllDisassemblers();
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LLVMInitializeAllDisassemblers();
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m_llvm_context = LLVMCreateDisasm(host_disasm.c_str(), nullptr, 0, 0, nullptr);
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m_llvm_context = LLVMCreateDisasmCPU(host_disasm.c_str(), cpu.c_str(), nullptr, 0, 0, nullptr);
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// Couldn't create llvm context
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// Couldn't create llvm context
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if (!m_llvm_context)
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if (!m_llvm_context)
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return;
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return;
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LLVMSetDisasmOptions(m_llvm_context,
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LLVMSetDisasmOptions(m_llvm_context,
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LLVMDisassembler_Option_AsmPrinterVariant |
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LLVMDisassembler_Option_AsmPrinterVariant |
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LLVMDisassembler_Option_PrintLatency);
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LLVMDisassembler_Option_PrintLatency);
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@ -87,15 +89,47 @@ std::string HostDisassemblerLLVM::DisassembleHostBlock(const u8* code_start, con
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if (!m_can_disasm)
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if (!m_can_disasm)
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return "(No LLVM context)";
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return "(No LLVM context)";
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u64 disasmPtr = (u64)code_start;
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u8* disasmPtr = (u8*)code_start;
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const u8 *end = code_start + code_size;
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const u8 *end = code_start + code_size;
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std::ostringstream x86_disasm;
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std::ostringstream x86_disasm;
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while ((u8*)disasmPtr < end)
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while ((u8*)disasmPtr < end)
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{
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{
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char inst_disasm[256];
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char inst_disasm[256];
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disasmPtr += LLVMDisasmInstruction(m_llvm_context, (u8*)disasmPtr, (u64)(end - disasmPtr), (u64)disasmPtr, inst_disasm, 256);
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size_t inst_size = LLVMDisasmInstruction(m_llvm_context, disasmPtr, (u64)(end - disasmPtr), (u64)disasmPtr, inst_disasm, 256);
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if (!inst_size)
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{
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x86_disasm << "Invalid inst:";
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if (m_instruction_size != -1)
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{
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// If we are on an architecture that has a fixed instruction size
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// We can continue onward past this bad instruction.
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std::string inst_str = "";
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for (int i = 0; i < m_instruction_size; ++i)
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inst_str += StringFromFormat("%02x", disasmPtr[i]);
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x86_disasm << inst_str << std::endl;
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disasmPtr += m_instruction_size;
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}
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else
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{
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// We can't continue if we are on an architecture that has flexible instruction sizes
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// Dump the rest of the block instead
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std::string code_block = "";
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for (int i = 0; (disasmPtr + i) < end; ++i)
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code_block += StringFromFormat("%02x", disasmPtr[i]);
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x86_disasm << code_block << std::endl;
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break;
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}
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}
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else
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{
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x86_disasm << inst_disasm << std::endl;
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x86_disasm << inst_disasm << std::endl;
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disasmPtr += inst_size;
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}
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(*host_instructions_count)++;
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(*host_instructions_count)++;
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}
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}
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@ -199,9 +233,9 @@ CJitWindow::CJitWindow(wxWindow* parent, wxWindowID id, const wxPoint& pos,
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#elif defined(_M_X86)
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#elif defined(_M_X86)
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m_disassembler.reset(new HostDisassemblerX86());
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m_disassembler.reset(new HostDisassemblerX86());
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#elif defined(_M_ARM_64) && defined(HAS_LLVM)
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#elif defined(_M_ARM_64) && defined(HAS_LLVM)
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m_disassembler.reset(new HostDisassemblerLLVM("aarch64-none-unknown"));
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m_disassembler.reset(new HostDisassemblerLLVM("aarch64-none-unknown", 4, "cortex-a57"));
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#elif defined(_M_ARM_32) && defined(HAS_LLVM)
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#elif defined(_M_ARM_32) && defined(HAS_LLVM)
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m_disassembler.reset(new HostDisassemblerLLVM("armv7-none-unknown"));
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m_disassembler.reset(new HostDisassemblerLLVM("armv7-none-unknown", 4, "cortex-a15"));
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#else
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#else
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m_disassembler.reset(new HostDisassembler());
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m_disassembler.reset(new HostDisassembler());
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#endif
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#endif
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