MMU: Get rid of pointer casts
These sort of casts invoke undefined behavior (u8, u16, u32, and u64 all have completely different alignment requirements).
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a58d5fa8ee
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@ -211,26 +211,34 @@ static T ReadFromHardware(u32 em_address)
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// Handle RAM; the masking intentionally discards bits (essentially creating
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// Handle RAM; the masking intentionally discards bits (essentially creating
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// mirrors of memory).
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// mirrors of memory).
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// TODO: Only the first REALRAM_SIZE is supposed to be backed by actual memory.
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// TODO: Only the first REALRAM_SIZE is supposed to be backed by actual memory.
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return bswap((*(const T*)&Memory::m_pRAM[em_address & Memory::RAM_MASK]));
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T value;
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std::memcpy(&value, &Memory::m_pRAM[em_address & Memory::RAM_MASK], sizeof(T));
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return bswap(value);
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}
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}
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if (Memory::m_pEXRAM && (em_address >> 28) == 0x1 &&
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if (Memory::m_pEXRAM && (em_address >> 28) == 0x1 &&
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(em_address & 0x0FFFFFFF) < Memory::EXRAM_SIZE)
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(em_address & 0x0FFFFFFF) < Memory::EXRAM_SIZE)
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{
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{
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return bswap((*(const T*)&Memory::m_pEXRAM[em_address & 0x0FFFFFFF]));
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T value;
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std::memcpy(&value, &Memory::m_pEXRAM[em_address & 0x0FFFFFFF], sizeof(T));
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return bswap(value);
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}
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}
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// Locked L1 technically doesn't have a fixed address, but games all use 0xE0000000.
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// Locked L1 technically doesn't have a fixed address, but games all use 0xE0000000.
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if ((em_address >> 28) == 0xE && (em_address < (0xE0000000 + Memory::L1_CACHE_SIZE)))
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if ((em_address >> 28) == 0xE && (em_address < (0xE0000000 + Memory::L1_CACHE_SIZE)))
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{
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{
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return bswap((*(const T*)&Memory::m_pL1Cache[em_address & 0x0FFFFFFF]));
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T value;
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std::memcpy(&value, &Memory::m_pL1Cache[em_address & 0x0FFFFFFF], sizeof(T));
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return bswap(value);
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}
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}
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// In Fake-VMEM mode, we need to map the memory somewhere into
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// In Fake-VMEM mode, we need to map the memory somewhere into
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// physical memory for BAT translation to work; we currently use
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// physical memory for BAT translation to work; we currently use
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// [0x7E000000, 0x80000000).
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// [0x7E000000, 0x80000000).
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if (Memory::m_pFakeVMEM && ((em_address & 0xFE000000) == 0x7E000000))
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if (Memory::m_pFakeVMEM && ((em_address & 0xFE000000) == 0x7E000000))
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{
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{
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return bswap(*(T*)&Memory::m_pFakeVMEM[em_address & Memory::RAM_MASK]);
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T value;
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std::memcpy(&value, &Memory::m_pFakeVMEM[em_address & Memory::RAM_MASK], sizeof(T));
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return bswap(value);
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}
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}
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if (flag == FLAG_READ && (em_address & 0xF8000000) == 0x08000000)
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if (flag == FLAG_READ && (em_address & 0xF8000000) == 0x08000000)
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@ -292,21 +300,24 @@ static void WriteToHardware(u32 em_address, const T data)
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// Handle RAM; the masking intentionally discards bits (essentially creating
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// Handle RAM; the masking intentionally discards bits (essentially creating
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// mirrors of memory).
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// mirrors of memory).
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// TODO: Only the first REALRAM_SIZE is supposed to be backed by actual memory.
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// TODO: Only the first REALRAM_SIZE is supposed to be backed by actual memory.
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*(T*)&Memory::m_pRAM[em_address & Memory::RAM_MASK] = bswap(data);
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const T swapped_data = bswap(data);
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std::memcpy(&Memory::m_pRAM[em_address & Memory::RAM_MASK], &swapped_data, sizeof(T));
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return;
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return;
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}
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}
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if (Memory::m_pEXRAM && (em_address >> 28) == 0x1 &&
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if (Memory::m_pEXRAM && (em_address >> 28) == 0x1 &&
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(em_address & 0x0FFFFFFF) < Memory::EXRAM_SIZE)
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(em_address & 0x0FFFFFFF) < Memory::EXRAM_SIZE)
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{
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{
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*(T*)&Memory::m_pEXRAM[em_address & 0x0FFFFFFF] = bswap(data);
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const T swapped_data = bswap(data);
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std::memcpy(&Memory::m_pEXRAM[em_address & 0x0FFFFFFF], &swapped_data, sizeof(T));
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return;
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return;
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}
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}
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// Locked L1 technically doesn't have a fixed address, but games all use 0xE0000000.
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// Locked L1 technically doesn't have a fixed address, but games all use 0xE0000000.
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if ((em_address >> 28 == 0xE) && (em_address < (0xE0000000 + Memory::L1_CACHE_SIZE)))
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if ((em_address >> 28 == 0xE) && (em_address < (0xE0000000 + Memory::L1_CACHE_SIZE)))
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{
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{
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*(T*)&Memory::m_pL1Cache[em_address & 0x0FFFFFFF] = bswap(data);
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const T swapped_data = bswap(data);
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std::memcpy(&Memory::m_pL1Cache[em_address & 0x0FFFFFFF], &swapped_data, sizeof(T));
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return;
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return;
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}
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}
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@ -315,7 +326,8 @@ static void WriteToHardware(u32 em_address, const T data)
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// [0x7E000000, 0x80000000).
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// [0x7E000000, 0x80000000).
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if (Memory::m_pFakeVMEM && ((em_address & 0xFE000000) == 0x7E000000))
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if (Memory::m_pFakeVMEM && ((em_address & 0xFE000000) == 0x7E000000))
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{
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{
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*(T*)&Memory::m_pFakeVMEM[em_address & Memory::RAM_MASK] = bswap(data);
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const T swapped_data = bswap(data);
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std::memcpy(&Memory::m_pFakeVMEM[em_address & Memory::RAM_MASK], &swapped_data, sizeof(T));
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return;
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return;
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}
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}
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@ -399,7 +411,7 @@ TryReadInstResult TryReadInstruction(u32 address)
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// TODO: Refactor this. This icache implementation is totally wrong if used with the fake vmem.
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// TODO: Refactor this. This icache implementation is totally wrong if used with the fake vmem.
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if (Memory::m_pFakeVMEM && ((address & 0xFE000000) == 0x7E000000))
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if (Memory::m_pFakeVMEM && ((address & 0xFE000000) == 0x7E000000))
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{
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{
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hex = bswap(*(const u32*)&Memory::m_pFakeVMEM[address & Memory::FAKEVMEM_MASK]);
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hex = Common::swap32(&Memory::m_pFakeVMEM[address & Memory::FAKEVMEM_MASK]);
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}
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}
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else
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else
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{
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{
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@ -666,7 +678,7 @@ void DMA_LCToMemory(const u32 memAddr, const u32 cacheAddr, const u32 numBlocks)
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{
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{
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for (u32 i = 0; i < 32 * numBlocks; i += 4)
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for (u32 i = 0; i < 32 * numBlocks; i += 4)
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{
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{
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u32 data = bswap(*(u32*)(Memory::m_pL1Cache + ((cacheAddr + i) & 0x3FFFF)));
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const u32 data = Common::swap32(Memory::m_pL1Cache + ((cacheAddr + i) & 0x3FFFF));
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EFB_Write(data, memAddr + i);
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EFB_Write(data, memAddr + i);
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}
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}
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return;
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return;
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@ -678,7 +690,7 @@ void DMA_LCToMemory(const u32 memAddr, const u32 cacheAddr, const u32 numBlocks)
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{
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{
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for (u32 i = 0; i < 32 * numBlocks; i += 4)
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for (u32 i = 0; i < 32 * numBlocks; i += 4)
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{
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{
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u32 data = bswap(*(u32*)(Memory::m_pL1Cache + ((cacheAddr + i) & 0x3FFFF)));
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const u32 data = Common::swap32(Memory::m_pL1Cache + ((cacheAddr + i) & 0x3FFFF));
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Memory::mmio_mapping->Write(memAddr + i, data);
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Memory::mmio_mapping->Write(memAddr + i, data);
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}
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}
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return;
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return;
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@ -703,8 +715,8 @@ void DMA_MemoryToLC(const u32 cacheAddr, const u32 memAddr, const u32 numBlocks)
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{
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{
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for (u32 i = 0; i < 32 * numBlocks; i += 4)
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for (u32 i = 0; i < 32 * numBlocks; i += 4)
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{
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{
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u32 data = EFB_Read(memAddr + i);
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const u32 data = Common::swap32(EFB_Read(memAddr + i));
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*(u32*)(Memory::m_pL1Cache + ((cacheAddr + i) & 0x3FFFF)) = bswap(data);
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std::memcpy(Memory::m_pL1Cache + ((cacheAddr + i) & 0x3FFFF), &data, sizeof(u32));
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}
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}
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return;
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return;
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}
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}
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@ -715,8 +727,8 @@ void DMA_MemoryToLC(const u32 cacheAddr, const u32 memAddr, const u32 numBlocks)
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{
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{
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for (u32 i = 0; i < 32 * numBlocks; i += 4)
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for (u32 i = 0; i < 32 * numBlocks; i += 4)
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{
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{
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u32 data = Memory::mmio_mapping->Read<u32>(memAddr + i);
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const u32 data = Common::swap32(Memory::mmio_mapping->Read<u32>(memAddr + i));
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*(u32*)(Memory::m_pL1Cache + ((cacheAddr + i) & 0x3FFFF)) = bswap(data);
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std::memcpy(Memory::m_pL1Cache + ((cacheAddr + i) & 0x3FFFF), &data, sizeof(u32));
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}
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}
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return;
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return;
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}
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}
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@ -1073,7 +1085,7 @@ static TranslateAddressResult TranslatePageAddress(const u32 address, const XChe
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// hash function no 1 "xor" .360
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// hash function no 1 "xor" .360
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u32 hash = (VSID ^ page_index);
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u32 hash = (VSID ^ page_index);
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u32 pte1 = bswap((VSID << 7) | api | PTE1_V);
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u32 pte1 = Common::swap32((VSID << 7) | api | PTE1_V);
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for (int hash_func = 0; hash_func < 2; hash_func++)
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for (int hash_func = 0; hash_func < 2; hash_func++)
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{
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{
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@ -1089,10 +1101,13 @@ static TranslateAddressResult TranslatePageAddress(const u32 address, const XChe
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for (int i = 0; i < 8; i++, pteg_addr += 8)
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for (int i = 0; i < 8; i++, pteg_addr += 8)
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{
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{
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if (pte1 == *(u32*)&Memory::physical_base[pteg_addr])
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u32 pteg;
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std::memcpy(&pteg, &Memory::physical_base[pteg_addr], sizeof(u32));
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if (pte1 == pteg)
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{
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{
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UPTE2 PTE2;
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UPTE2 PTE2;
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PTE2.Hex = bswap((*(u32*)&Memory::physical_base[pteg_addr + 4]));
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PTE2.Hex = Common::swap32(&Memory::physical_base[pteg_addr + 4]);
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// set the access bits
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// set the access bits
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switch (flag)
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switch (flag)
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@ -1113,7 +1128,10 @@ static TranslateAddressResult TranslatePageAddress(const u32 address, const XChe
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}
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}
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if (!IsNoExceptionFlag(flag))
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if (!IsNoExceptionFlag(flag))
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*(u32*)&Memory::physical_base[pteg_addr + 4] = bswap(PTE2.Hex);
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{
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const u32 swapped_pte2 = Common::swap32(PTE2.Hex);
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std::memcpy(&Memory::physical_base[pteg_addr + 4], &swapped_pte2, sizeof(u32));
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}
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// We already updated the TLB entry if this was caused by a C bit.
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// We already updated the TLB entry if this was caused by a C bit.
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if (res != TLB_UPDATE_C)
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if (res != TLB_UPDATE_C)
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