DSP: Unbreak disassembler (broken since 2866), commenting, logging changes, minor cleanup
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@2878 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
parent
405480342a
commit
a583950f82
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@ -93,7 +93,7 @@
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#define FONT_ANSI "font_ansi.bin"
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#define FONT_SJIS "font_sjis.bin"
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#define DSP_ROM "dsp_rom.bin"
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#define DSP_IROM "dsp_rom.bin"
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#define DSP_COEF "dsp_coef.bin"
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#define GC_IPL "IPL.bin"
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@ -159,7 +159,7 @@
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#define FONT_ANSI_FILE FULL_GC_SYS_DIR FONT_ANSI
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#define FONT_SJIS_FILE FULL_GC_SYS_DIR FONT_SJIS
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#define DSP_ROM_FILE FULL_GC_SYS_DIR DSP_ROM
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#define DSP_IROM_FILE FULL_GC_SYS_DIR DSP_IROM
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#define DSP_COEF_FILE FULL_GC_SYS_DIR DSP_COEF
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#define WII_EUR_SETTING_FILE FULL_WII_SYS_DIR WII_EUR_SETTING
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@ -179,7 +179,7 @@ bool CBoot::SetupWiiMemory(unsigned int _CountryCode)
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break;
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default:
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PanicAlert("SetupWiiMem: Unknown country. Wii boot process will be switched to European settings.");
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// PanicAlert("SetupWiiMem: Unknown country. Wii boot process will be switched to European settings.");
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filename = WII_EUR_SETTING_FILE;
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break;
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}
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@ -578,7 +578,7 @@ void Update_ARAM_DMA()
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if (g_arDMA.Cnt.dir)
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{
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//read from ARAM
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INFO_LOG(DSPINTERFACE, "ARAM DMA read %08x bytes from %08x to Mem: %08x",g_arDMA.Cnt.count, g_arDMA.ARAddr, g_arDMA.MMAddr);
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INFO_LOG(DSPINTERFACE, "DMA copy %08x bytes from ARAM %08x to Mem: %08x",g_arDMA.Cnt.count, g_arDMA.ARAddr, g_arDMA.MMAddr);
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u32 iMemAddress = g_arDMA.MMAddr;
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u32 iARAMAddress = g_arDMA.ARAddr;
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@ -598,7 +598,7 @@ void Update_ARAM_DMA()
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u32 iARAMAddress = g_arDMA.ARAddr;
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//write to g_ARAM
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INFO_LOG(DSPINTERFACE, "g_ARAM DMA write %08x bytes from %08x to Aram: %08x",
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INFO_LOG(DSPINTERFACE, "DMA copy %08x bytes from Mem %08x to ARAM %08x (sound data loaded)",
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g_arDMA.Cnt.count, g_arDMA.MMAddr, g_arDMA.ARAddr);
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for (u32 i = 0; i < g_arDMA.Cnt.count; i++)
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{
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@ -1972,6 +1972,12 @@ bool CWII_IPC_HLE_Device_usb_oh0::Open(u32 _CommandAddress, u32 _Mode)
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return true;
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}
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bool CWII_IPC_HLE_Device_usb_oh0::Close(u32 _CommandAddress)
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{
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Memory::Write_U32(0, _CommandAddress + 0x4);
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return true;
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}
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bool CWII_IPC_HLE_Device_usb_oh0::IOCtl(u32 _CommandAddress)
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{
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// write return value
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@ -1983,7 +1989,6 @@ bool CWII_IPC_HLE_Device_usb_oh0::IOCtlV(u32 _CommandAddress)
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{
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// write return value
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Memory::Write_U32(0, _CommandAddress + 0x4);
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return true;
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}
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@ -227,6 +227,7 @@ public:
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virtual ~CWII_IPC_HLE_Device_usb_oh0();
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virtual bool Open(u32 _CommandAddress, u32 _Mode);
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virtual bool Close(u32 _CommandAddress); // hermes' dsp demo
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virtual bool IOCtlV(u32 _CommandAddress);
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virtual bool IOCtl(u32 _CommandAddress);
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@ -530,10 +530,12 @@ Global
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{3D8156A9-64D1-4C8E-ADBE-1B319030E4A4}.Debug|x64.ActiveCfg = Debug|x64
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{3D8156A9-64D1-4C8E-ADBE-1B319030E4A4}.DebugFast|Win32.ActiveCfg = DebugFast|Win32
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{3D8156A9-64D1-4C8E-ADBE-1B319030E4A4}.DebugFast|x64.ActiveCfg = DebugFast|x64
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{3D8156A9-64D1-4C8E-ADBE-1B319030E4A4}.DebugFast|x64.Build.0 = DebugFast|x64
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{3D8156A9-64D1-4C8E-ADBE-1B319030E4A4}.Release_JITIL|Win32.ActiveCfg = Release|Win32
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{3D8156A9-64D1-4C8E-ADBE-1B319030E4A4}.Release_JITIL|x64.ActiveCfg = Release|x64
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{3D8156A9-64D1-4C8E-ADBE-1B319030E4A4}.Release|Win32.ActiveCfg = Release|Win32
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{3D8156A9-64D1-4C8E-ADBE-1B319030E4A4}.Release|x64.ActiveCfg = Release|x64
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{3D8156A9-64D1-4C8E-ADBE-1B319030E4A4}.Release|x64.Build.0 = Release|x64
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EndGlobalSection
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GlobalSection(SolutionProperties) = preSolution
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HideSolutionNode = FALSE
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@ -75,7 +75,7 @@ void CUCode_Rom::HandleMail(u32 _uMail)
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{
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m_CurrentUCode.m_StartPC = _uMail;
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BootUCode();
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return; // FIXES THE OVERWRITE
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return; // Important! BootUCode indirectly does "delete this;". Must exit immediately.
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}
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break;
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}
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@ -90,7 +90,6 @@ void CUCode_Rom::BootUCode()
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// simple non-scientific crc invented by ector :P
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// too annoying to change now, and probably good enough anyway
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u32 crc = 0;
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for (u32 i = 0; i < m_CurrentUCode.m_Length; i++)
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{
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crc ^= Memory_Read_U8(m_CurrentUCode.m_RAMAddress + i);
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@ -29,9 +29,6 @@
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namespace DSPInterpreter {
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// END OF HELPER FUNCTIONS
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void unknown(const UDSPInstruction& opc)
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{
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//_assert_msg_(MASTER_LOG, !g_dsp.exception_in_progress_hack, "assert while exception");
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@ -517,11 +514,11 @@ void andc(const UDSPInstruction& opc)
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if ((ac1 & ac2) == 0)
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{
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g_dsp.r[R_SR] |= 0x20;
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g_dsp.r[R_SR] |= 0x20; // 0x40?
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}
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else
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{
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g_dsp.r[R_SR] &= ~0x20;
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g_dsp.r[R_SR] &= ~0x20; // 0x40?
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}
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}
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@ -980,26 +977,34 @@ void shifti(const UDSPInstruction& opc)
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//-------------------------------------------------------------
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// hcs give me this code!!
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// More docs needed - the operation is really odd!
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// Decrement Address Register
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void dar(const UDSPInstruction& opc)
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{
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u8 reg = opc.hex & 0x3;
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int reg = opc.hex & 0x3;
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int temp = g_dsp.r[reg] + g_dsp.r[8];
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if (temp <= 0x7ff){g_dsp.r[reg] = temp;}
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else {g_dsp.r[reg]--;}
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if (temp <= 0x7ff) // ???
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g_dsp.r[reg] = temp;
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else
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g_dsp.r[reg]--;
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}
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// hcs give me this code!!
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// More docs needed - the operation is really odd!
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// Increment Address Register
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void iar(const UDSPInstruction& opc)
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{
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u8 reg = opc.hex & 0x3;
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int reg = opc.hex & 0x3;
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int temp = g_dsp.r[reg] + g_dsp.r[8];
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if (temp <= 0x7ff){g_dsp.r[reg] = temp;}
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else {g_dsp.r[reg]++;}
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if (temp <= 0x7ff) // ???
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g_dsp.r[reg] = temp;
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else
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g_dsp.r[reg]++;
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}
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//-------------------------------------------------------------
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@ -1019,6 +1024,7 @@ void sbset(const UDSPInstruction& opc)
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// FIXME inside
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// No idea what most of this is supposed to do.
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void srbith(const UDSPInstruction& opc)
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{
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switch ((opc.hex >> 8) & 0xf)
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@ -1036,11 +1042,13 @@ void srbith(const UDSPInstruction& opc)
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case 0xd: // SET15
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ERROR_LOG(DSPHLE, "dsp_opc.hex_set15\n");
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break;
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case 0xe: // SET40
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case 0xe: // SET40 (really, clear SR's 0x4000?) something about "set 40-bit operation"?
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g_dsp.r[R_SR] &= ~(1 << 14);
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break;
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case 0xf: // SET16 // that doesnt happen on a real console
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case 0xf: // SET16 (really, set SR's 0x4000?) something about "set 16-bit operation"?
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// that doesnt happen on a real console << what does this comment mean?
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g_dsp.r[R_SR] |= (1 << 14);
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break;
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@ -28,7 +28,6 @@
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// --------------
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u32 RAM_MASK = 0x1FFFFFF;
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u16 Memory_Read_U16(u32 _uAddress)
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{
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_uAddress &= RAM_MASK;
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@ -18,6 +18,7 @@
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#ifndef _GLOBALS_H
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#define _GLOBALS_H
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#include "Common.h"
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#include "AudioCommon.h"
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#include <stdio.h>
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@ -25,15 +25,15 @@
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#include "disassemble.h"
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#include "gdsp_interpreter.h"
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bool DumpDSPCode(u32 _Address, u32 _Length, u32 crc)
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bool DumpDSPCode(const u8 *data, u32 _Length, u32 crc)
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{
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char szFilename[MAX_PATH];
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sprintf(szFilename, "%sDSP_UC_%08X.bin", FULL_DSP_DUMP_DIR, crc);
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FILE* pFile = fopen(szFilename, "wb");
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if (pFile != NULL)
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if (pFile)
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{
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fwrite(g_dspInitialize.pGetMemoryPointer(_Address), _Length, 1, pFile);
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fwrite(data, _Length, 1, pFile);
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fclose(pFile);
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}
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else
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@ -44,7 +44,7 @@ union UDSPControl
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: Hex(_Hex) {}
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};
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bool DumpDSPCode(u32 _Address, u32 _Length, u32 crc);
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bool DumpDSPCode(const u8 *data, u32 _Length, u32 crc);
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bool DisasmUCodeDump(u32 crc);
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u32 GenerateCRC(const unsigned char* _pBuffer, int _pLength);
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bool DumpCWCode(u32 _Address, u32 _Length);
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@ -150,13 +150,14 @@ const char* pdname(u16 val)
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return tmpstr;
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}
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char* gd_dis_params(gd_globals_t* gdg, DSPOPCTemplate* opc, u16 op1, u16 op2, char* strbuf)
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extern void nop(const UDSPInstruction& opc);
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char* gd_dis_params(gd_globals_t* gdg, const DSPOPCTemplate* opc, u16 op1, u16 op2, char* strbuf)
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{
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char* buf = strbuf;
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u32 val;
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int j;
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for (j = 0; j < opc->param_count; j++)
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for (int j = 0; j < opc->param_count; j++)
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{
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if (j > 0)
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{
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@ -219,7 +220,7 @@ char* gd_dis_params(gd_globals_t* gdg, DSPOPCTemplate* opc, u16 op1, u16 op2, ch
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if (opc->params[j].size != 2)
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{
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if (opc->params[j].mask == 0x007f) // LSL, LSR, ASL, ASR
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sprintf(buf, "#%d", val < 64 ? val : -(0x80-(s32)val));
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sprintf(buf, "#%d", val < 64 ? val : -(0x80 - (s32)val));
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else
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sprintf(buf, "#0x%02x", val);
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}
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@ -239,7 +240,7 @@ char* gd_dis_params(gd_globals_t* gdg, DSPOPCTemplate* opc, u16 op1, u16 op2, ch
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default:
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ERROR_LOG(DSPHLE, "Unknown parameter type: %x", opc->params[j].type);
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exit(-1);
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// exit(-1);
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break;
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}
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@ -320,13 +321,12 @@ u16 gd_dis_get_opcode_size(gd_globals_t* gdg)
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return(opc->size & ~P_EXT);
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}
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char* gd_dis_opcode(gd_globals_t* gdg)
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{
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u32 j;
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u32 op1, op2;
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DSPOPCTemplate *opc = NULL;
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DSPOPCTemplate *opc_ext = NULL;
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const DSPOPCTemplate *opc = NULL;
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const DSPOPCTemplate *opc_ext = NULL;
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u16 pc;
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char* buf = gdg->buffer;
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bool extended;
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@ -337,7 +337,7 @@ char* gd_dis_opcode(gd_globals_t* gdg)
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if ((pc & 0x7fff) >= 0x1000)
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{
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gdg->pc++;
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return(gdg->buffer);
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return gdg->buffer;
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}
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pc &= 0x0fff;
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@ -360,6 +360,11 @@ char* gd_dis_opcode(gd_globals_t* gdg)
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}
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}
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const DSPOPCTemplate fake_op = {"CW", 0x0000, 0x0000, nop, nop, 1, 1, {{P_VAL, 2, 0, 0, 0xffff}}, NULL, NULL,};
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if (!opc)
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opc = &fake_op;
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if (opc->size & P_EXT && op1 & 0x00ff)
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extended = true;
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else
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@ -95,6 +95,9 @@ u16 dsp_read_aram()
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break;
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}
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// TODO: Take ifx GAIN into account.
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// check for loop
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if (Address > EndAddress)
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{
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@ -40,7 +40,7 @@ void Update_SR_Register64(s64 _Value)
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g_dsp.r[R_SR] |= 0x4;
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}
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// logic
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// weird
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if ((_Value >> 62) == 0)
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{
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g_dsp.r[R_SR] |= 0x20;
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@ -61,7 +61,7 @@ void Update_SR_Register16(s16 _Value)
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g_dsp.r[R_SR] |= 0x4;
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}
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// logic
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// weird
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if ((_Value >> 14) == 0)
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{
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g_dsp.r[R_SR] |= 0x20;
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@ -32,10 +32,11 @@ namespace DSPInterpreter {
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#define SR_CMP_MASK 0x3f // Shouldn't this include 0x40?
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// These are probably not accurate. Do not use yet.
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#define SR_LOGIC_ZERO 0x0040 // ?? duddie's doc sometimes say & 1<<6 (0x40), sometimes 1<<14 (0x4000), while we have 0x20 .. eh
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#define SR_PROD_MUL2 0x2000
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#define SR_UNKNOWN 0x0002 // ????????
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#define SR_ARITH_ZERO 0x0004
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#define SR_SIGN 0x0008
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#define SR_ARITH_ZERO 0x0002 // ????????
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#define SR_TOP2BITS 0x0020 // this is an odd one.
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#define SR_LOGIC_ZERO 0x0040 // ?? duddie's doc sometimes say & 1<<6 (0x40), sometimes 1<<14 (0x4000), while we have 0x20 .. eh
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#define SR_INT_ENABLE 0x0200 // Not 100% sure but duddie says so. This should replace the hack, if so.
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#define SR_MUL_MODIFY 0x2000 // 1 = normal. 0 = x2
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@ -49,7 +49,7 @@ const char* reg_names[] =
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, "DSCR", NULL, "DSBL", NULL, "DSPA", "DSMAH", "DSMAL",
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// d0
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NULL, "SampleFormat", NULL, NULL, "ACSAH", "ACSAL", "ACEAH", "ACEAL",
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NULL, "SampleFormat", NULL, NULL, "ACSAH", "ACSAL", "ACEAH", "ACEAL",
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"ACCAH", "ACCAL", "PRED_SCALE", "YN1", "YN2", "ARAM", "GAIN", NULL,
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// e0
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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@ -72,9 +72,7 @@ u16 gdsp_ifx_regs[256];
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void gdsp_ifx_init()
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{
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int i;
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for (i = 0; i < 256; i++)
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for (int i = 0; i < 256; i++)
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{
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gdsp_ifx_regs[i] = 0;
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}
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@ -128,14 +126,14 @@ void gdsp_mbox_write_l(u8 mbx, u16 val)
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if (mbx == GDSP_MBOX_DSP)
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{
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DEBUG_LOG(DSPHLE, "- Write DSP Mail: 0x%08x (pc=0x%04x)\n", gdsp_mbox_peek(GDSP_MBOX_DSP), g_dsp.err_pc);
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DEBUG_LOG(DSPHLE, " - DSP writes mail to mbx %i: 0x%08x (pc=0x%04x)", mbx, gdsp_mbox_peek(GDSP_MBOX_DSP), g_dsp.err_pc);
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}
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}
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u16 gdsp_mbox_read_h(u8 mbx)
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{
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return (gdsp_mbox[mbx][0]);
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return (gdsp_mbox[mbx][0]); // TODO: mask away the top bit?
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}
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@ -149,10 +147,12 @@ u16 gdsp_mbox_read_l(u8 mbx)
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val = gdsp_mbox[mbx][1];
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gdsp_mbox[mbx][0] &= ~0x8000;
|
||||
|
||||
DEBUG_LOG(DSPHLE, "- DSP reads mail from mbx %i: %08x (pc=0x%04x)", mbx, gdsp_mbox_peek(mbx), g_dsp.err_pc);
|
||||
|
||||
#if WITH_DSP_ON_THREAD
|
||||
g_CriticalSection.Leave();
|
||||
#endif
|
||||
return(val);
|
||||
return val;
|
||||
}
|
||||
|
||||
|
||||
|
@ -250,14 +250,15 @@ void gdsp_idma_in(u16 dsp_addr, u32 addr, u32 size)
|
|||
|
||||
for (u32 i = 0; i < size; i += 2)
|
||||
{
|
||||
// TODO : this may be different on Wii.
|
||||
*(u16*)&dst[dsp_addr + i] = *(u16*)&g_dsp.cpu_ram[(addr + i) & 0x0fffffff];
|
||||
}
|
||||
|
||||
g_dsp.iram_crc = GenerateCRC(g_dsp.cpu_ram + (addr & 0x0fffffff), size);
|
||||
DEBUG_LOG(DSPHLE, "*** Copy new UCode from 0x%08x to 0x%04x (crc: %8x)\n", addr, dsp_addr, g_dsp.iram_crc);
|
||||
INFO_LOG(DSPHLE, "*** Copy new UCode from 0x%08x to 0x%04x (crc: %8x)\n", addr, dsp_addr, g_dsp.iram_crc);
|
||||
|
||||
if (g_dsp.dump_imem)
|
||||
DumpDSPCode(addr, size, g_dsp.iram_crc);
|
||||
DumpDSPCode(&dst[dsp_addr], size, g_dsp.iram_crc);
|
||||
}
|
||||
|
||||
|
||||
|
@ -282,7 +283,7 @@ void gdsp_ddma_in(u16 dsp_addr, u32 addr, u32 size)
|
|||
*(u16*)&dst[dsp_addr + i] = *(u16*)&g_dsp.cpu_ram[(addr + i) & 0x7FFFFFFF];
|
||||
}
|
||||
|
||||
DEBUG_LOG(DSPHLE, "*** ddma_in RAM (0x%08x) -> DRAM_DSP (0x%04x) : size (0x%08x)\n", addr, dsp_addr / 2, size);
|
||||
INFO_LOG(DSPHLE, "*** ddma_in RAM (0x%08x) -> DRAM_DSP (0x%04x) : size (0x%08x)\n", addr, dsp_addr / 2, size);
|
||||
}
|
||||
|
||||
|
||||
|
@ -301,7 +302,7 @@ void gdsp_ddma_out(u16 dsp_addr, u32 addr, u32 size)
|
|||
*(u16*)&g_dsp.cpu_ram[(addr + i) & 0x7FFFFFFF] = *(u16*)&src[dsp_addr + i];
|
||||
}
|
||||
|
||||
DEBUG_LOG(DSPHLE, "*** ddma_out DRAM_DSP (0x%04x) -> RAM (0x%08x) : size (0x%08x)\n", dsp_addr / 2, addr, size);
|
||||
INFO_LOG(DSPHLE, "*** ddma_out DRAM_DSP (0x%04x) -> RAM (0x%08x) : size (0x%08x)\n", dsp_addr / 2, addr, size);
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -139,18 +139,14 @@ bool dsp_dmem_write(u16 addr, u16 val)
|
|||
return(true);
|
||||
}
|
||||
|
||||
|
||||
u16 dsp_fetch_code(void)
|
||||
u16 dsp_fetch_code()
|
||||
{
|
||||
u16 opc = dsp_imem_read(g_dsp.pc);
|
||||
g_dsp.pc++;
|
||||
return(opc);
|
||||
return opc;
|
||||
}
|
||||
|
||||
|
||||
u16 dsp_peek_code(void)
|
||||
{
|
||||
return(dsp_imem_read(g_dsp.pc));
|
||||
return dsp_imem_read(g_dsp.pc);
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -27,7 +27,7 @@
|
|||
#include "gdsp_registers.h"
|
||||
#include "gdsp_interpreter.h"
|
||||
|
||||
|
||||
// Stacks. The stacks are outside the DSP RAM, in dedicated hardware.
|
||||
|
||||
void dsp_reg_stack_push(u8 stack_reg)
|
||||
{
|
||||
|
@ -36,7 +36,6 @@ void dsp_reg_stack_push(u8 stack_reg)
|
|||
g_dsp.reg_stack[stack_reg][g_dsp.reg_stack_ptr[stack_reg]] = g_dsp.r[DSP_REG_ST0 + stack_reg];
|
||||
}
|
||||
|
||||
|
||||
void dsp_reg_stack_pop(u8 stack_reg)
|
||||
{
|
||||
g_dsp.r[DSP_REG_ST0 + stack_reg] = g_dsp.reg_stack[stack_reg][g_dsp.reg_stack_ptr[stack_reg]];
|
||||
|
@ -44,19 +43,15 @@ void dsp_reg_stack_pop(u8 stack_reg)
|
|||
g_dsp.reg_stack_ptr[stack_reg] &= DSP_STACK_MASK;
|
||||
}
|
||||
|
||||
|
||||
void dsp_reg_store_stack(u8 stack_reg, u16 val)
|
||||
{
|
||||
dsp_reg_stack_push(stack_reg);
|
||||
g_dsp.r[DSP_REG_ST0 + stack_reg] = val;
|
||||
}
|
||||
|
||||
|
||||
u16 dsp_reg_load_stack(u8 stack_reg)
|
||||
{
|
||||
u16 val = g_dsp.r[DSP_REG_ST0 + stack_reg];
|
||||
dsp_reg_stack_pop(stack_reg);
|
||||
return(val);
|
||||
return val;
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -216,6 +216,7 @@ void DSP_DebugBreak()
|
|||
|
||||
void dspi_req_dsp_irq()
|
||||
{
|
||||
// Fire an interrupt on the PPC ASAP.
|
||||
g_dspInitialize.pGenerateDSPInterrupt();
|
||||
}
|
||||
|
||||
|
@ -225,27 +226,28 @@ void Initialize(void *init)
|
|||
g_dspInitialize = *(DSPInitialize*)init;
|
||||
|
||||
g_Config.Load();
|
||||
|
||||
gdsp_init();
|
||||
g_dsp.step_counter = 0;
|
||||
g_dsp.cpu_ram = g_dspInitialize.pGetMemoryPointer(0);
|
||||
g_dsp.irq_request = dspi_req_dsp_irq;
|
||||
gdsp_reset();
|
||||
|
||||
if (!gdsp_load_rom(DSP_ROM_FILE)) {
|
||||
if (!gdsp_load_rom(DSP_IROM_FILE)) {
|
||||
bCanWork = false;
|
||||
PanicAlert("Failed loading DSP ROM from " DSP_ROM_FILE);
|
||||
PanicAlert("Failed loading DSP ROM from " DSP_IROM_FILE);
|
||||
}
|
||||
|
||||
|
||||
if (!gdsp_load_coef(DSP_COEF_FILE)) {
|
||||
bCanWork = false;
|
||||
PanicAlert("Failed loading DSP COEF from " DSP_COEF_FILE);
|
||||
}
|
||||
|
||||
if(!bCanWork)
|
||||
|
||||
if (!bCanWork)
|
||||
return; // TODO: Don't let it work
|
||||
|
||||
bIsRunning = true;
|
||||
|
||||
|
||||
g_hDSPThread = new Common::Thread(dsp_thread, NULL);
|
||||
soundStream = AudioCommon::InitSoundStream();
|
||||
|
||||
|
@ -279,25 +281,17 @@ u16 DSP_ReadControlRegister()
|
|||
u16 DSP_ReadMailboxHigh(bool _CPUMailbox)
|
||||
{
|
||||
if (_CPUMailbox)
|
||||
{
|
||||
return(gdsp_mbox_read_h(GDSP_MBOX_CPU));
|
||||
}
|
||||
return gdsp_mbox_read_h(GDSP_MBOX_CPU);
|
||||
else
|
||||
{
|
||||
return(gdsp_mbox_read_h(GDSP_MBOX_DSP));
|
||||
}
|
||||
return gdsp_mbox_read_h(GDSP_MBOX_DSP);
|
||||
}
|
||||
|
||||
u16 DSP_ReadMailboxLow(bool _CPUMailbox)
|
||||
{
|
||||
if (_CPUMailbox)
|
||||
{
|
||||
return(gdsp_mbox_read_l(GDSP_MBOX_CPU));
|
||||
}
|
||||
return gdsp_mbox_read_l(GDSP_MBOX_CPU);
|
||||
else
|
||||
{
|
||||
return(gdsp_mbox_read_l(GDSP_MBOX_DSP));
|
||||
}
|
||||
return gdsp_mbox_read_l(GDSP_MBOX_DSP);
|
||||
}
|
||||
|
||||
void DSP_WriteMailboxHigh(bool _CPUMailbox, u16 _uHighMail)
|
||||
|
@ -333,7 +327,7 @@ void DSP_WriteMailboxLow(bool _CPUMailbox, u16 _uLowMail)
|
|||
u32 uAddress = gdsp_mbox_peek(GDSP_MBOX_CPU);
|
||||
u16 errpc = g_dsp.err_pc;
|
||||
|
||||
DEBUG_LOG(DSPHLE, "Write CPU Mail: 0x%08x (pc=0x%04x)\n", uAddress, errpc);
|
||||
DEBUG_LOG(DSPHLE, "CPU writes mail to mbx 0: 0x%08x (pc=0x%04x)\n", uAddress, errpc);
|
||||
|
||||
// I couldn't find any better way to detect the AX mails so this had to
|
||||
// do. Please feel free to change it.
|
||||
|
|
Loading…
Reference in New Issue