PPCAnalyst: Remove unused variables and methods in BlockRegStats.
This commit is contained in:
parent
6e3d140283
commit
a5217c07b8
|
@ -521,8 +521,8 @@ void PPCAnalyzer::ReorderInstructions(u32 instructions, CodeOp* code) const
|
||||||
ReorderInstructionsCore(instructions, code, false, ReorderType::CMP);
|
ReorderInstructionsCore(instructions, code, false, ReorderType::CMP);
|
||||||
}
|
}
|
||||||
|
|
||||||
void PPCAnalyzer::SetInstructionStats(CodeBlock* block, CodeOp* code, const GekkoOPInfo* opinfo,
|
void PPCAnalyzer::SetInstructionStats(CodeBlock* block, CodeOp* code,
|
||||||
u32 index) const
|
const GekkoOPInfo* opinfo) const
|
||||||
{
|
{
|
||||||
code->wantsCR0 = false;
|
code->wantsCR0 = false;
|
||||||
code->wantsCR1 = false;
|
code->wantsCR1 = false;
|
||||||
|
@ -534,9 +534,6 @@ void PPCAnalyzer::SetInstructionStats(CodeBlock* block, CodeOp* code, const Gekk
|
||||||
block->m_fpa->any = true;
|
block->m_fpa->any = true;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (opinfo->flags & FL_TIMER)
|
|
||||||
block->m_gpa->anyTimer = true;
|
|
||||||
|
|
||||||
// Does the instruction output CR0?
|
// Does the instruction output CR0?
|
||||||
if (opinfo->flags & FL_RC_BIT)
|
if (opinfo->flags & FL_RC_BIT)
|
||||||
code->outputCR0 = code->inst.hex & 1; // todo fix
|
code->outputCR0 = code->inst.hex & 1; // todo fix
|
||||||
|
@ -586,39 +583,32 @@ void PPCAnalyzer::SetInstructionStats(CodeBlock* block, CodeOp* code, const Gekk
|
||||||
if (opinfo->flags & FL_OUT_A)
|
if (opinfo->flags & FL_OUT_A)
|
||||||
{
|
{
|
||||||
code->regsOut[code->inst.RA] = true;
|
code->regsOut[code->inst.RA] = true;
|
||||||
block->m_gpa->SetOutputRegister(code->inst.RA, index);
|
|
||||||
}
|
}
|
||||||
if (opinfo->flags & FL_OUT_D)
|
if (opinfo->flags & FL_OUT_D)
|
||||||
{
|
{
|
||||||
code->regsOut[code->inst.RD] = true;
|
code->regsOut[code->inst.RD] = true;
|
||||||
block->m_gpa->SetOutputRegister(code->inst.RD, index);
|
|
||||||
}
|
}
|
||||||
if ((opinfo->flags & FL_IN_A) || ((opinfo->flags & FL_IN_A0) && code->inst.RA != 0))
|
if ((opinfo->flags & FL_IN_A) || ((opinfo->flags & FL_IN_A0) && code->inst.RA != 0))
|
||||||
{
|
{
|
||||||
code->regsIn[code->inst.RA] = true;
|
code->regsIn[code->inst.RA] = true;
|
||||||
block->m_gpa->SetInputRegister(code->inst.RA, index);
|
|
||||||
}
|
}
|
||||||
if (opinfo->flags & FL_IN_B)
|
if (opinfo->flags & FL_IN_B)
|
||||||
{
|
{
|
||||||
code->regsIn[code->inst.RB] = true;
|
code->regsIn[code->inst.RB] = true;
|
||||||
block->m_gpa->SetInputRegister(code->inst.RB, index);
|
|
||||||
}
|
}
|
||||||
if (opinfo->flags & FL_IN_C)
|
if (opinfo->flags & FL_IN_C)
|
||||||
{
|
{
|
||||||
code->regsIn[code->inst.RC] = true;
|
code->regsIn[code->inst.RC] = true;
|
||||||
block->m_gpa->SetInputRegister(code->inst.RC, index);
|
|
||||||
}
|
}
|
||||||
if (opinfo->flags & FL_IN_S)
|
if (opinfo->flags & FL_IN_S)
|
||||||
{
|
{
|
||||||
code->regsIn[code->inst.RS] = true;
|
code->regsIn[code->inst.RS] = true;
|
||||||
block->m_gpa->SetInputRegister(code->inst.RS, index);
|
|
||||||
}
|
}
|
||||||
if (code->inst.OPCD == 46) // lmw
|
if (code->inst.OPCD == 46) // lmw
|
||||||
{
|
{
|
||||||
for (int iReg = code->inst.RD; iReg < 32; ++iReg)
|
for (int iReg = code->inst.RD; iReg < 32; ++iReg)
|
||||||
{
|
{
|
||||||
code->regsOut[iReg] = true;
|
code->regsOut[iReg] = true;
|
||||||
block->m_gpa->SetOutputRegister(iReg, index);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
else if (code->inst.OPCD == 47) // stmw
|
else if (code->inst.OPCD == 47) // stmw
|
||||||
|
@ -626,7 +616,6 @@ void PPCAnalyzer::SetInstructionStats(CodeBlock* block, CodeOp* code, const Gekk
|
||||||
for (int iReg = code->inst.RS; iReg < 32; ++iReg)
|
for (int iReg = code->inst.RS; iReg < 32; ++iReg)
|
||||||
{
|
{
|
||||||
code->regsIn[iReg] = true;
|
code->regsIn[iReg] = true;
|
||||||
block->m_gpa->SetInputRegister(iReg, index);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -741,9 +730,6 @@ u32 PPCAnalyzer::Analyze(u32 address, CodeBlock* block, CodeBuffer* buffer,
|
||||||
block->m_gpa->any = true;
|
block->m_gpa->any = true;
|
||||||
block->m_fpa->any = false;
|
block->m_fpa->any = false;
|
||||||
|
|
||||||
block->m_gpa->Clear();
|
|
||||||
block->m_fpa->Clear();
|
|
||||||
|
|
||||||
// Set the blocks start address
|
// Set the blocks start address
|
||||||
block->m_address = address;
|
block->m_address = address;
|
||||||
|
|
||||||
|
@ -786,7 +772,7 @@ u32 PPCAnalyzer::Analyze(u32 address, CodeBlock* block, CodeBuffer* buffer,
|
||||||
block->m_stats->numCycles += opinfo->numCycles;
|
block->m_stats->numCycles += opinfo->numCycles;
|
||||||
block->m_physical_addresses.insert(result.physical_address);
|
block->m_physical_addresses.insert(result.physical_address);
|
||||||
|
|
||||||
SetInstructionStats(block, &code[i], opinfo, static_cast<u32>(i));
|
SetInstructionStats(block, &code[i], opinfo);
|
||||||
|
|
||||||
bool follow = false;
|
bool follow = false;
|
||||||
|
|
||||||
|
|
|
@ -88,49 +88,7 @@ struct BlockStats
|
||||||
|
|
||||||
struct BlockRegStats
|
struct BlockRegStats
|
||||||
{
|
{
|
||||||
short firstRead[32];
|
|
||||||
short firstWrite[32];
|
|
||||||
short lastRead[32];
|
|
||||||
short lastWrite[32];
|
|
||||||
short numReads[32];
|
|
||||||
short numWrites[32];
|
|
||||||
|
|
||||||
bool any;
|
bool any;
|
||||||
bool anyTimer;
|
|
||||||
|
|
||||||
int GetTotalNumAccesses(int reg) const { return numReads[reg] + numWrites[reg]; }
|
|
||||||
int GetUseRange(int reg) const
|
|
||||||
{
|
|
||||||
return std::max(lastRead[reg], lastWrite[reg]) - std::min(firstRead[reg], firstWrite[reg]);
|
|
||||||
}
|
|
||||||
|
|
||||||
bool IsUsed(int reg) const { return (numReads[reg] + numWrites[reg]) > 0; }
|
|
||||||
void SetInputRegister(int reg, short opindex)
|
|
||||||
{
|
|
||||||
if (firstRead[reg] == -1)
|
|
||||||
firstRead[reg] = opindex;
|
|
||||||
lastRead[reg] = opindex;
|
|
||||||
numReads[reg]++;
|
|
||||||
}
|
|
||||||
|
|
||||||
void SetOutputRegister(int reg, short opindex)
|
|
||||||
{
|
|
||||||
if (firstWrite[reg] == -1)
|
|
||||||
firstWrite[reg] = opindex;
|
|
||||||
lastWrite[reg] = opindex;
|
|
||||||
numWrites[reg]++;
|
|
||||||
}
|
|
||||||
|
|
||||||
void Clear()
|
|
||||||
{
|
|
||||||
for (int i = 0; i < 32; ++i)
|
|
||||||
{
|
|
||||||
firstRead[i] = -1;
|
|
||||||
firstWrite[i] = -1;
|
|
||||||
numReads[i] = 0;
|
|
||||||
numWrites[i] = 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
};
|
};
|
||||||
|
|
||||||
using CodeBuffer = std::vector<CodeOp>;
|
using CodeBuffer = std::vector<CodeOp>;
|
||||||
|
@ -233,8 +191,7 @@ private:
|
||||||
void ReorderInstructionsCore(u32 instructions, CodeOp* code, bool reverse,
|
void ReorderInstructionsCore(u32 instructions, CodeOp* code, bool reverse,
|
||||||
ReorderType type) const;
|
ReorderType type) const;
|
||||||
void ReorderInstructions(u32 instructions, CodeOp* code) const;
|
void ReorderInstructions(u32 instructions, CodeOp* code) const;
|
||||||
void SetInstructionStats(CodeBlock* block, CodeOp* code, const GekkoOPInfo* opinfo,
|
void SetInstructionStats(CodeBlock* block, CodeOp* code, const GekkoOPInfo* opinfo) const;
|
||||||
u32 index) const;
|
|
||||||
bool IsBusyWaitLoop(CodeBlock* block, CodeOp* code, size_t instructions) const;
|
bool IsBusyWaitLoop(CodeBlock* block, CodeOp* code, size_t instructions) const;
|
||||||
|
|
||||||
// Options
|
// Options
|
||||||
|
|
Loading…
Reference in New Issue