MMU: Add small BAT comment.
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@ -753,35 +753,36 @@ u32 IsOptimizableMMIOAccess(u32 address, u32 accessSize)
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return 0;
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// Translate address
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u32 bat_result = dbat_table[address >> BAT_INDEX_SHIFT];
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if ((bat_result & 1) == 0)
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return false;
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u32 translated = (bat_result & ~3) | (address & 0x0001FFFF);
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// If we also optimize for TLB mappings, we'd have to clear the
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// JitCache on each TLB invalidation.
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if (!TranslateBatAddess(dbat_table, &address))
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return 0;
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// Check whether the address is an aligned address of an MMIO register.
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bool aligned = (translated & ((accessSize >> 3) - 1)) == 0;
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if (!aligned || !MMIO::IsMMIOAddress(translated))
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bool aligned = (address & ((accessSize >> 3) - 1)) == 0;
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if (!aligned || !MMIO::IsMMIOAddress(address))
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return 0;
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return translated;
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return address;
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}
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bool IsOptimizableGatherPipeWrite(u32 address)
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{
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#ifdef ENABLE_MEM_CHECK
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return false;
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return 0;
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#endif
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if (!UReg_MSR(MSR).DR)
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return false;
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return 0;
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// Translate address
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u32 bat_result = dbat_table[address >> BAT_INDEX_SHIFT];
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if ((bat_result & 1) == 0)
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return false;
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u32 translated = (bat_result & ~3) | (address & 0x0001FFFF);
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// Translate address, only check BAT mapping.
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// If we also optimize for TLB mappings, we'd have to clear the
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// JitCache on each TLB invalidation.
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if (!TranslateBatAddess(dbat_table, &address))
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return 0;
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// Check whether the translated address equals the address in WPAR.
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return translated == 0x0C008000;
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return address == 0x0C008000;
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}
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TranslateResult JitCache_TranslateAddress(u32 address)
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@ -1207,6 +1208,8 @@ void DBATUpdated()
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UpdateFakeMMUBat(dbat_table, 0x70000000);
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}
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Memory::UpdateLogicalMemory(dbat_table);
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// IsOptimizable*Address and dcbz depends on the BAT mapping, so we need a flush here.
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JitInterface::ClearSafe();
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}
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@ -1227,6 +1230,9 @@ void IBATUpdated()
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}
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// Translate effective address using BAT or PAT. Returns 0 if the address cannot be translated.
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// Through the hardware looks up BAT and TLB in parallel, BAT is used first if available.
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// So we first check if there is a matching BAT entry, else we look for the TLB in
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// TranslatePageAddress().
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template <const XCheckTLBFlag flag>
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TranslateAddressResult TranslateAddress(const u32 address)
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{
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@ -288,6 +288,14 @@ static const int BAT_INDEX_SHIFT = 17;
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using BatTable = std::array<u32, 1 << (32 - BAT_INDEX_SHIFT)>; // 128 KB
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extern BatTable ibat_table;
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extern BatTable dbat_table;
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inline bool TranslateBatAddess(const BatTable& bat_table, u32* address)
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{
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u32 bat_result = bat_table[*address >> BAT_INDEX_SHIFT];
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if ((bat_result & 1) == 0)
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return false;
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*address = (bat_result & ~3) | (*address & 0x0001FFFF);
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return true;
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}
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} // namespace
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enum CRBits
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