More clean up + ilrrn

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@2908 8ced0084-cf51-0410-be5f-012b33b47a6e

Source/Plugins/Plugin_DSP_LLE-testing/Src/DSPInterpreter.cpp

@@ -112,15 +112,8 @@ void ret(const UDSPInstruction& opc)
 	}
 }
 
-// FIXME inside
 void rti(const UDSPInstruction& opc)
 {
-	if ((opc.hex & 0xf) != 0xf)
-	{
-		// FIXME: Implement
-		ERROR_LOG(DSPLLE, "dsp rti opcode");
-	}
-
 	g_dsp.r[DSP_REG_SR] = dsp_reg_load_stack(DSP_STACK_D);
 	g_dsp.pc = dsp_reg_load_stack(DSP_STACK_C);
 
@@ -338,32 +331,59 @@ void srrn(const UDSPInstruction& opc)
 	g_dsp.r[dreg] += g_dsp.r[dreg + 4];
 }
 
-// FIXME inside
+// ILRR $acD.m, @$arS
+// 0000 001d 0001 00ss
+// Move value from instruction memory pointed by addressing register
+// $arS to mid accumulator register $acD.m.
 void ilrr(const UDSPInstruction& opc)
 {
 	u16 reg  = opc.hex & 0x3;
-	u16 dreg = 0x1e + ((opc.hex >> 8) & 1);
+	u16 dreg = DSP_REG_ACM0 + ((opc.hex >> 8) & 1);
+
+	g_dsp.r[dreg] = dsp_imem_read(g_dsp.r[reg]);
+}
+
+// ILRRD $acD.m, @$arS
+// 0000 001d 0001 01ss
+// Move value from instruction memory pointed by addressing register
+// $arS to mid accumulator register $acD.m. Decrement addressing register $arS.
+void ilrrd(const UDSPInstruction& opc)
+{
+	u16 reg  = opc.hex & 0x3;
+	u16 dreg = DSP_REG_ACM0 + ((opc.hex >> 8) & 1);
 
-	// always to acc0 ?
 	g_dsp.r[dreg] = dsp_imem_read(g_dsp.r[reg]);
 
-	switch ((opc.hex >> 2) & 0x3)
+	g_dsp.r[reg]--;
-	{
+}
-	case 0x0: // no change (ILRR)
-		break;
 
-	case 0x1: // post decrement (ILRRD?)
+// ILRRI $acD.m, @$S
-		g_dsp.r[reg]--;
+// 0000 001d 0001 10ss
-		break;
+// Move value from instruction memory pointed by addressing register
+// $arS to mid accumulator register $acD.m. Increment addressing register $arS.
+void ilrri(const UDSPInstruction& opc)
+{
+	u16 reg  = opc.hex & 0x3;
+	u16 dreg = DSP_REG_ACM0 + ((opc.hex >> 8) & 1);
 
-	case 0x2: // post increment (ILRRI)
+	g_dsp.r[dreg] = dsp_imem_read(g_dsp.r[reg]);
-		g_dsp.r[reg]++;
-		break;
 
-	default:
+	g_dsp.r[reg]++;
-		// FIXME: Implement
+}
-		ERROR_LOG(DSPLLE, "Unknown ILRR: 0x%04x\n", (opc.hex >> 2) & 0x3);
+
-	}
+// ILRRN $acD.m, @$arS
+// 0000 001d 0001 11ss
+// Move value from instruction memory pointed by addressing register
+// $arS to mid accumulator register $acD.m. Add corresponding indexing
+// register $ixS to addressing register $arS.
+void ilrrn(const UDSPInstruction& opc)
+{
+	u16 reg  = opc.hex & 0x3;
+	u16 dreg = DSP_REG_ACM0 + ((opc.hex >> 8) & 1);
+
+	g_dsp.r[dreg] = dsp_imem_read(g_dsp.r[reg]);
+
+	g_dsp.r[reg] += g_dsp.r[DSP_REG_IX0 + reg];
 }
 
 
@@ -641,7 +661,6 @@ void nx(const UDSPInstruction& opc)
 }
 
 
-// FIXME inside
 // Hermes switched andf and andcf, so check to make sure they are still correct
 // ANDCF $acD.m, #I
 // 0000 001r 1100 0000
@@ -650,12 +669,6 @@ void nx(const UDSPInstruction& opc)
 // accumulator mid part $acD.m with immediate value I is equal zero.
 void andfc(const UDSPInstruction& opc)
 {
-	if (opc.hex & 0xf)
-	{
-		// FIXME: Implement
-		ERROR_LOG(DSPLLE, "dsp_opc.hex_andfc");
-	}
-
 	u8 reg  = (opc.hex >> 8) & 0x1;
 	u16 imm = dsp_fetch_code();
 	u16 val = dsp_get_acc_m(reg);
@@ -670,7 +683,6 @@ void andfc(const UDSPInstruction& opc)
 	}
 }
 
-// FIXME inside
 // Hermes switched andf and andcf, so check to make sure they are still correct
 
 // ANDF $acD.m, #I
@@ -685,12 +697,6 @@ void andf(const UDSPInstruction& opc)
 	u16 imm;
 	u16 val;
 
-	if (opc.hex & 0xf)
-	{
-		// FIXME: Implement
-		ERROR_LOG(DSPLLE, "dsp andf opcode");
-	}
-
 	reg = 0x1e + ((opc.hex >> 8) & 0x1);
 	imm = dsp_fetch_code();
 	val = g_dsp.r[reg];
@@ -717,15 +723,8 @@ void cmpi(const UDSPInstruction& opc)
 	Update_SR_Register64(res);
 }
 
-// FIXME inside
 void xori(const UDSPInstruction& opc)
 {
-	if (opc.hex & 0xf)
-	{
-		// FIXME: Implement
-		ERROR_LOG(DSPLLE, "dsp xori opcode");
-	}
-
 	u8 reg  = 0x1e + ((opc.hex >> 8) & 0x1);
 	u16 imm = dsp_fetch_code();
 	g_dsp.r[reg] ^= imm;
@@ -733,19 +732,12 @@ void xori(const UDSPInstruction& opc)
 	Update_SR_Register16((s16)g_dsp.r[reg]);
 }
 
-//FIXME inside
 // ANDI $acD.m, #I
 // 0000 001r 0100 0000
 // iiii iiii iiii iiii
 // Logic AND of accumulator mid part $acD.m with immediate value I.
 void andi(const UDSPInstruction& opc)
 {
-	if (opc.hex & 0xf)
-	{
-		// FIXME: Implement
-		ERROR_LOG(DSPLLE, "dsp andi opcode");
-	}
-
 	u8 reg  = 0x1e + ((opc.hex >> 8) & 0x1);
 	u16 imm = dsp_fetch_code();
 	g_dsp.r[reg] &= imm;
@@ -755,17 +747,8 @@ void andi(const UDSPInstruction& opc)
 
 
 // F|RES: i am not sure if this shouldnt be the whole ACC
-//
-//FIXME inside
 void ori(const UDSPInstruction& opc)
 {
-	if (opc.hex & 0xf)
-	{
-		// FIXME: Implement
-		ERROR_LOG(DSPLLE, "dsp ori opcode");
-		return;
-	}
-
 	u8 reg  = 0x1e + ((opc.hex >> 8) & 0x1);
 	u16 imm = dsp_fetch_code();
 	g_dsp.r[reg] |= imm;
@@ -1108,7 +1091,7 @@ void lsr(const UDSPInstruction& opc)
 	u16 shift = -opc.ushift;
 	u64 acc = dsp_get_long_acc(opc.areg);
 	// Lop off the extraneous sign extension our 64-bit fake accum causes
-	acc &= 0x000000FFFFFFFFFF;
+	acc &= 0x000000FFFFFFFFFFULL;
 	acc >>= shift;
 	dsp_set_long_acc(opc.areg, (s64)acc);
 

Source/Plugins/Plugin_DSP_LLE-testing/Src/DSPInterpreter.h

@@ -118,17 +118,20 @@ void srs(const UDSPInstruction& opc);
 void lrs(const UDSPInstruction& opc);
 void nx(const UDSPInstruction& opc);
 void cmpi(const UDSPInstruction& opc);
-
-// FIXME inside
 void rti(const UDSPInstruction& opc);
 void ilrr(const UDSPInstruction& opc);
-void srbith(const UDSPInstruction& opc);
+void ilrrd(const UDSPInstruction& opc);
-
+void ilrri(const UDSPInstruction& opc);
+void ilrrn(const UDSPInstruction& opc);
 void andfc(const UDSPInstruction& opc);
 void andf(const UDSPInstruction& opc);
 void xori(const UDSPInstruction& opc);
 void andi(const UDSPInstruction& opc);
 void ori(const UDSPInstruction& opc);
+
+// FIXME inside
+void srbith(const UDSPInstruction& opc);
+
 // END OF FIXMEs
 
 // TODO: PENDING IMPLEMENTATION / UNIMPLEMENTED

Source/Plugins/Plugin_DSP_LLE-testing/Src/DSPTables.cpp

@@ -181,8 +181,9 @@ DSPOPCTemplate opcodes[] =
 	{"CMPI",    0x0280, 0xfeff, DSPInterpreter::cmpi, nop, 2, 2, {{P_ACC, 1, 0, 8, 0x0100}, {P_IMM, 2, 1, 0, 0xffff}}, NULL, NULL},
 
 	{"ILRR",    0x0210, 0xfedc, DSPInterpreter::ilrr, nop, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_PRG, 1, 0, 0, 0x0003}}, NULL, NULL},
-	{"ILRRD",	0x0214, 0xfedc, DSPInterpreter::ilrr, nop, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_PRG, 1, 0, 0, 0x0003}}, NULL, NULL}, // Hermes doesn't list this
+	{"ILRRD",	0x0214, 0xfedc, DSPInterpreter::ilrrd, nop, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_PRG, 1, 0, 0, 0x0003}}, NULL, NULL}, // Hermes doesn't list this
-	{"ILRRI",   0x0218, 0xfedc, DSPInterpreter::ilrr, nop, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_PRG, 1, 0, 0, 0x0003}}, NULL, NULL},
+	{"ILRRI",   0x0218, 0xfedc, DSPInterpreter::ilrri, nop, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_PRG, 1, 0, 0, 0x0003}}, NULL, NULL},
+	{"ILRRN",   0x0218, 0xfedc, DSPInterpreter::ilrrn, nop, 1, 2, {{P_ACCM, 1, 0, 8, 0x0100}, {P_PRG, 1, 0, 0, 0x0003}}, NULL, NULL},
 
 	// load and store value pointed by indexing reg and increment; LRR/SRR variants
 	{"LRR",		0x1800, 0xff80, DSPInterpreter::lrr, nop, 1, 2, {{P_REG, 1, 0, 0, 0x001f}, {P_PRG, 1, 0, 5, 0x0060}}, NULL, NULL},