Merge pull request #1892 from magumagu/backpatch-padding
JIT: Fix the return pointer for backpatched operations.
This commit is contained in:
commit
a2d98ced67
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@ -81,6 +81,10 @@ bool Jitx86Base::BackPatch(u32 emAddress, SContext* ctx)
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exceptionHandler = it2->second;
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exceptionHandler = it2->second;
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}
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}
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// Compute the start and length of the memory operation, including
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// any byteswapping.
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int totalSize;
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u8 *start = codePtr;
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if (!info.isMemoryWrite)
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if (!info.isMemoryWrite)
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{
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{
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int bswapNopCount;
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int bswapNopCount;
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@ -92,7 +96,7 @@ bool Jitx86Base::BackPatch(u32 emAddress, SContext* ctx)
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else
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else
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bswapNopCount = 2;
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bswapNopCount = 2;
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int totalSize = info.instructionSize + bswapNopCount;
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totalSize = info.instructionSize + bswapNopCount;
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if (info.operandSize == 2 && !info.byteSwap)
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if (info.operandSize == 2 && !info.byteSwap)
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{
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{
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if ((codePtr[totalSize] & 0xF0) == 0x40)
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if ((codePtr[totalSize] & 0xF0) == 0x40)
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@ -107,35 +111,13 @@ bool Jitx86Base::BackPatch(u32 emAddress, SContext* ctx)
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info.signExtend = (codePtr[totalSize + 1] & 0x10) != 0;
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info.signExtend = (codePtr[totalSize + 1] & 0x10) != 0;
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totalSize += 3;
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totalSize += 3;
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}
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}
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XEmitter emitter(codePtr);
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int padding = totalSize - BACKPATCH_SIZE;
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u8* returnPtr = codePtr + 5 + padding;
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const u8* trampoline = trampolines.GenerateReadTrampoline(info, registersInUse, exceptionHandler, returnPtr);
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emitter.JMP(trampoline, true);
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if (padding > 0)
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{
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emitter.NOP(padding);
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}
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ctx->CTX_PC = (u64)codePtr;
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}
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}
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else
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else
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{
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{
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// TODO: special case FIFO writes. Also, support 32-bit mode.
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auto it3 = pcAtLoc.find(codePtr);
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if (it3 == pcAtLoc.end())
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{
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PanicAlert("BackPatch: no pc entry for address %p", codePtr);
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return nullptr;
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}
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u32 pc = it3->second;
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u8 *start;
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if (info.byteSwap || info.hasImmediate)
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if (info.byteSwap || info.hasImmediate)
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{
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{
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// The instruction is a MOVBE but it failed so the value is still in little-endian byte order.
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// The instruction is a MOVBE but it failed so the value is still in little-endian byte order.
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start = codePtr;
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totalSize = info.instructionSize;
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}
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}
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else
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else
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{
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{
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@ -161,18 +143,45 @@ bool Jitx86Base::BackPatch(u32 emAddress, SContext* ctx)
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break;
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break;
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}
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}
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start = codePtr - bswapSize;
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start = codePtr - bswapSize;
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totalSize = info.instructionSize + bswapSize;
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}
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}
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XEmitter emitter(start);
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ptrdiff_t padding = (codePtr - (start + 5)) + info.instructionSize;
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u8* returnPtr = start + 5 + padding;
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const u8* trampoline = trampolines.GenerateWriteTrampoline(info, registersInUse, exceptionHandler, returnPtr, pc);
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emitter.JMP(trampoline, true);
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if (padding > 0)
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{
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emitter.NOP(padding);
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}
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ctx->CTX_PC = (u64)start;
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}
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}
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// In the trampoline code, we jump back into the block at the beginning
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// of the next instruction. The next instruction comes immediately
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// after the backpatched operation, or BACKPATCH_SIZE bytes after the start
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// of the backpatched operation, whichever comes last. (The JIT inserts NOPs
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// into the original code if necessary to ensure there is enough space
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// to insert the backpatch jump.)
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int padding = totalSize > BACKPATCH_SIZE ? totalSize - BACKPATCH_SIZE : 0;
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u8* returnPtr = start + 5 + padding;
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// Generate the trampoline.
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const u8* trampoline;
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if (info.isMemoryWrite)
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{
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// TODO: special case FIFO writes.
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auto it3 = pcAtLoc.find(codePtr);
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if (it3 == pcAtLoc.end())
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{
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PanicAlert("BackPatch: no pc entry for address %p", codePtr);
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return nullptr;
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}
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u32 pc = it3->second;
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trampoline = trampolines.GenerateWriteTrampoline(info, registersInUse, exceptionHandler, returnPtr, pc);
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}
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else
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{
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trampoline = trampolines.GenerateReadTrampoline(info, registersInUse, exceptionHandler, returnPtr);
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}
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// Patch the original memory operation.
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XEmitter emitter(start);
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emitter.JMP(trampoline, true);
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for (int i = 0; i < padding; ++i)
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emitter.INT3();
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ctx->CTX_PC = (u64)start;
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return true;
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return true;
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}
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}
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