Merge pull request #4593 from lioncash/enum
JitRegCache: Move FlushMode enum into RegCache
This commit is contained in:
commit
9f164d7c33
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@ -760,8 +760,8 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer* code_buf, JitBloc
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ProcessorInterface::INT_CAUSE_PE_FINISH));
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ProcessorInterface::INT_CAUSE_PE_FINISH));
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FixupBranch noCPInt = J_CC(CC_Z, true);
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FixupBranch noCPInt = J_CC(CC_Z, true);
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gpr.Flush(FLUSH_MAINTAIN_STATE);
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gpr.Flush(RegCache::FlushMode::MaintainState);
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fpr.Flush(FLUSH_MAINTAIN_STATE);
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fpr.Flush(RegCache::FlushMode::MaintainState);
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MOV(32, PPCSTATE(pc), Imm32(ops[i].address));
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MOV(32, PPCSTATE(pc), Imm32(ops[i].address));
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WriteExternalExceptionExit();
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WriteExternalExceptionExit();
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@ -802,8 +802,8 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer* code_buf, JitBloc
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SwitchToFarCode();
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SwitchToFarCode();
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SetJumpTarget(b1);
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SetJumpTarget(b1);
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gpr.Flush(FLUSH_MAINTAIN_STATE);
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gpr.Flush(RegCache::FlushMode::MaintainState);
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fpr.Flush(FLUSH_MAINTAIN_STATE);
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fpr.Flush(RegCache::FlushMode::MaintainState);
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// If a FPU exception occurs, the exception handler will read
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// If a FPU exception occurs, the exception handler will read
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// from PC. Update PC with the latest value in case that happens.
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// from PC. Update PC with the latest value in case that happens.
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@ -891,8 +891,8 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer* code_buf, JitBloc
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gprToFlush[js.revertGprLoad] = false;
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gprToFlush[js.revertGprLoad] = false;
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if (js.revertFprLoad >= 0)
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if (js.revertFprLoad >= 0)
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fprToFlush[js.revertFprLoad] = false;
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fprToFlush[js.revertFprLoad] = false;
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gpr.Flush(FLUSH_MAINTAIN_STATE, gprToFlush);
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gpr.Flush(RegCache::FlushMode::MaintainState, gprToFlush);
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fpr.Flush(FLUSH_MAINTAIN_STATE, fprToFlush);
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fpr.Flush(RegCache::FlushMode::MaintainState, fprToFlush);
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// If a memory exception occurs, the exception handler will read
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// If a memory exception occurs, the exception handler will read
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// from PC. Update PC with the latest value in case that happens.
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// from PC. Update PC with the latest value in case that happens.
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@ -213,7 +213,7 @@ void RegCache::StoreFromRegister(size_t i, FlushMode mode)
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{
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{
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X64Reg xr = RX(i);
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X64Reg xr = RX(i);
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doStore = m_xregs[xr].dirty;
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doStore = m_xregs[xr].dirty;
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if (mode == FLUSH_ALL)
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if (mode == FlushMode::All)
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{
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{
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m_xregs[xr].free = true;
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m_xregs[xr].free = true;
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m_xregs[xr].ppcReg = INVALID_REG;
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m_xregs[xr].ppcReg = INVALID_REG;
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@ -228,7 +228,7 @@ void RegCache::StoreFromRegister(size_t i, FlushMode mode)
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OpArg newLoc = GetDefaultLocation(i);
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OpArg newLoc = GetDefaultLocation(i);
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if (doStore)
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if (doStore)
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StoreRegister(i, newLoc);
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StoreRegister(i, newLoc);
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if (mode == FLUSH_ALL)
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if (mode == FlushMode::All)
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{
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{
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m_regs[i].location = newLoc;
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m_regs[i].location = newLoc;
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m_regs[i].away = false;
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m_regs[i].away = false;
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@ -12,12 +12,6 @@
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class Jit64;
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class Jit64;
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enum FlushMode
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{
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FLUSH_ALL,
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FLUSH_MAINTAIN_STATE,
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};
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struct PPCCachedReg
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struct PPCCachedReg
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{
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{
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Gen::OpArg location;
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Gen::OpArg location;
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@ -36,6 +30,12 @@ struct X64CachedReg
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class RegCache
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class RegCache
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{
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{
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public:
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public:
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enum class FlushMode
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{
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All,
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MaintainState,
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};
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static constexpr size_t NUM_XREGS = 16;
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static constexpr size_t NUM_XREGS = 16;
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explicit RegCache(Jit64& jit);
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explicit RegCache(Jit64& jit);
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@ -50,7 +50,7 @@ public:
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void DiscardRegContentsIfCached(size_t preg);
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void DiscardRegContentsIfCached(size_t preg);
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void SetEmitter(Gen::XEmitter* emitter);
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void SetEmitter(Gen::XEmitter* emitter);
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void Flush(FlushMode mode = FLUSH_ALL, BitSet32 regsToFlush = BitSet32::AllTrue(32));
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void Flush(FlushMode mode = FlushMode::All, BitSet32 regsToFlush = BitSet32::AllTrue(32));
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void FlushR(Gen::X64Reg reg);
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void FlushR(Gen::X64Reg reg);
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void FlushR(Gen::X64Reg reg, Gen::X64Reg reg2);
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void FlushR(Gen::X64Reg reg, Gen::X64Reg reg2);
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@ -64,7 +64,7 @@ public:
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// TODO - instead of doload, use "read", "write"
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// TODO - instead of doload, use "read", "write"
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// read only will not set dirty flag
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// read only will not set dirty flag
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void BindToRegister(size_t preg, bool doLoad = true, bool makeDirty = true);
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void BindToRegister(size_t preg, bool doLoad = true, bool makeDirty = true);
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void StoreFromRegister(size_t preg, FlushMode mode = FLUSH_ALL);
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void StoreFromRegister(size_t preg, FlushMode mode = FlushMode::All);
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const Gen::OpArg& R(size_t preg) const;
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const Gen::OpArg& R(size_t preg) const;
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Gen::X64Reg RX(size_t preg) const;
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Gen::X64Reg RX(size_t preg) const;
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@ -137,8 +137,8 @@ void Jit64::bcx(UGeckoInstruction inst)
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else
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else
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destination = js.compilerPC + SignExt16(inst.BD << 2);
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destination = js.compilerPC + SignExt16(inst.BD << 2);
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gpr.Flush(FLUSH_MAINTAIN_STATE);
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gpr.Flush(RegCache::FlushMode::MaintainState);
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fpr.Flush(FLUSH_MAINTAIN_STATE);
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fpr.Flush(RegCache::FlushMode::MaintainState);
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WriteExit(destination, inst.LK, js.compilerPC + 4);
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WriteExit(destination, inst.LK, js.compilerPC + 4);
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if ((inst.BO & BO_DONT_CHECK_CONDITION) == 0)
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if ((inst.BO & BO_DONT_CHECK_CONDITION) == 0)
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@ -192,8 +192,8 @@ void Jit64::bcctrx(UGeckoInstruction inst)
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if (inst.LK_3)
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if (inst.LK_3)
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MOV(32, PPCSTATE_LR, Imm32(js.compilerPC + 4)); // LR = PC + 4;
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MOV(32, PPCSTATE_LR, Imm32(js.compilerPC + 4)); // LR = PC + 4;
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gpr.Flush(FLUSH_MAINTAIN_STATE);
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gpr.Flush(RegCache::FlushMode::MaintainState);
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fpr.Flush(FLUSH_MAINTAIN_STATE);
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fpr.Flush(RegCache::FlushMode::MaintainState);
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WriteExitDestInRSCRATCH(inst.LK_3, js.compilerPC + 4);
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WriteExitDestInRSCRATCH(inst.LK_3, js.compilerPC + 4);
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// Would really like to continue the block here, but it ends. TODO.
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// Would really like to continue the block here, but it ends. TODO.
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SetJumpTarget(b);
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SetJumpTarget(b);
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@ -246,8 +246,8 @@ void Jit64::bclrx(UGeckoInstruction inst)
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if (inst.LK)
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if (inst.LK)
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MOV(32, PPCSTATE_LR, Imm32(js.compilerPC + 4));
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MOV(32, PPCSTATE_LR, Imm32(js.compilerPC + 4));
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gpr.Flush(FLUSH_MAINTAIN_STATE);
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gpr.Flush(RegCache::FlushMode::MaintainState);
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fpr.Flush(FLUSH_MAINTAIN_STATE);
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fpr.Flush(RegCache::FlushMode::MaintainState);
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WriteBLRExit();
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WriteBLRExit();
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if ((inst.BO & BO_DONT_CHECK_CONDITION) == 0)
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if ((inst.BO & BO_DONT_CHECK_CONDITION) == 0)
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@ -187,7 +187,7 @@ OpArg Jit64::ExtractFromReg(int reg, int offset)
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// store to load forwarding should handle this case efficiently
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// store to load forwarding should handle this case efficiently
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if (offset)
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if (offset)
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{
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{
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gpr.StoreFromRegister(reg, FLUSH_MAINTAIN_STATE);
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gpr.StoreFromRegister(reg, RegCache::FlushMode::MaintainState);
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src = gpr.GetDefaultLocation(reg);
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src = gpr.GetDefaultLocation(reg);
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src.AddMemOffset(offset);
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src.AddMemOffset(offset);
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}
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}
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@ -415,8 +415,8 @@ void Jit64::DoMergedBranchCondition()
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else // SO bit, do not branch (we don't emulate SO for cmp).
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else // SO bit, do not branch (we don't emulate SO for cmp).
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pDontBranch = J(true);
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pDontBranch = J(true);
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gpr.Flush(FLUSH_MAINTAIN_STATE);
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gpr.Flush(RegCache::FlushMode::MaintainState);
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fpr.Flush(FLUSH_MAINTAIN_STATE);
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fpr.Flush(RegCache::FlushMode::MaintainState);
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DoMergedBranch();
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DoMergedBranch();
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@ -1907,8 +1907,8 @@ void Jit64::twX(UGeckoInstruction inst)
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LOCK();
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LOCK();
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OR(32, PPCSTATE(Exceptions), Imm32(EXCEPTION_PROGRAM));
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OR(32, PPCSTATE(Exceptions), Imm32(EXCEPTION_PROGRAM));
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gpr.Flush(FLUSH_MAINTAIN_STATE);
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gpr.Flush(RegCache::FlushMode::MaintainState);
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fpr.Flush(FLUSH_MAINTAIN_STATE);
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fpr.Flush(RegCache::FlushMode::MaintainState);
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WriteExceptionExit();
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WriteExceptionExit();
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