From 9eaf20cc44dac19517dd9a2de1fcdb0d9da523e8 Mon Sep 17 00:00:00 2001 From: skidau Date: Sat, 5 Nov 2011 13:04:46 +1100 Subject: [PATCH] Fixed the slowdown that occurred under JIT32. Fixes issue 4969. --- Source/Core/Core/Src/HW/MemmapFunctions.cpp | 3 --- Source/Core/Core/Src/PowerPC/PPCCache.cpp | 6 ------ Source/Core/Core/Src/PowerPC/PPCCache.h | 1 - 3 files changed, 10 deletions(-) diff --git a/Source/Core/Core/Src/HW/MemmapFunctions.cpp b/Source/Core/Core/Src/HW/MemmapFunctions.cpp index 7e3f78616d..b391eea975 100644 --- a/Source/Core/Core/Src/HW/MemmapFunctions.cpp +++ b/Source/Core/Core/Src/HW/MemmapFunctions.cpp @@ -265,7 +265,6 @@ inline void WriteToHardware(u32 em_address, const T data, u32 effective_address, ((em_address & 0xF0000000) == 0xC0000000) || ((em_address & 0xF0000000) == 0x00000000)) { - PowerPC::ppcState.iCache.InvalidateBlock(em_address); *(T*)&m_pRAM[em_address & RAM_MASK] = bswap(data); return; } @@ -273,7 +272,6 @@ inline void WriteToHardware(u32 em_address, const T data, u32 effective_address, ((em_address & 0xF0000000) == 0xD0000000) || ((em_address & 0xF0000000) == 0x10000000)) { - PowerPC::ppcState.iCache.InvalidateBlock(em_address); *(T*)&m_pEXRAM[em_address & EXRAM_MASK] = bswap(data); return; } @@ -286,7 +284,6 @@ inline void WriteToHardware(u32 em_address, const T data, u32 effective_address, (bFakeVMEM && ((em_address &0xF0000000) == 0x40000000))) { // fake VMEM - PowerPC::ppcState.iCache.InvalidateBlock(em_address); *(T*)&m_pFakeVMEM[em_address & FAKEVMEM_MASK] = bswap(data); } else diff --git a/Source/Core/Core/Src/PowerPC/PPCCache.cpp b/Source/Core/Core/Src/PowerPC/PPCCache.cpp index 7e45c9e1ab..af40568813 100644 --- a/Source/Core/Core/Src/PowerPC/PPCCache.cpp +++ b/Source/Core/Core/Src/PowerPC/PPCCache.cpp @@ -103,12 +103,6 @@ namespace PowerPC jit->GetBlockCache()->InvalidateICache(addr); } - void InstructionCache::InvalidateBlock(u32 addr) - { - if (jit) - jit->GetBlockCache()->InvalidateICache(addr); - } - u32 InstructionCache::ReadInstruction(u32 addr) { if (!HID0.ICE) // instruction cache is disabled diff --git a/Source/Core/Core/Src/PowerPC/PPCCache.h b/Source/Core/Core/Src/PowerPC/PPCCache.h index 76e1f47345..c2e428946c 100644 --- a/Source/Core/Core/Src/PowerPC/PPCCache.h +++ b/Source/Core/Core/Src/PowerPC/PPCCache.h @@ -53,7 +53,6 @@ namespace PowerPC void Reset(); u32 ReadInstruction(u32 addr); void Invalidate(u32 addr); - void InvalidateBlock(u32 addr); }; }