Merge pull request #7141 from lioncash/fp
Interpreter_FPUtils: Handle the FPSCR.ZE and FPSCR.VE flags with arithmetic instructions
This commit is contained in:
Mat M
GitHub
commit
9ea3e833ba
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@ -97,206 +97,280 @@ inline double MakeQuiet(double d)
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// these functions allow globally modify operations behaviour
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// also, these may be used to set flags like FR, FI, OX, UX
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inline double NI_mul(double a, double b)
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struct FPResult
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{
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const double t = a * b;
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if (std::isnan(t))
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bool HasNoInvalidExceptions() const { return (exception & FPSCR_VX_ANY) == 0; }
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void SetException(FPSCRExceptionFlag flag)
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{
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exception = flag;
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SetFPException(flag);
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}
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double value = 0.0;
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FPSCRExceptionFlag exception{};
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};
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inline FPResult NI_mul(double a, double b)
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{
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FPResult result{a * b};
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if (std::isnan(result.value))
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{
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if (Common::IsSNAN(a) || Common::IsSNAN(b))
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SetFPException(FPSCR_VXSNAN);
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{
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result.SetException(FPSCR_VXSNAN);
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}
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FPSCR.ClearFIFR();
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if (std::isnan(a))
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return MakeQuiet(a);
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{
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result.value = MakeQuiet(a);
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return result;
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}
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if (std::isnan(b))
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return MakeQuiet(b);
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{
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result.value = MakeQuiet(b);
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return result;
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}
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SetFPException(FPSCR_VXIMZ);
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return PPC_NAN;
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result.value = PPC_NAN;
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result.SetException(FPSCR_VXIMZ);
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return result;
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}
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return t;
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return result;
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}
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inline double NI_div(double a, double b)
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inline FPResult NI_div(double a, double b)
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{
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const double t = a / b;
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FPResult result{a / b};
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if (std::isnan(t))
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if (std::isnan(result.value))
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{
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if (Common::IsSNAN(a) || Common::IsSNAN(b))
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SetFPException(FPSCR_VXSNAN);
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result.SetException(FPSCR_VXSNAN);
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FPSCR.ClearFIFR();
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if (std::isnan(a))
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return MakeQuiet(a);
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{
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result.value = MakeQuiet(a);
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return result;
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}
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if (std::isnan(b))
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return MakeQuiet(b);
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{
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result.value = MakeQuiet(b);
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return result;
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}
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if (b == 0.0)
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{
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if (a == 0.0)
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{
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SetFPException(FPSCR_VXZDZ);
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result.SetException(FPSCR_VXZDZ);
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}
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else
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{
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SetFPException(FPSCR_ZX);
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result.SetException(FPSCR_ZX);
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}
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}
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else if (std::isinf(a) && std::isinf(b))
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{
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SetFPException(FPSCR_VXIDI);
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result.SetException(FPSCR_VXIDI);
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}
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return PPC_NAN;
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result.value = PPC_NAN;
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return result;
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}
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return t;
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return result;
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}
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inline double NI_add(double a, double b)
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inline FPResult NI_add(double a, double b)
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{
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const double t = a + b;
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FPResult result{a + b};
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if (std::isnan(t))
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if (std::isnan(result.value))
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{
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if (Common::IsSNAN(a) || Common::IsSNAN(b))
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SetFPException(FPSCR_VXSNAN);
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result.SetException(FPSCR_VXSNAN);
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FPSCR.ClearFIFR();
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if (std::isnan(a))
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return MakeQuiet(a);
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{
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result.value = MakeQuiet(a);
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return result;
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}
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if (std::isnan(b))
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return MakeQuiet(b);
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{
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result.value = MakeQuiet(b);
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return result;
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}
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SetFPException(FPSCR_VXISI);
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return PPC_NAN;
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result.SetException(FPSCR_VXISI);
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result.value = PPC_NAN;
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return result;
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}
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if (std::isinf(a) || std::isinf(b))
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FPSCR.ClearFIFR();
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return t;
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return result;
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}
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inline double NI_sub(double a, double b)
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inline FPResult NI_sub(double a, double b)
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{
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const double t = a - b;
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FPResult result{a - b};
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if (std::isnan(t))
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if (std::isnan(result.value))
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{
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if (Common::IsSNAN(a) || Common::IsSNAN(b))
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SetFPException(FPSCR_VXSNAN);
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result.SetException(FPSCR_VXSNAN);
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FPSCR.ClearFIFR();
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if (std::isnan(a))
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return MakeQuiet(a);
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{
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result.value = MakeQuiet(a);
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return result;
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}
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if (std::isnan(b))
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return MakeQuiet(b);
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{
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result.value = MakeQuiet(b);
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return result;
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}
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SetFPException(FPSCR_VXISI);
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return PPC_NAN;
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result.SetException(FPSCR_VXISI);
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result.value = PPC_NAN;
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return result;
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}
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if (std::isinf(a) || std::isinf(b))
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FPSCR.ClearFIFR();
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return t;
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return result;
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}
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// FMA instructions on PowerPC are weird:
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// They calculate (a * c) + b, but the order in which
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// inputs are checked for NaN is still a, b, c.
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inline double NI_madd(double a, double c, double b)
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inline FPResult NI_madd(double a, double c, double b)
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{
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double t = a * c;
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FPResult result{a * c};
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if (std::isnan(t))
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if (std::isnan(result.value))
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{
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if (Common::IsSNAN(a) || Common::IsSNAN(b) || Common::IsSNAN(c))
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SetFPException(FPSCR_VXSNAN);
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result.SetException(FPSCR_VXSNAN);
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FPSCR.ClearFIFR();
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if (std::isnan(a))
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return MakeQuiet(a);
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{
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result.value = MakeQuiet(a);
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return result;
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}
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if (std::isnan(b))
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return MakeQuiet(b); // !
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{
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result.value = MakeQuiet(b); // !
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return result;
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}
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if (std::isnan(c))
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return MakeQuiet(c);
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{
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result.value = MakeQuiet(c);
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return result;
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}
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SetFPException(FPSCR_VXIMZ);
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return PPC_NAN;
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result.SetException(FPSCR_VXIMZ);
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result.value = PPC_NAN;
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return result;
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}
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t += b;
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result.value += b;
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if (std::isnan(t))
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if (std::isnan(result.value))
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{
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if (Common::IsSNAN(b))
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SetFPException(FPSCR_VXSNAN);
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result.SetException(FPSCR_VXSNAN);
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FPSCR.ClearFIFR();
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if (std::isnan(b))
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return MakeQuiet(b);
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{
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result.value = MakeQuiet(b);
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return result;
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}
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SetFPException(FPSCR_VXISI);
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return PPC_NAN;
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result.SetException(FPSCR_VXISI);
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result.value = PPC_NAN;
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return result;
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}
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if (std::isinf(a) || std::isinf(b) || std::isinf(c))
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FPSCR.ClearFIFR();
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return t;
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return result;
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}
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inline double NI_msub(double a, double c, double b)
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inline FPResult NI_msub(double a, double c, double b)
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{
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double t = a * c;
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FPResult result{a * c};
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if (std::isnan(t))
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if (std::isnan(result.value))
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{
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if (Common::IsSNAN(a) || Common::IsSNAN(b) || Common::IsSNAN(c))
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SetFPException(FPSCR_VXSNAN);
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result.SetException(FPSCR_VXSNAN);
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FPSCR.ClearFIFR();
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if (std::isnan(a))
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return MakeQuiet(a);
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{
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result.value = MakeQuiet(a);
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return result;
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}
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if (std::isnan(b))
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return MakeQuiet(b); // !
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{
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result.value = MakeQuiet(b); // !
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return result;
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}
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if (std::isnan(c))
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return MakeQuiet(c);
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{
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result.value = MakeQuiet(c);
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return result;
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}
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SetFPException(FPSCR_VXIMZ);
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return PPC_NAN;
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result.SetException(FPSCR_VXIMZ);
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result.value = PPC_NAN;
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return result;
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}
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t -= b;
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result.value -= b;
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if (std::isnan(t))
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if (std::isnan(result.value))
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{
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if (Common::IsSNAN(b))
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SetFPException(FPSCR_VXSNAN);
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result.SetException(FPSCR_VXSNAN);
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FPSCR.ClearFIFR();
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if (std::isnan(b))
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return MakeQuiet(b);
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{
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result.value = MakeQuiet(b);
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return result;
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}
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SetFPException(FPSCR_VXISI);
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return PPC_NAN;
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result.SetException(FPSCR_VXISI);
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result.value = PPC_NAN;
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return result;
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}
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if (std::isinf(a) || std::isinf(b) || std::isinf(c))
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FPSCR.ClearFIFR();
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return t;
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return result;
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}
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// used by stfsXX instructions and ps_rsqrte
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@ -300,23 +300,35 @@ void Interpreter::frspx(UGeckoInstruction inst) // round to single
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void Interpreter::fmulx(UGeckoInstruction inst)
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{
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rPS0(inst.FD) = ForceDouble(NI_mul(rPS0(inst.FA), rPS0(inst.FC)));
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FPSCR.FI = 0; // are these flags important?
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FPSCR.FR = 0;
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PowerPC::UpdateFPRF(rPS0(inst.FD));
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const FPResult product = NI_mul(rPS0(inst.FA), rPS0(inst.FC));
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if (FPSCR.VE == 0 || product.HasNoInvalidExceptions())
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{
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const double result = ForceDouble(product.value);
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rPS0(inst.FD) = result;
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FPSCR.FI = 0; // are these flags important?
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FPSCR.FR = 0;
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PowerPC::UpdateFPRF(result);
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}
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if (inst.Rc)
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Helper_UpdateCR1();
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}
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void Interpreter::fmulsx(UGeckoInstruction inst)
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{
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double c_value = Force25Bit(rPS0(inst.FC));
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double d_value = NI_mul(rPS0(inst.FA), c_value);
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rPS0(inst.FD) = rPS1(inst.FD) = ForceSingle(d_value);
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// FPSCR.FI = d_value != rPS0(_inst.FD);
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FPSCR.FI = 0;
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FPSCR.FR = 0;
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PowerPC::UpdateFPRF(rPS0(inst.FD));
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const double c_value = Force25Bit(rPS0(inst.FC));
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const FPResult d_value = NI_mul(rPS0(inst.FA), c_value);
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if (FPSCR.VE == 0 || d_value.HasNoInvalidExceptions())
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{
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const double result = ForceSingle(d_value.value);
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rPS0(inst.FD) = rPS1(inst.FD) = result;
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FPSCR.FI = 0;
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FPSCR.FR = 0;
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PowerPC::UpdateFPRF(result);
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}
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if (inst.Rc)
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Helper_UpdateCR1();
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@ -324,9 +336,14 @@ void Interpreter::fmulsx(UGeckoInstruction inst)
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void Interpreter::fmaddx(UGeckoInstruction inst)
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{
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double result = ForceDouble(NI_madd(rPS0(inst.FA), rPS0(inst.FC), rPS0(inst.FB)));
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rPS0(inst.FD) = result;
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PowerPC::UpdateFPRF(result);
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const FPResult product = NI_madd(rPS0(inst.FA), rPS0(inst.FC), rPS0(inst.FB));
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if (FPSCR.VE == 0 || product.HasNoInvalidExceptions())
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{
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const double result = ForceDouble(product.value);
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rPS0(inst.FD) = result;
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PowerPC::UpdateFPRF(result);
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}
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if (inst.Rc)
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Helper_UpdateCR1();
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@ -334,12 +351,18 @@ void Interpreter::fmaddx(UGeckoInstruction inst)
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void Interpreter::fmaddsx(UGeckoInstruction inst)
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{
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double c_value = Force25Bit(rPS0(inst.FC));
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double d_value = NI_madd(rPS0(inst.FA), c_value, rPS0(inst.FB));
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rPS0(inst.FD) = rPS1(inst.FD) = ForceSingle(d_value);
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FPSCR.FI = d_value != rPS0(inst.FD);
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FPSCR.FR = 0;
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PowerPC::UpdateFPRF(rPS0(inst.FD));
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const double c_value = Force25Bit(rPS0(inst.FC));
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const FPResult d_value = NI_madd(rPS0(inst.FA), c_value, rPS0(inst.FB));
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if (FPSCR.VE == 0 || d_value.HasNoInvalidExceptions())
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{
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const double result = ForceSingle(d_value.value);
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rPS0(inst.FD) = rPS1(inst.FD) = result;
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FPSCR.FI = d_value.value != result;
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FPSCR.FR = 0;
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PowerPC::UpdateFPRF(result);
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}
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if (inst.Rc)
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Helper_UpdateCR1();
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@ -347,16 +370,28 @@ void Interpreter::fmaddsx(UGeckoInstruction inst)
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void Interpreter::faddx(UGeckoInstruction inst)
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{
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rPS0(inst.FD) = ForceDouble(NI_add(rPS0(inst.FA), rPS0(inst.FB)));
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PowerPC::UpdateFPRF(rPS0(inst.FD));
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const FPResult sum = NI_add(rPS0(inst.FA), rPS0(inst.FB));
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if (FPSCR.VE == 0 || sum.HasNoInvalidExceptions())
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{
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const double result = ForceDouble(sum.value);
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rPS0(inst.FD) = result;
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PowerPC::UpdateFPRF(result);
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}
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if (inst.Rc)
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Helper_UpdateCR1();
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}
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void Interpreter::faddsx(UGeckoInstruction inst)
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{
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rPS0(inst.FD) = rPS1(inst.FD) = ForceSingle(NI_add(rPS0(inst.FA), rPS0(inst.FB)));
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PowerPC::UpdateFPRF(rPS0(inst.FD));
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const FPResult sum = NI_add(rPS0(inst.FA), rPS0(inst.FB));
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if (FPSCR.VE == 0 || sum.HasNoInvalidExceptions())
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{
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const double result = ForceSingle(sum.value);
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rPS0(inst.FD) = rPS1(inst.FD) = result;
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PowerPC::UpdateFPRF(result);
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}
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if (inst.Rc)
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Helper_UpdateCR1();
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@ -364,8 +399,16 @@ void Interpreter::faddsx(UGeckoInstruction inst)
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void Interpreter::fdivx(UGeckoInstruction inst)
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{
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rPS0(inst.FD) = ForceDouble(NI_div(rPS0(inst.FA), rPS0(inst.FB)));
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PowerPC::UpdateFPRF(rPS0(inst.FD));
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const FPResult quotient = NI_div(rPS0(inst.FA), rPS0(inst.FB));
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const bool not_divide_by_zero = FPSCR.ZE == 0 || quotient.exception != FPSCR_ZX;
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const bool not_invalid = FPSCR.VE == 0 || quotient.HasNoInvalidExceptions();
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if (not_divide_by_zero && not_invalid)
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{
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const double result = ForceDouble(quotient.value);
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rPS0(inst.FD) = result;
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PowerPC::UpdateFPRF(result);
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}
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// FR,FI,OX,UX???
|
||||
if (inst.Rc)
|
||||
|
|
@ -373,8 +416,16 @@ void Interpreter::fdivx(UGeckoInstruction inst)
|
|||
}
|
||||
void Interpreter::fdivsx(UGeckoInstruction inst)
|
||||
{
|
||||
rPS0(inst.FD) = rPS1(inst.FD) = ForceSingle(NI_div(rPS0(inst.FA), rPS0(inst.FB)));
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
const FPResult quotient = NI_div(rPS0(inst.FA), rPS0(inst.FB));
|
||||
const bool not_divide_by_zero = FPSCR.ZE == 0 || quotient.exception != FPSCR_ZX;
|
||||
const bool not_invalid = FPSCR.VE == 0 || quotient.HasNoInvalidExceptions();
|
||||
|
||||
if (not_divide_by_zero && not_invalid)
|
||||
{
|
||||
const double result = ForceSingle(quotient.value);
|
||||
rPS0(inst.FD) = rPS1(inst.FD) = result;
|
||||
PowerPC::UpdateFPRF(result);
|
||||
}
|
||||
|
||||
if (inst.Rc)
|
||||
Helper_UpdateCR1();
|
||||
|
|
@ -465,20 +516,32 @@ void Interpreter::frsqrtex(UGeckoInstruction inst)
|
|||
Helper_UpdateCR1();
|
||||
}
|
||||
|
||||
void Interpreter::fmsubx(UGeckoInstruction _inst)
|
||||
void Interpreter::fmsubx(UGeckoInstruction inst)
|
||||
{
|
||||
rPS0(_inst.FD) = ForceDouble(NI_msub(rPS0(_inst.FA), rPS0(_inst.FC), rPS0(_inst.FB)));
|
||||
PowerPC::UpdateFPRF(rPS0(_inst.FD));
|
||||
const FPResult product = NI_msub(rPS0(inst.FA), rPS0(inst.FC), rPS0(inst.FB));
|
||||
|
||||
if (_inst.Rc)
|
||||
if (FPSCR.VE == 0 || product.HasNoInvalidExceptions())
|
||||
{
|
||||
const double result = ForceDouble(product.value);
|
||||
rPS0(inst.FD) = result;
|
||||
PowerPC::UpdateFPRF(result);
|
||||
}
|
||||
|
||||
if (inst.Rc)
|
||||
Helper_UpdateCR1();
|
||||
}
|
||||
|
||||
void Interpreter::fmsubsx(UGeckoInstruction inst)
|
||||
{
|
||||
double c_value = Force25Bit(rPS0(inst.FC));
|
||||
rPS0(inst.FD) = rPS1(inst.FD) = ForceSingle(NI_msub(rPS0(inst.FA), c_value, rPS0(inst.FB)));
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
const double c_value = Force25Bit(rPS0(inst.FC));
|
||||
const FPResult product = NI_msub(rPS0(inst.FA), c_value, rPS0(inst.FB));
|
||||
|
||||
if (FPSCR.VE == 0 || product.HasNoInvalidExceptions())
|
||||
{
|
||||
const double result = ForceSingle(product.value);
|
||||
rPS0(inst.FD) = rPS1(inst.FD) = result;
|
||||
PowerPC::UpdateFPRF(result);
|
||||
}
|
||||
|
||||
if (inst.Rc)
|
||||
Helper_UpdateCR1();
|
||||
|
|
@ -486,9 +549,14 @@ void Interpreter::fmsubsx(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::fnmaddx(UGeckoInstruction inst)
|
||||
{
|
||||
double result = ForceDouble(NI_madd(rPS0(inst.FA), rPS0(inst.FC), rPS0(inst.FB)));
|
||||
rPS0(inst.FD) = std::isnan(result) ? result : -result;
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
const FPResult product = NI_madd(rPS0(inst.FA), rPS0(inst.FC), rPS0(inst.FB));
|
||||
|
||||
if (FPSCR.VE == 0 || product.HasNoInvalidExceptions())
|
||||
{
|
||||
const double result = ForceDouble(product.value);
|
||||
rPS0(inst.FD) = std::isnan(result) ? result : -result;
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
}
|
||||
|
||||
if (inst.Rc)
|
||||
Helper_UpdateCR1();
|
||||
|
|
@ -496,10 +564,15 @@ void Interpreter::fnmaddx(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::fnmaddsx(UGeckoInstruction inst)
|
||||
{
|
||||
double c_value = Force25Bit(rPS0(inst.FC));
|
||||
double result = ForceSingle(NI_madd(rPS0(inst.FA), c_value, rPS0(inst.FB)));
|
||||
rPS0(inst.FD) = rPS1(inst.FD) = std::isnan(result) ? result : -result;
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
const double c_value = Force25Bit(rPS0(inst.FC));
|
||||
const FPResult product = NI_madd(rPS0(inst.FA), c_value, rPS0(inst.FB));
|
||||
|
||||
if (FPSCR.VE == 0 || product.HasNoInvalidExceptions())
|
||||
{
|
||||
const double result = ForceSingle(product.value);
|
||||
rPS0(inst.FD) = rPS1(inst.FD) = std::isnan(result) ? result : -result;
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
}
|
||||
|
||||
if (inst.Rc)
|
||||
Helper_UpdateCR1();
|
||||
|
|
@ -507,9 +580,14 @@ void Interpreter::fnmaddsx(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::fnmsubx(UGeckoInstruction inst)
|
||||
{
|
||||
double result = ForceDouble(NI_msub(rPS0(inst.FA), rPS0(inst.FC), rPS0(inst.FB)));
|
||||
rPS0(inst.FD) = std::isnan(result) ? result : -result;
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
const FPResult product = NI_msub(rPS0(inst.FA), rPS0(inst.FC), rPS0(inst.FB));
|
||||
|
||||
if (FPSCR.VE == 0 || product.HasNoInvalidExceptions())
|
||||
{
|
||||
const double result = ForceDouble(product.value);
|
||||
rPS0(inst.FD) = std::isnan(result) ? result : -result;
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
}
|
||||
|
||||
if (inst.Rc)
|
||||
Helper_UpdateCR1();
|
||||
|
|
@ -517,10 +595,15 @@ void Interpreter::fnmsubx(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::fnmsubsx(UGeckoInstruction inst)
|
||||
{
|
||||
double c_value = Force25Bit(rPS0(inst.FC));
|
||||
double result = ForceSingle(NI_msub(rPS0(inst.FA), c_value, rPS0(inst.FB)));
|
||||
rPS0(inst.FD) = rPS1(inst.FD) = std::isnan(result) ? result : -result;
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
const double c_value = Force25Bit(rPS0(inst.FC));
|
||||
const FPResult product = NI_msub(rPS0(inst.FA), c_value, rPS0(inst.FB));
|
||||
|
||||
if (FPSCR.VE == 0 || product.HasNoInvalidExceptions())
|
||||
{
|
||||
const double result = ForceSingle(product.value);
|
||||
rPS0(inst.FD) = rPS1(inst.FD) = std::isnan(result) ? result : -result;
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
}
|
||||
|
||||
if (inst.Rc)
|
||||
Helper_UpdateCR1();
|
||||
|
|
@ -528,8 +611,14 @@ void Interpreter::fnmsubsx(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::fsubx(UGeckoInstruction inst)
|
||||
{
|
||||
rPS0(inst.FD) = ForceDouble(NI_sub(rPS0(inst.FA), rPS0(inst.FB)));
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
const FPResult difference = NI_sub(rPS0(inst.FA), rPS0(inst.FB));
|
||||
|
||||
if (FPSCR.VE == 0 || difference.HasNoInvalidExceptions())
|
||||
{
|
||||
const double result = ForceDouble(difference.value);
|
||||
rPS0(inst.FD) = result;
|
||||
PowerPC::UpdateFPRF(result);
|
||||
}
|
||||
|
||||
if (inst.Rc)
|
||||
Helper_UpdateCR1();
|
||||
|
|
@ -537,8 +626,14 @@ void Interpreter::fsubx(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::fsubsx(UGeckoInstruction inst)
|
||||
{
|
||||
rPS0(inst.FD) = rPS1(inst.FD) = ForceSingle(NI_sub(rPS0(inst.FA), rPS0(inst.FB)));
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
const FPResult difference = NI_sub(rPS0(inst.FA), rPS0(inst.FB));
|
||||
|
||||
if (FPSCR.VE == 0 || difference.HasNoInvalidExceptions())
|
||||
{
|
||||
const double result = ForceSingle(difference.value);
|
||||
rPS0(inst.FD) = rPS1(inst.FD) = result;
|
||||
PowerPC::UpdateFPRF(result);
|
||||
}
|
||||
|
||||
if (inst.Rc)
|
||||
Helper_UpdateCR1();
|
||||
|
|
|
|||
|
|
@ -104,8 +104,8 @@ void Interpreter::ps_merge11(UGeckoInstruction inst)
|
|||
// From here on, the real deal.
|
||||
void Interpreter::ps_div(UGeckoInstruction inst)
|
||||
{
|
||||
rPS0(inst.FD) = ForceSingle(NI_div(rPS0(inst.FA), rPS0(inst.FB)));
|
||||
rPS1(inst.FD) = ForceSingle(NI_div(rPS1(inst.FA), rPS1(inst.FB)));
|
||||
rPS0(inst.FD) = ForceSingle(NI_div(rPS0(inst.FA), rPS0(inst.FB)).value);
|
||||
rPS1(inst.FD) = ForceSingle(NI_div(rPS1(inst.FA), rPS1(inst.FB)).value);
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
|
||||
if (inst.Rc)
|
||||
|
|
@ -172,8 +172,8 @@ void Interpreter::ps_rsqrte(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::ps_sub(UGeckoInstruction inst)
|
||||
{
|
||||
rPS0(inst.FD) = ForceSingle(NI_sub(rPS0(inst.FA), rPS0(inst.FB)));
|
||||
rPS1(inst.FD) = ForceSingle(NI_sub(rPS1(inst.FA), rPS1(inst.FB)));
|
||||
rPS0(inst.FD) = ForceSingle(NI_sub(rPS0(inst.FA), rPS0(inst.FB)).value);
|
||||
rPS1(inst.FD) = ForceSingle(NI_sub(rPS1(inst.FA), rPS1(inst.FB)).value);
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
|
||||
if (inst.Rc)
|
||||
|
|
@ -182,8 +182,8 @@ void Interpreter::ps_sub(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::ps_add(UGeckoInstruction inst)
|
||||
{
|
||||
rPS0(inst.FD) = ForceSingle(NI_add(rPS0(inst.FA), rPS0(inst.FB)));
|
||||
rPS1(inst.FD) = ForceSingle(NI_add(rPS1(inst.FA), rPS1(inst.FB)));
|
||||
rPS0(inst.FD) = ForceSingle(NI_add(rPS0(inst.FA), rPS0(inst.FB)).value);
|
||||
rPS1(inst.FD) = ForceSingle(NI_add(rPS1(inst.FA), rPS1(inst.FB)).value);
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
|
||||
if (inst.Rc)
|
||||
|
|
@ -192,10 +192,10 @@ void Interpreter::ps_add(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::ps_mul(UGeckoInstruction inst)
|
||||
{
|
||||
double c0 = Force25Bit(rPS0(inst.FC));
|
||||
double c1 = Force25Bit(rPS1(inst.FC));
|
||||
rPS0(inst.FD) = ForceSingle(NI_mul(rPS0(inst.FA), c0));
|
||||
rPS1(inst.FD) = ForceSingle(NI_mul(rPS1(inst.FA), c1));
|
||||
const double c0 = Force25Bit(rPS0(inst.FC));
|
||||
const double c1 = Force25Bit(rPS1(inst.FC));
|
||||
rPS0(inst.FD) = ForceSingle(NI_mul(rPS0(inst.FA), c0).value);
|
||||
rPS1(inst.FD) = ForceSingle(NI_mul(rPS1(inst.FA), c1).value);
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
|
||||
if (inst.Rc)
|
||||
|
|
@ -204,10 +204,10 @@ void Interpreter::ps_mul(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::ps_msub(UGeckoInstruction inst)
|
||||
{
|
||||
double c0 = Force25Bit(rPS0(inst.FC));
|
||||
double c1 = Force25Bit(rPS1(inst.FC));
|
||||
rPS0(inst.FD) = ForceSingle(NI_msub(rPS0(inst.FA), c0, rPS0(inst.FB)));
|
||||
rPS1(inst.FD) = ForceSingle(NI_msub(rPS1(inst.FA), c1, rPS1(inst.FB)));
|
||||
const double c0 = Force25Bit(rPS0(inst.FC));
|
||||
const double c1 = Force25Bit(rPS1(inst.FC));
|
||||
rPS0(inst.FD) = ForceSingle(NI_msub(rPS0(inst.FA), c0, rPS0(inst.FB)).value);
|
||||
rPS1(inst.FD) = ForceSingle(NI_msub(rPS1(inst.FA), c1, rPS1(inst.FB)).value);
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
|
||||
if (inst.Rc)
|
||||
|
|
@ -216,10 +216,10 @@ void Interpreter::ps_msub(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::ps_madd(UGeckoInstruction inst)
|
||||
{
|
||||
double c0 = Force25Bit(rPS0(inst.FC));
|
||||
double c1 = Force25Bit(rPS1(inst.FC));
|
||||
rPS0(inst.FD) = ForceSingle(NI_madd(rPS0(inst.FA), c0, rPS0(inst.FB)));
|
||||
rPS1(inst.FD) = ForceSingle(NI_madd(rPS1(inst.FA), c1, rPS1(inst.FB)));
|
||||
const double c0 = Force25Bit(rPS0(inst.FC));
|
||||
const double c1 = Force25Bit(rPS1(inst.FC));
|
||||
rPS0(inst.FD) = ForceSingle(NI_madd(rPS0(inst.FA), c0, rPS0(inst.FB)).value);
|
||||
rPS1(inst.FD) = ForceSingle(NI_madd(rPS1(inst.FA), c1, rPS1(inst.FB)).value);
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
|
||||
if (inst.Rc)
|
||||
|
|
@ -228,10 +228,10 @@ void Interpreter::ps_madd(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::ps_nmsub(UGeckoInstruction inst)
|
||||
{
|
||||
double c0 = Force25Bit(rPS0(inst.FC));
|
||||
double c1 = Force25Bit(rPS1(inst.FC));
|
||||
double result0 = ForceSingle(NI_msub(rPS0(inst.FA), c0, rPS0(inst.FB)));
|
||||
double result1 = ForceSingle(NI_msub(rPS1(inst.FA), c1, rPS1(inst.FB)));
|
||||
const double c0 = Force25Bit(rPS0(inst.FC));
|
||||
const double c1 = Force25Bit(rPS1(inst.FC));
|
||||
const double result0 = ForceSingle(NI_msub(rPS0(inst.FA), c0, rPS0(inst.FB)).value);
|
||||
const double result1 = ForceSingle(NI_msub(rPS1(inst.FA), c1, rPS1(inst.FB)).value);
|
||||
rPS0(inst.FD) = std::isnan(result0) ? result0 : -result0;
|
||||
rPS1(inst.FD) = std::isnan(result1) ? result1 : -result1;
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
|
|
@ -242,10 +242,10 @@ void Interpreter::ps_nmsub(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::ps_nmadd(UGeckoInstruction inst)
|
||||
{
|
||||
double c0 = Force25Bit(rPS0(inst.FC));
|
||||
double c1 = Force25Bit(rPS1(inst.FC));
|
||||
double result0 = ForceSingle(NI_madd(rPS0(inst.FA), c0, rPS0(inst.FB)));
|
||||
double result1 = ForceSingle(NI_madd(rPS1(inst.FA), c1, rPS1(inst.FB)));
|
||||
const double c0 = Force25Bit(rPS0(inst.FC));
|
||||
const double c1 = Force25Bit(rPS1(inst.FC));
|
||||
const double result0 = ForceSingle(NI_madd(rPS0(inst.FA), c0, rPS0(inst.FB)).value);
|
||||
const double result1 = ForceSingle(NI_madd(rPS1(inst.FA), c1, rPS1(inst.FB)).value);
|
||||
rPS0(inst.FD) = std::isnan(result0) ? result0 : -result0;
|
||||
rPS1(inst.FD) = std::isnan(result1) ? result1 : -result1;
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
|
|
@ -256,8 +256,8 @@ void Interpreter::ps_nmadd(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::ps_sum0(UGeckoInstruction inst)
|
||||
{
|
||||
double p0 = ForceSingle(NI_add(rPS0(inst.FA), rPS1(inst.FB)));
|
||||
double p1 = ForceSingle(rPS1(inst.FC));
|
||||
const double p0 = ForceSingle(NI_add(rPS0(inst.FA), rPS1(inst.FB)).value);
|
||||
const double p1 = ForceSingle(rPS1(inst.FC));
|
||||
rPS0(inst.FD) = p0;
|
||||
rPS1(inst.FD) = p1;
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
|
|
@ -268,8 +268,8 @@ void Interpreter::ps_sum0(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::ps_sum1(UGeckoInstruction inst)
|
||||
{
|
||||
double p0 = ForceSingle(rPS0(inst.FC));
|
||||
double p1 = ForceSingle(NI_add(rPS0(inst.FA), rPS1(inst.FB)));
|
||||
const double p0 = ForceSingle(rPS0(inst.FC));
|
||||
const double p1 = ForceSingle(NI_add(rPS0(inst.FA), rPS1(inst.FB)).value);
|
||||
rPS0(inst.FD) = p0;
|
||||
rPS1(inst.FD) = p1;
|
||||
PowerPC::UpdateFPRF(rPS1(inst.FD));
|
||||
|
|
@ -280,9 +280,9 @@ void Interpreter::ps_sum1(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::ps_muls0(UGeckoInstruction inst)
|
||||
{
|
||||
double c0 = Force25Bit(rPS0(inst.FC));
|
||||
double p0 = ForceSingle(NI_mul(rPS0(inst.FA), c0));
|
||||
double p1 = ForceSingle(NI_mul(rPS1(inst.FA), c0));
|
||||
const double c0 = Force25Bit(rPS0(inst.FC));
|
||||
const double p0 = ForceSingle(NI_mul(rPS0(inst.FA), c0).value);
|
||||
const double p1 = ForceSingle(NI_mul(rPS1(inst.FA), c0).value);
|
||||
rPS0(inst.FD) = p0;
|
||||
rPS1(inst.FD) = p1;
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
|
|
@ -293,9 +293,9 @@ void Interpreter::ps_muls0(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::ps_muls1(UGeckoInstruction inst)
|
||||
{
|
||||
double c1 = Force25Bit(rPS1(inst.FC));
|
||||
double p0 = ForceSingle(NI_mul(rPS0(inst.FA), c1));
|
||||
double p1 = ForceSingle(NI_mul(rPS1(inst.FA), c1));
|
||||
const double c1 = Force25Bit(rPS1(inst.FC));
|
||||
const double p0 = ForceSingle(NI_mul(rPS0(inst.FA), c1).value);
|
||||
const double p1 = ForceSingle(NI_mul(rPS1(inst.FA), c1).value);
|
||||
rPS0(inst.FD) = p0;
|
||||
rPS1(inst.FD) = p1;
|
||||
PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
|
|
@ -306,9 +306,9 @@ void Interpreter::ps_muls1(UGeckoInstruction inst)
|
|||
|
||||
void Interpreter::ps_madds0(UGeckoInstruction inst)
|
||||
{
|
||||
double c0 = Force25Bit(rPS0(inst.FC));
|
||||
double p0 = ForceSingle(NI_madd(rPS0(inst.FA), c0, rPS0(inst.FB)));
|
||||
double p1 = ForceSingle(NI_madd(rPS1(inst.FA), c0, rPS1(inst.FB)));
|
||||
const double c0 = Force25Bit(rPS0(inst.FC));
|
||||
const double p0 = ForceSingle(NI_madd(rPS0(inst.FA), c0, rPS0(inst.FB)).value);
|
||||
const double p1 = ForceSingle(NI_madd(rPS1(inst.FA), c0, rPS1(inst.FB)).value);
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rPS0(inst.FD) = p0;
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rPS1(inst.FD) = p1;
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PowerPC::UpdateFPRF(rPS0(inst.FD));
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|
@ -319,9 +319,9 @@ void Interpreter::ps_madds0(UGeckoInstruction inst)
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void Interpreter::ps_madds1(UGeckoInstruction inst)
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{
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double c1 = Force25Bit(rPS1(inst.FC));
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double p0 = ForceSingle(NI_madd(rPS0(inst.FA), c1, rPS0(inst.FB)));
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double p1 = ForceSingle(NI_madd(rPS1(inst.FA), c1, rPS1(inst.FB)));
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const double c1 = Force25Bit(rPS1(inst.FC));
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const double p0 = ForceSingle(NI_madd(rPS0(inst.FA), c1, rPS0(inst.FB)).value);
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||||
const double p1 = ForceSingle(NI_madd(rPS1(inst.FA), c1, rPS1(inst.FB)).value);
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rPS0(inst.FD) = p0;
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||||
rPS1(inst.FD) = p1;
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PowerPC::UpdateFPRF(rPS0(inst.FD));
|
||||
|
|
|
|||
Loading…
Reference in New Issue