diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp b/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp
index a98df95fc3..07eb36d263 100644
--- a/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp
+++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp
@@ -571,7 +571,7 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
 			}
 
 			// Add an external exception check if the instruction writes to the FIFO.
-			if (jit->js.fifoWriteAddresses.find(js.compilerPC) != jit->js.fifoWriteAddresses.end())
+			if (jit->js.fifoWriteAddresses.find(ops[i].address) != jit->js.fifoWriteAddresses.end())
 			{
 				gpr.Flush(FLUSH_ALL);
 				fpr.Flush(FLUSH_ALL);
@@ -580,10 +580,16 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
 				FixupBranch noExtException = J_CC(CC_Z);
 				TEST(32, M((void *)&ProcessorInterface::m_InterruptCause), Imm32(ProcessorInterface::INT_CAUSE_CP));
 				FixupBranch noCPInt = J_CC(CC_Z);
+				TEST(32, M((void *)&ProcessorInterface::m_InterruptCause),
+					Imm32(ProcessorInterface::INT_CAUSE_PE_TOKEN |
+					ProcessorInterface::INT_CAUSE_PE_FINISH |
+					ProcessorInterface::INT_CAUSE_DSP));
+				FixupBranch ClearInt = J_CC(CC_NZ);
 
-				MOV(32, M(&PC), Imm32(js.compilerPC));
+				MOV(32, M(&PC), Imm32(ops[i].address));
 				WriteExceptionExit();
 
+				SetJumpTarget(ClearInt);
 				SetJumpTarget(noCPInt);
 				SetJumpTarget(noExtException);
 			}