DSPLLE: small cleanup
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@4015 8ced0084-cf51-0410-be5f-012b33b47a6e
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@ -154,10 +154,6 @@ void DSPCore_Reset()
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void DSPCore_SetException(u8 level)
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void DSPCore_SetException(u8 level)
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{
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{
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#ifdef DEBUG_EXP
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NOTICE_LOG(DSPLLE, "Set exception %d", level);
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#endif
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g_dsp.exceptions |= 1 << level;
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g_dsp.exceptions |= 1 << level;
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}
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}
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@ -165,58 +161,55 @@ void DSPCore_SetException(u8 level)
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void DSPCore_CheckExternalInterrupt()
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void DSPCore_CheckExternalInterrupt()
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{
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{
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// check if there is an external interrupt
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// check if there is an external interrupt
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if (g_dsp.cr & CR_EXTERNAL_INT) {
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if (! g_dsp.cr & CR_EXTERNAL_INT)
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if (dsp_SR_is_flag_set(SR_EXT_INT_ENABLE) && g_dsp.exception_in_progress == -1) {
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return;
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#ifdef DEBUG_EXP
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NOTICE_LOG(DSP_MAIL, "External interrupt fired");
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#endif
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// Signal the SPU about new mail
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DSPCore_SetException(EXP_INT);
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g_dsp.cr &= ~CR_EXTERNAL_INT;
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if (! dsp_SR_is_flag_set(SR_EXT_INT_ENABLE))
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} else {
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return;
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#ifdef DEBUG_EXP
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ERROR_LOG(DSP_MAIL, "External interrupt failed(masked) by %d", g_dsp.exception_in_progress);
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// Signal the SPU about new mail
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#endif
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DSPCore_SetException(EXP_INT);
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}
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}
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g_dsp.cr &= ~CR_EXTERNAL_INT;
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}
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}
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void DSPCore_CheckExceptions()
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void DSPCore_CheckExceptions()
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{
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{
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if (g_dsp.exceptions == 0)
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return;
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// it's unclear what to do when there are two exceptions are the same time
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// it's unclear what to do when there are two exceptions are the same time
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// but for sure they should not be called together therefore the
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// but for sure they should not be called together therefore the
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// g_dsp.exception_in_progress_hack
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// g_dsp.exception_in_progress
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if (g_dsp.exceptions != 0) {
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if (g_dsp.exception_in_progress != -1) {
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if (g_dsp.exception_in_progress == -1) {
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// check exceptions should it be 0..7 or 7..0?
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for (int i = 7; i >= 0; i--) {
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// Seems exp int or reset are not masked by sr_int_enable
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if (g_dsp.exceptions & (1 << i)) {
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if (dsp_SR_is_flag_set(SR_INT_ENABLE) || (i == EXP_INT && dsp_SR_is_flag_set(SR_EXT_INT_ENABLE)) || i == EXP_RESET) {
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_assert_msg_(MASTER_LOG, g_dsp.exception_in_progress == -1, "assert %d while exception", g_dsp.exception_in_progress);
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// store pc and sr until RTI
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dsp_reg_store_stack(DSP_STACK_C, g_dsp.pc);
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dsp_reg_store_stack(DSP_STACK_D, g_dsp.r[DSP_REG_SR]);
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g_dsp.pc = i * 2;
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g_dsp.exceptions &= ~(1 << i);
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if (i)
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g_dsp.exception_in_progress = i;
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break;
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} else {
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#ifdef DEBUG_EXP
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#ifdef DEBUG_EXP
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ERROR_LOG(DSPLLE, "Firing exception %d failed", i);
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ERROR_LOG(DSPLLE, "Firing exception %d failed exception %d active", g_dsp.exceptions, g_dsp.exception_in_progress);
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#endif
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return;
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}
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for (int i = 7; i > 0; i--) {
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// Seems exp int or reset are not masked by sr_int_enable
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if (g_dsp.exceptions & (1 << i)) {
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if (dsp_SR_is_flag_set(SR_INT_ENABLE) || (i == EXP_INT)) {
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_assert_msg_(MASTER_LOG, g_dsp.exception_in_progress == -1, "assert %d while exception", g_dsp.exception_in_progress);
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// store pc and sr until RTI
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dsp_reg_store_stack(DSP_STACK_C, g_dsp.pc);
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dsp_reg_store_stack(DSP_STACK_D, g_dsp.r[DSP_REG_SR]);
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g_dsp.pc = i * 2;
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g_dsp.exceptions &= ~(1 << i);
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if (i)
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g_dsp.exception_in_progress = i;
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break;
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} else {
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#ifdef DEBUG_EXP
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ERROR_LOG(DSPLLE, "Firing exception %d failed", i);
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#endif
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#endif
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}
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}
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}
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}
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} else {
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#ifdef DEBUG_EXP
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ERROR_LOG(DSPLLE, "Firing exception %d failed exception %d active", g_dsp.exceptions, g_dsp.exception_in_progress);
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#endif
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}
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}
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}
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}
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}
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}
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@ -152,6 +152,7 @@
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#define SR_10 0x0010 // seem to be set by tst
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#define SR_10 0x0010 // seem to be set by tst
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#define SR_TOP2BITS 0x0020 // if the upper 2 bits are equal
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#define SR_TOP2BITS 0x0020 // if the upper 2 bits are equal
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#define SR_LOGIC_ZERO 0x0040
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#define SR_LOGIC_ZERO 0x0040
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#define SR_80 0x0080 // Unknown, set by add
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#define SR_INT_ENABLE 0x0200 // Not 100% sure but duddie says so. This should replace the hack, if so.
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#define SR_INT_ENABLE 0x0200 // Not 100% sure but duddie says so. This should replace the hack, if so.
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#define SR_EXT_INT_ENABLE 0x0800 // Appears in zelda - seems to disable external interupts
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#define SR_EXT_INT_ENABLE 0x0800 // Appears in zelda - seems to disable external interupts
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#define SR_MUL_MODIFY 0x2000 // 1 = normal. 0 = x2 (M0, M2)
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#define SR_MUL_MODIFY 0x2000 // 1 = normal. 0 = x2 (M0, M2)
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@ -162,7 +163,6 @@
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#define SR_CMP_MASK 0x3f
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#define SR_CMP_MASK 0x3f
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// exceptions vector
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// exceptions vector
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#define EXP_RESET 0 // 0x0000
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#define EXP_STOVF 1 // 0x0002 stack under/over flow
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#define EXP_STOVF 1 // 0x0002 stack under/over flow
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#define EXP_2 2 // 0x0004
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#define EXP_2 2 // 0x0004
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#define EXP_3 3 // 0x0006
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#define EXP_3 3 // 0x0006
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