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MMU: Use the Memory helpers for physical memory. 

physical_base is a fastmem helper. Its access is unsafe and might not be available without a Jit.
This commit is contained in:
degasus 2019-11-27 11:01:04 +01:00
parent 084344aa5d
commit 9d88180df7
1 changed files with 3 additions and 5 deletions
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8
Source/Core/Core/PowerPC/MMU.cpp
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@ -1117,13 +1117,12 @@ static TranslateAddressResult TranslatePageAddress(const u32 address, const XChe
for (int i = 0; i < 8; i++, pteg_addr += 8) for (int i = 0; i < 8; i++, pteg_addr += 8)
{ {
u32 pteg; u32 pteg = Common::swap32(Memory::Read_U32(pteg_addr));
std::memcpy(&pteg, &Memory::physical_base[pteg_addr], sizeof(u32));
if (pte1 == pteg) if (pte1 == pteg)
{ {
UPTE2 PTE2; UPTE2 PTE2;
PTE2.Hex = Common::swap32(&Memory::physical_base[pteg_addr + 4]); PTE2.Hex = Memory::Read_U32(pteg_addr + 4);
// set the access bits // set the access bits
switch (flag) switch (flag)
@ -1145,8 +1144,7 @@ static TranslateAddressResult TranslatePageAddress(const u32 address, const XChe
if (!IsNoExceptionFlag(flag)) if (!IsNoExceptionFlag(flag))
{ {
const u32 swapped_pte2 = Common::swap32(PTE2.Hex); Memory::Write_U32(PTE2.Hex, pteg_addr + 4);
std::memcpy(&Memory::physical_base[pteg_addr + 4], &swapped_pte2, sizeof(u32));
} }
// We already updated the TLB entry if this was caused by a C bit. // We already updated the TLB entry if this was caused by a C bit.