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fabsx was showing up in TD's profiles, so jit it. 

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3848 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
hrydgard 2009-07-19 10:16:10 +00:00
parent fb7238eeb5
commit 9ccf22093d
3 changed files with 39 additions and 6 deletions
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1
Source/Core/Core/Src/PowerPC/Jit64/Jit.h
View File

@ -280,6 +280,7 @@ public:
void psq_st(UGeckoInstruction inst);
void fmaddXX(UGeckoInstruction inst);
void fsign(UGeckoInstruction inst);
void stX(UGeckoInstruction inst); //stw sth stb
void lXz(UGeckoInstruction inst);
void lha(UGeckoInstruction inst);

32
Source/Core/Core/Src/PowerPC/Jit64/Jit_FloatingPoint.cpp
View File

@ -160,6 +160,38 @@ void Jit64::fmaddXX(UGeckoInstruction inst)
fpr.UnlockAll();
}
void Jit64::fsign(UGeckoInstruction inst)
{
if(Core::g_CoreStartupParameter.bJITOff || Core::g_CoreStartupParameter.bJITFloatingPointOff)
{Default(inst); return;} // turn off from debugger
INSTRUCTION_START;
if (inst.Rc) {
Default(inst); return;
}
int d = inst.FD;
int b = inst.FB;
fpr.Lock(b, d);
fpr.LoadToX64(d, true, true);
MOVSD(XMM0, fpr.R(b));
switch (inst.SUBOP10) {
case 40: // fnegx
XORPD(XMM0, M((void*)&psSignBits2));
break;
case 264: // fabsx
ANDPD(XMM0, M((void*)&psAbsMask2));
break;
case 136: // fnabs
ORPD(XMM0, M((void*)&psSignBits2));
break;
default:
PanicAlert("fsign bleh");
break;
}
MOVSD(fpr.R(d), XMM0);
fpr.UnlockAll();
}
void Jit64::fmrx(UGeckoInstruction inst)
{
if(Core::g_CoreStartupParameter.bJITOff || Core::g_CoreStartupParameter.bJITFloatingPointOff)

12
Source/Core/Core/Src/PowerPC/JitCommon/Jit_Tables.cpp
View File

@ -370,14 +370,14 @@ static GekkoOPTemplate table59[] =
static GekkoOPTemplate table63[] =
{
{264, &Jit64::Default}, //"fabsx", OPTYPE_FPU, FL_RC_BIT_F}},
{32, &Jit64::fcmpx}, //"fcmpo", OPTYPE_FPU, FL_RC_BIT_F}},
{0, &Jit64::fcmpx}, //"fcmpu", OPTYPE_FPU, FL_RC_BIT_F}},
{264, &Jit64::fsign}, //"fabsx", OPTYPE_FPU, FL_RC_BIT_F}},
{32, &Jit64::fcmpx}, //"fcmpo", OPTYPE_FPU, FL_RC_BIT_F}},
{0, &Jit64::fcmpx}, //"fcmpu", OPTYPE_FPU, FL_RC_BIT_F}},
{14, &Jit64::Default}, //"fctiwx", OPTYPE_FPU, FL_RC_BIT_F}},
{15, &Jit64::Default}, //"fctiwzx", OPTYPE_FPU, FL_RC_BIT_F}},
{72, &Jit64::fmrx}, //"fmrx", OPTYPE_FPU, FL_RC_BIT_F}},
{136, &Jit64::Default}, //"fnabsx", OPTYPE_FPU, FL_RC_BIT_F}},
{40, &Jit64::Default}, //"fnegx", OPTYPE_FPU, FL_RC_BIT_F}},
{72, &Jit64::fmrx}, //"fmrx", OPTYPE_FPU, FL_RC_BIT_F}},
{136, &Jit64::fsign}, //"fnabsx", OPTYPE_FPU, FL_RC_BIT_F}},
{40, &Jit64::fsign}, //"fnegx", OPTYPE_FPU, FL_RC_BIT_F}},
{12, &Jit64::Default}, //"frspx", OPTYPE_FPU, FL_RC_BIT_F}},
{64, &Jit64::Default}, //"mcrfs", OPTYPE_SYSTEMFP, 0}},