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Merge pull request #4712 from lioncash/jitarm 

JitArm64: Eliminate trivial JIT global usages
This commit is contained in:
Markus Wick 2017-01-22 13:56:43 +01:00 committed by GitHub
parent 46c33df485 a97aef2e94
commit 9c28121af6
3 changed files with 4 additions and 5 deletions
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2
Source/Core/Core/PowerPC/JitArm64/Jit.cpp
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@ -502,7 +502,7 @@ const u8* JitArm64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer* code_buf, JitB
// Gather pipe writes using a non-immediate address are discovered by profiling. // Gather pipe writes using a non-immediate address are discovered by profiling.
bool gatherPipeIntCheck = bool gatherPipeIntCheck =
g_jit->js.fifoWriteAddresses.find(ops[i].address) != g_jit->js.fifoWriteAddresses.end(); js.fifoWriteAddresses.find(ops[i].address) != js.fifoWriteAddresses.end();
if (jo.optimizeGatherPipe && (js.fifoBytesSinceCheck >= 32 || js.mustCheckFifo)) if (jo.optimizeGatherPipe && (js.fifoBytesSinceCheck >= 32 || js.mustCheckFifo))
{ {

2
Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp
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@ -597,7 +597,7 @@ void JitArm64::dcbx(UGeckoInstruction inst)
AND(value, addr, 32 - 10, 28 - 10); // upper three bits and last 10 bit are masked for the bitset AND(value, addr, 32 - 10, 28 - 10); // upper three bits and last 10 bit are masked for the bitset
// of cachelines, 0x1ffffc00 // of cachelines, 0x1ffffc00
LSR(value, value, 5 + 5); // >> 5 for cache line size, >> 5 for width of bitset LSR(value, value, 5 + 5); // >> 5 for cache line size, >> 5 for width of bitset
MOVP2R(EncodeRegTo64(WA), g_jit->GetBlockCache()->GetBlockBitSet()); MOVP2R(EncodeRegTo64(WA), GetBlockCache()->GetBlockBitSet());
LDR(value, EncodeRegTo64(WA), ArithOption(EncodeRegTo64(value), true)); LDR(value, EncodeRegTo64(WA), ArithOption(EncodeRegTo64(value), true));
LSR(addr, addr, 5); // mask sizeof cacheline, & 0x1f is the position within the bitset LSR(addr, addr, 5); // mask sizeof cacheline, & 0x1f is the position within the bitset

5
Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStoreFloating.cpp
View File

@ -325,8 +325,7 @@ void JitArm64::stfXX(UGeckoInstruction inst)
ARM64Reg XA = EncodeRegTo64(addr_reg); ARM64Reg XA = EncodeRegTo64(addr_reg);
if (is_immediate && if (is_immediate && !(jo.optimizeGatherPipe && PowerPC::IsOptimizableGatherPipeWrite(imm_addr)))
!(g_jit->jo.optimizeGatherPipe && PowerPC::IsOptimizableGatherPipeWrite(imm_addr)))
{ {
MOVI2R(XA, imm_addr); MOVI2R(XA, imm_addr);
@ -350,7 +349,7 @@ void JitArm64::stfXX(UGeckoInstruction inst)
if (is_immediate) if (is_immediate)
{ {
if (g_jit->jo.optimizeGatherPipe && PowerPC::IsOptimizableGatherPipeWrite(imm_addr)) if (jo.optimizeGatherPipe && PowerPC::IsOptimizableGatherPipeWrite(imm_addr))
{ {
int accessSize; int accessSize;
if (flags & BackPatchInfo::FLAG_SIZE_F64) if (flags & BackPatchInfo::FLAG_SIZE_F64)