VertexLoaderARM64: Always use unscaled load/store instructions
The source and destination offsets will always be less than 255, so we can get rid of a lot of the complexity by doing this.
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a34d5e5960
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9a290c3d50
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@ -66,32 +66,12 @@ void VertexLoaderARM64::GetVertexAddr(CPArray array, VertexComponentFormat attri
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{
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if (attribute == VertexComponentFormat::Index8)
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{
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if (m_src_ofs < 4096)
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{
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LDRB(IndexType::Unsigned, scratch1_reg, src_reg, m_src_ofs);
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}
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else
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{
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ADD(reg, src_reg, m_src_ofs);
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LDRB(IndexType::Unsigned, scratch1_reg, reg, 0);
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}
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LDURB(scratch1_reg, src_reg, m_src_ofs);
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m_src_ofs += 1;
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}
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else
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else // Index16
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{
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if (m_src_ofs < 256)
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{
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LDURH(scratch1_reg, src_reg, m_src_ofs);
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}
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else if (m_src_ofs <= 8190 && !(m_src_ofs & 1))
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{
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LDRH(IndexType::Unsigned, scratch1_reg, src_reg, m_src_ofs);
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}
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else
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{
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ADD(reg, src_reg, m_src_ofs);
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LDRH(IndexType::Unsigned, scratch1_reg, reg, 0);
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}
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LDURH(scratch1_reg, src_reg, m_src_ofs);
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m_src_ofs += 2;
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REV16(scratch1_reg, scratch1_reg);
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}
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@ -118,7 +98,7 @@ void VertexLoaderARM64::GetVertexAddr(CPArray array, VertexComponentFormat attri
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s32 VertexLoaderARM64::GetAddressImm(CPArray array, VertexComponentFormat attribute,
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Arm64Gen::ARM64Reg reg, u32 align)
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{
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if (IsIndexed(attribute) || (m_src_ofs > 255 && (m_src_ofs & (align - 1))))
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if (IsIndexed(attribute))
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GetVertexAddr(array, attribute, reg);
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else
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return m_src_ofs;
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@ -145,13 +125,9 @@ int VertexLoaderARM64::ReadVertex(VertexComponentFormat attribute, ComponentForm
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else
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m_float_emit.LD1(elem_size, 1, coords, EncodeRegTo64(scratch1_reg));
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}
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else if (offset & (load_size - 1)) // Not aligned - unscaled
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{
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m_float_emit.LDUR(load_size, coords, src_reg, offset);
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}
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else
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{
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m_float_emit.LDR(load_size, IndexType::Unsigned, coords, src_reg, offset);
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m_float_emit.LDUR(load_size, coords, src_reg, offset);
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}
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if (format != ComponentFormat::Float)
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@ -191,20 +167,7 @@ int VertexLoaderARM64::ReadVertex(VertexComponentFormat attribute, ComponentForm
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}
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const u32 write_size = count_out == 3 ? 128 : count_out * 32;
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const u32 mask = count_out == 3 ? 0xF : count_out == 2 ? 0x7 : 0x3;
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if (m_dst_ofs < 256)
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{
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m_float_emit.STUR(write_size, coords, dst_reg, m_dst_ofs);
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}
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else if (!(m_dst_ofs & mask))
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{
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m_float_emit.STR(write_size, IndexType::Unsigned, coords, dst_reg, m_dst_ofs);
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}
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else
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{
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ADD(EncodeRegTo64(scratch2_reg), dst_reg, m_dst_ofs);
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m_float_emit.ST1(32, 1, coords, EncodeRegTo64(scratch2_reg));
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}
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m_float_emit.STUR(write_size, coords, dst_reg, m_dst_ofs);
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// Z-Freeze
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if (native_format == &m_native_vtx_decl.position)
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@ -253,10 +216,8 @@ void VertexLoaderARM64::ReadColor(VertexComponentFormat attribute, ColorFormat f
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case ColorFormat::RGBA8888:
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if (offset == -1)
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LDR(IndexType::Unsigned, scratch2_reg, EncodeRegTo64(scratch1_reg), 0);
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else if (offset & 3) // Not aligned - unscaled
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LDUR(scratch2_reg, src_reg, offset);
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else
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LDR(IndexType::Unsigned, scratch2_reg, src_reg, offset);
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LDUR(scratch2_reg, src_reg, offset);
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if (format != ColorFormat::RGBA8888)
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ORR(scratch2_reg, scratch2_reg, LogicalImm(0xFF000000, 32));
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@ -269,10 +230,8 @@ void VertexLoaderARM64::ReadColor(VertexComponentFormat attribute, ColorFormat f
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// AAAAAAAA BBBBBBBB GGGGGGGG RRRRRRRR
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if (offset == -1)
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LDRH(IndexType::Unsigned, scratch3_reg, EncodeRegTo64(scratch1_reg), 0);
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else if (offset & 1) // Not aligned - unscaled
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LDURH(scratch3_reg, src_reg, offset);
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else
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LDRH(IndexType::Unsigned, scratch3_reg, src_reg, offset);
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LDURH(scratch3_reg, src_reg, offset);
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REV16(scratch3_reg, scratch3_reg);
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@ -306,10 +265,8 @@ void VertexLoaderARM64::ReadColor(VertexComponentFormat attribute, ColorFormat f
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// AAAAAAAA BBBBBBBB GGGGGGGG RRRRRRRR
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if (offset == -1)
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LDRH(IndexType::Unsigned, scratch3_reg, EncodeRegTo64(scratch1_reg), 0);
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else if (offset & 1) // Not aligned - unscaled
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LDURH(scratch3_reg, src_reg, offset);
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else
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LDRH(IndexType::Unsigned, scratch3_reg, src_reg, offset);
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LDURH(scratch3_reg, src_reg, offset);
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// R
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UBFM(scratch1_reg, scratch3_reg, 4, 7);
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@ -337,17 +294,9 @@ void VertexLoaderARM64::ReadColor(VertexComponentFormat attribute, ColorFormat f
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// RRRRRRGG GGGGBBBB BBAAAAAA
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// AAAAAAAA BBBBBBBB GGGGGGGG RRRRRRRR
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if (offset == -1)
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{
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LDUR(scratch3_reg, EncodeRegTo64(scratch1_reg), -1);
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}
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else
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{
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offset -= 1;
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if (offset & 3) // Not aligned - unscaled
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LDUR(scratch3_reg, src_reg, offset);
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else
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LDR(IndexType::Unsigned, scratch3_reg, src_reg, offset);
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}
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LDUR(scratch3_reg, src_reg, offset - 1);
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REV32(scratch3_reg, scratch3_reg);
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@ -385,6 +334,12 @@ void VertexLoaderARM64::ReadColor(VertexComponentFormat attribute, ColorFormat f
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void VertexLoaderARM64::GenerateVertexLoader()
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{
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// The largest input vertex (with the position matrix index and all texture matrix indices
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// enabled, and all components set as direct) is 129 bytes (corresponding to a 156-byte
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// output). This is small enough that we can always use the unscaled load/store instructions
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// (which allow an offset from -256 to +255).
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ASSERT(m_vertex_size <= 255);
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// R0 - Source pointer
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// R1 - Destination pointer
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// R2 - Count
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@ -568,22 +523,7 @@ void VertexLoaderARM64::GenerateVertexLoader()
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{
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m_native_vtx_decl.texcoords[i].offset = m_dst_ofs;
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if (m_dst_ofs < 256)
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{
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STUR(ARM64Reg::SP, dst_reg, m_dst_ofs);
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}
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else if (!(m_dst_ofs & 7))
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{
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// If m_dst_ofs isn't 8byte aligned we can't store an 8byte zero register
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// So store two 4byte zero registers
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// The destination is always 4byte aligned
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STR(IndexType::Unsigned, ARM64Reg::WSP, dst_reg, m_dst_ofs);
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STR(IndexType::Unsigned, ARM64Reg::WSP, dst_reg, m_dst_ofs + 4);
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}
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else
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{
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STR(IndexType::Unsigned, ARM64Reg::SP, dst_reg, m_dst_ofs);
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}
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STUR(ARM64Reg::SP, dst_reg, m_dst_ofs);
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m_float_emit.STR(32, IndexType::Unsigned, ARM64Reg::D31, dst_reg, m_dst_ofs + 8);
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m_dst_ofs += sizeof(float) * 3;
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