From 9720d6b41877481df65370b2f2d05f181884cbd2 Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Sat, 20 Apr 2013 17:36:49 +0000 Subject: [PATCH] Allow runtime setting of fastmem in ARM and disable since it seems to be causing issues again. Cortex-A9 only? --- .../Src/PowerPC/JitArm32/JitArm_LoadStore.cpp | 235 ++++++++++-------- 1 file changed, 127 insertions(+), 108 deletions(-) diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp index bcfc45a22c..11433477e0 100644 --- a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp +++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp @@ -34,7 +34,7 @@ #ifdef ANDROID #define FASTMEM 0 #else -#define FASTMEM 1 +#define FASTMEM 0 #endif void JitArm::stbu(UGeckoInstruction inst) { @@ -156,45 +156,50 @@ void JitArm::stw(UGeckoInstruction inst) ARMReg RS = gpr.R(inst.RS); #if FASTMEM // R10 contains the dest address - ARMReg Value = R11; - ARMReg RA; - if (inst.RA) - RA = gpr.R(inst.RA); - MOV(Value, RS); - if (inst.RA) + if (Core::g_CoreStartupParameter.bFastmem) { - MOVI2R(R10, inst.SIMM_16, false); - ADD(R10, R10, RA); + ARMReg Value = R11; + ARMReg RA; + if (inst.RA) + RA = gpr.R(inst.RA); + MOV(Value, RS); + if (inst.RA) + { + MOVI2R(R10, inst.SIMM_16, false); + ADD(R10, R10, RA); + } + else + { + MOVI2R(R10, (u32)inst.SIMM_16, false); + NOP(1); + } + StoreFromReg(R10, Value, 32, 0); } else - { - MOVI2R(R10, (u32)inst.SIMM_16, false); - NOP(1); - } - StoreFromReg(R10, Value, 32, 0); -#else - ARMReg ValueReg = gpr.GetReg(); - ARMReg Addr = gpr.GetReg(); - ARMReg Function = gpr.GetReg(); - - MOV(ValueReg, RS); - if (inst.RA) - { - MOVI2R(Addr, inst.SIMM_16); - ARMReg RA = gpr.R(inst.RA); - ADD(Addr, Addr, RA); - } - else - MOVI2R(Addr, (u32)inst.SIMM_16); - - MOVI2R(Function, (u32)&Memory::Write_U32); - PUSH(4, R0, R1, R2, R3); - MOV(R0, ValueReg); - MOV(R1, Addr); - BL(Function); - POP(4, R0, R1, R2, R3); - gpr.Unlock(ValueReg, Addr, Function); #endif + { + ARMReg ValueReg = gpr.GetReg(); + ARMReg Addr = gpr.GetReg(); + ARMReg Function = gpr.GetReg(); + + MOV(ValueReg, RS); + if (inst.RA) + { + MOVI2R(Addr, inst.SIMM_16); + ARMReg RA = gpr.R(inst.RA); + ADD(Addr, Addr, RA); + } + else + MOVI2R(Addr, (u32)inst.SIMM_16); + + MOVI2R(Function, (u32)&Memory::Write_U32); + PUSH(4, R0, R1, R2, R3); + MOV(R0, ValueReg); + MOV(R1, Addr); + BL(Function); + POP(4, R0, R1, R2, R3); + gpr.Unlock(ValueReg, Addr, Function); + } } void JitArm::stwu(UGeckoInstruction inst) { @@ -316,35 +321,39 @@ void JitArm::lbz(UGeckoInstruction inst) // Backpatch route // Gets loaded in to RD // Address is in R10 - gpr.Unlock(rA, rB); - if (inst.RA) + if (Core::g_CoreStartupParameter.bFastmem) { - ARMReg RA = gpr.R(inst.RA); - MOV(R10, RA); // - 4 + gpr.Unlock(rA, rB); + if (inst.RA) + { + ARMReg RA = gpr.R(inst.RA); + MOV(R10, RA); // - 4 + } + else + MOV(R10, 0); // - 4 + LoadToReg(RD, R10, 8, inst.SIMM_16); } else - MOV(R10, 0); // - 4 - LoadToReg(RD, R10, 8, inst.SIMM_16); -#else - - if (inst.RA) - { - MOVI2R(rB, inst.SIMM_16); - ARMReg RA = gpr.R(inst.RA); - ADD(rB, rB, RA); - } - else - MOVI2R(rB, (u32)inst.SIMM_16); - - MOVI2R(rA, (u32)&Memory::Read_U8); - PUSH(4, R0, R1, R2, R3); - MOV(R0, rB); - BL(rA); - MOV(rA, R0); - POP(4, R0, R1, R2, R3); - MOV(RD, rA); - gpr.Unlock(rA, rB); #endif + { + if (inst.RA) + { + MOVI2R(rB, inst.SIMM_16); + ARMReg RA = gpr.R(inst.RA); + ADD(rB, rB, RA); + } + else + MOVI2R(rB, (u32)inst.SIMM_16); + + MOVI2R(rA, (u32)&Memory::Read_U8); + PUSH(4, R0, R1, R2, R3); + MOV(R0, rB); + BL(rA); + MOV(rA, R0); + POP(4, R0, R1, R2, R3); + MOV(RD, rA); + gpr.Unlock(rA, rB); + } SetJumpTarget(DoNotLoad); } @@ -411,34 +420,39 @@ void JitArm::lwz(UGeckoInstruction inst) // Backpatch route // Gets loaded in to RD // Address is in R10 - gpr.Unlock(rA, rB); - if (inst.RA) + if (Core::g_CoreStartupParameter.bFastmem) { - ARMReg RA = gpr.R(inst.RA); - MOV(R10, RA); // - 4 + gpr.Unlock(rA, rB); + if (inst.RA) + { + ARMReg RA = gpr.R(inst.RA); + MOV(R10, RA); // - 4 + } + else + MOV(R10, 0); // - 4 + LoadToReg(RD, R10, 32, (u32)inst.SIMM_16); } else - MOV(R10, 0); // - 4 - LoadToReg(RD, R10, 32, (u32)inst.SIMM_16); -#else - if (inst.RA) - { - MOVI2R(rB, inst.SIMM_16); - ARMReg RA = gpr.R(inst.RA); - ADD(rB, rB, RA); - } - else - MOVI2R(rB, (u32)inst.SIMM_16); - - MOVI2R(rA, (u32)&Memory::Read_U32); - PUSH(4, R0, R1, R2, R3); - MOV(R0, rB); - BL(rA); - MOV(rA, R0); - POP(4, R0, R1, R2, R3); - MOV(RD, rA); - gpr.Unlock(rA, rB); #endif + { + if (inst.RA) + { + MOVI2R(rB, inst.SIMM_16); + ARMReg RA = gpr.R(inst.RA); + ADD(rB, rB, RA); + } + else + MOVI2R(rB, (u32)inst.SIMM_16); + + MOVI2R(rA, (u32)&Memory::Read_U32); + PUSH(4, R0, R1, R2, R3); + MOV(R0, rB); + BL(rA); + MOV(rA, R0); + POP(4, R0, R1, R2, R3); + MOV(RD, rA); + gpr.Unlock(rA, rB); + } SetJumpTarget(DoNotLoad); if (SConfig::GetInstance().m_LocalCoreStartupParameter.bSkipIdle && (inst.hex & 0xFFFF0000) == 0x800D0000 && @@ -484,33 +498,38 @@ void JitArm::lwzx(UGeckoInstruction inst) // Backpatch route // Gets loaded in to RD // Address is in R10 - gpr.Unlock(rA, rB); - if (inst.RA) + if (Core::g_CoreStartupParameter.bFastmem) { - ARMReg RA = gpr.R(inst.RA); - ADD(R10, RA, RB); // - 4 + gpr.Unlock(rA, rB); + if (inst.RA) + { + ARMReg RA = gpr.R(inst.RA); + ADD(R10, RA, RB); // - 4 + } + else + MOV(R10, RB); // -4 + LoadToReg(RD, R10, 32, 0); } else - MOV(R10, RB); // -4 - LoadToReg(RD, R10, 32, 0); -#else - if (inst.RA) - { - ARMReg RA = gpr.R(inst.RA); - ADD(rB, RA, RB); - } - else - MOV(rB, RB); - - MOVI2R(rA, (u32)&Memory::Read_U32); - PUSH(4, R0, R1, R2, R3); - MOV(R0, rB); - BL(rA); - MOV(rA, R0); - POP(4, R0, R1, R2, R3); - MOV(RD, rA); - gpr.Unlock(rA, rB); #endif + { + if (inst.RA) + { + ARMReg RA = gpr.R(inst.RA); + ADD(rB, RA, RB); + } + else + MOV(rB, RB); + + MOVI2R(rA, (u32)&Memory::Read_U32); + PUSH(4, R0, R1, R2, R3); + MOV(R0, rB); + BL(rA); + MOV(rA, R0); + POP(4, R0, R1, R2, R3); + MOV(RD, rA); + gpr.Unlock(rA, rB); + } SetJumpTarget(DoNotLoad); //// u32 temp = Memory::Read_U32(_inst.RA ? (m_GPR[_inst.RA] + m_GPR[_inst.RB]) : m_GPR[_inst.RB]); }