Merge pull request #12517 from lioncash/alloc
Jit64/JitRegCache: Simplify GetAllocationOrder()
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commit
96fda3d126
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@ -25,11 +25,10 @@ void FPURegCache::LoadRegister(preg_t preg, X64Reg new_loc)
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m_emitter->MOVAPD(new_loc, m_regs[preg].Location().value());
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m_emitter->MOVAPD(new_loc, m_regs[preg].Location().value());
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}
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}
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const X64Reg* FPURegCache::GetAllocationOrder(size_t* count) const
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std::span<const X64Reg> FPURegCache::GetAllocationOrder() const
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{
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{
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static const X64Reg allocation_order[] = {XMM6, XMM7, XMM8, XMM9, XMM10, XMM11, XMM12,
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static constexpr X64Reg allocation_order[] = {XMM6, XMM7, XMM8, XMM9, XMM10, XMM11, XMM12,
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XMM13, XMM14, XMM15, XMM2, XMM3, XMM4, XMM5};
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XMM13, XMM14, XMM15, XMM2, XMM3, XMM4, XMM5};
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*count = sizeof(allocation_order) / sizeof(X64Reg);
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return allocation_order;
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return allocation_order;
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}
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}
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@ -16,7 +16,7 @@ protected:
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Gen::OpArg GetDefaultLocation(preg_t preg) const override;
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Gen::OpArg GetDefaultLocation(preg_t preg) const override;
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void StoreRegister(preg_t preg, const Gen::OpArg& newLoc) override;
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void StoreRegister(preg_t preg, const Gen::OpArg& newLoc) override;
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void LoadRegister(preg_t preg, Gen::X64Reg newLoc) override;
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void LoadRegister(preg_t preg, Gen::X64Reg newLoc) override;
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const Gen::X64Reg* GetAllocationOrder(size_t* count) const override;
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std::span<const Gen::X64Reg> GetAllocationOrder() const override;
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BitSet32 GetRegUtilization() const override;
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BitSet32 GetRegUtilization() const override;
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BitSet32 CountRegsIn(preg_t preg, u32 lookahead) const override;
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BitSet32 CountRegsIn(preg_t preg, u32 lookahead) const override;
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};
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};
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@ -30,9 +30,9 @@ OpArg GPRRegCache::GetDefaultLocation(preg_t preg) const
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return PPCSTATE_GPR(preg);
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return PPCSTATE_GPR(preg);
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}
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}
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const X64Reg* GPRRegCache::GetAllocationOrder(size_t* count) const
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std::span<const X64Reg> GPRRegCache::GetAllocationOrder() const
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{
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{
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static const X64Reg allocation_order[] = {
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static constexpr X64Reg allocation_order[] = {
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// R12, when used as base register, for example in a LEA, can generate bad code! Need to look into
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// R12, when used as base register, for example in a LEA, can generate bad code! Need to look into
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// this.
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// this.
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#ifdef _WIN32
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#ifdef _WIN32
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@ -43,7 +43,6 @@ const X64Reg* GPRRegCache::GetAllocationOrder(size_t* count) const
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R8, R9, R10, R11, RCX
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R8, R9, R10, R11, RCX
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#endif
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#endif
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};
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};
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*count = sizeof(allocation_order) / sizeof(X64Reg);
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return allocation_order;
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return allocation_order;
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}
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}
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@ -17,7 +17,7 @@ protected:
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Gen::OpArg GetDefaultLocation(preg_t preg) const override;
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Gen::OpArg GetDefaultLocation(preg_t preg) const override;
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void StoreRegister(preg_t preg, const Gen::OpArg& new_loc) override;
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void StoreRegister(preg_t preg, const Gen::OpArg& new_loc) override;
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void LoadRegister(preg_t preg, Gen::X64Reg new_loc) override;
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void LoadRegister(preg_t preg, Gen::X64Reg new_loc) override;
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const Gen::X64Reg* GetAllocationOrder(size_t* count) const override;
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std::span<const Gen::X64Reg> GetAllocationOrder() const override;
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BitSet32 GetRegUtilization() const override;
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BitSet32 GetRegUtilization() const override;
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BitSet32 CountRegsIn(preg_t preg, u32 lookahead) const override;
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BitSet32 CountRegsIn(preg_t preg, u32 lookahead) const override;
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};
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};
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@ -592,29 +592,25 @@ void RegCache::StoreFromRegister(preg_t i, FlushMode mode)
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X64Reg RegCache::GetFreeXReg()
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X64Reg RegCache::GetFreeXReg()
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{
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{
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size_t aCount;
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const auto order = GetAllocationOrder();
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const X64Reg* aOrder = GetAllocationOrder(&aCount);
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for (const X64Reg xr : order)
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for (size_t i = 0; i < aCount; i++)
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{
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{
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X64Reg xr = aOrder[i];
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if (m_xregs[xr].IsFree())
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if (m_xregs[xr].IsFree())
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{
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return xr;
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return xr;
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}
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}
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}
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// Okay, not found; run the register allocator heuristic and figure out which register we should
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// Okay, not found; run the register allocator heuristic and
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// clobber.
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// figure out which register we should clobber.
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float min_score = std::numeric_limits<float>::max();
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float min_score = std::numeric_limits<float>::max();
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X64Reg best_xreg = INVALID_REG;
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X64Reg best_xreg = INVALID_REG;
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size_t best_preg = 0;
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size_t best_preg = 0;
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for (size_t i = 0; i < aCount; i++)
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for (const X64Reg xreg : order)
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{
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{
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X64Reg xreg = (X64Reg)aOrder[i];
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const preg_t preg = m_xregs[xreg].Contents();
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preg_t preg = m_xregs[xreg].Contents();
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if (m_xregs[xreg].IsLocked() || m_regs[preg].IsLocked())
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if (m_xregs[xreg].IsLocked() || m_regs[preg].IsLocked())
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continue;
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continue;
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float score = ScoreRegister(xreg);
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const float score = ScoreRegister(xreg);
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if (score < min_score)
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if (score < min_score)
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{
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{
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min_score = score;
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min_score = score;
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@ -637,11 +633,11 @@ X64Reg RegCache::GetFreeXReg()
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int RegCache::NumFreeRegisters() const
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int RegCache::NumFreeRegisters() const
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{
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{
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int count = 0;
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int count = 0;
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size_t aCount;
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for (const X64Reg reg : GetAllocationOrder())
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const X64Reg* aOrder = GetAllocationOrder(&aCount);
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{
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for (size_t i = 0; i < aCount; i++)
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if (m_xregs[reg].IsFree())
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if (m_xregs[aOrder[i]].IsFree())
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count++;
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count++;
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}
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return count;
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return count;
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}
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}
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@ -5,6 +5,7 @@
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#include <array>
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#include <array>
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#include <cstddef>
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#include <cstddef>
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#include <span>
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#include <type_traits>
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#include <type_traits>
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#include <variant>
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#include <variant>
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@ -187,7 +188,7 @@ protected:
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virtual void StoreRegister(preg_t preg, const Gen::OpArg& new_loc) = 0;
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virtual void StoreRegister(preg_t preg, const Gen::OpArg& new_loc) = 0;
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virtual void LoadRegister(preg_t preg, Gen::X64Reg new_loc) = 0;
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virtual void LoadRegister(preg_t preg, Gen::X64Reg new_loc) = 0;
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virtual const Gen::X64Reg* GetAllocationOrder(size_t* count) const = 0;
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virtual std::span<const Gen::X64Reg> GetAllocationOrder() const = 0;
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virtual BitSet32 GetRegUtilization() const = 0;
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virtual BitSet32 GetRegUtilization() const = 0;
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virtual BitSet32 CountRegsIn(preg_t preg, u32 lookahead) const = 0;
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virtual BitSet32 CountRegsIn(preg_t preg, u32 lookahead) const = 0;
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