ShuriZma
/
dolphin
mirror of https://github.com/dolphin-emu/dolphin.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Merge pull request #846 from lioncash/fpscr-enum 

Core: Move FPSCR exception flags to a typed enum
This commit is contained in:
skidau 2014-10-14 12:33:57 +11:00
parent 81e2cf7490 843a3f6c15
commit 96a2b74c02
2 changed files with 26 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

43
Source/Core/Core/PowerPC/Gekko.h
View File

@ -396,28 +396,31 @@ union UReg_MSR
#define FPRF_MASK (0x1F << FPRF_SHIFT)
// FPSCR exception flags
const u32 FPSCR_FX = 1U << (31 - 0);
const u32 FPSCR_FEX = 1U << (31 - 1);
const u32 FPSCR_VX = 1U << (31 - 2);
const u32 FPSCR_OX = 1U << (31 - 3);
const u32 FPSCR_UX = 1U << (31 - 4);
const u32 FPSCR_ZX = 1U << (31 - 5);
const u32 FPSCR_XX = 1U << (31 - 6);
const u32 FPSCR_VXSNAN = 1U << (31 - 7);
const u32 FPSCR_VXISI = 1U << (31 - 8);
const u32 FPSCR_VXIDI = 1U << (31 - 9);
const u32 FPSCR_VXZDZ = 1U << (31 - 10);
const u32 FPSCR_VXIMZ = 1U << (31 - 11);
const u32 FPSCR_VXVC = 1U << (31 - 12);
const u32 FPSCR_VXSOFT = 1U << (31 - 21);
const u32 FPSCR_VXSQRT = 1U << (31 - 22);
const u32 FPSCR_VXCVI = 1U << (31 - 23);
const u32 FPSCR_VE = 1U << (31 - 24);
enum FPSCRExceptionFlag : u32
{
FPSCR_FX = 1U << (31 - 0),
FPSCR_FEX = 1U << (31 - 1),
FPSCR_VX = 1U << (31 - 2),
FPSCR_OX = 1U << (31 - 3),
FPSCR_UX = 1U << (31 - 4),
FPSCR_ZX = 1U << (31 - 5),
FPSCR_XX = 1U << (31 - 6),
FPSCR_VXSNAN = 1U << (31 - 7),
FPSCR_VXISI = 1U << (31 - 8),
FPSCR_VXIDI = 1U << (31 - 9),
FPSCR_VXZDZ = 1U << (31 - 10),
FPSCR_VXIMZ = 1U << (31 - 11),
FPSCR_VXVC = 1U << (31 - 12),
FPSCR_VXSOFT = 1U << (31 - 21),
FPSCR_VXSQRT = 1U << (31 - 22),
FPSCR_VXCVI = 1U << (31 - 23),
FPSCR_VE = 1U << (31 - 24),
const u32 FPSCR_VX_ANY = FPSCR_VXSNAN | FPSCR_VXISI | FPSCR_VXIDI | FPSCR_VXZDZ | FPSCR_VXIMZ |
FPSCR_VXVC | FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI;
FPSCR_VX_ANY = FPSCR_VXSNAN | FPSCR_VXISI | FPSCR_VXIDI | FPSCR_VXZDZ | FPSCR_VXIMZ |
FPSCR_VXVC | FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI,
const u32 FPSCR_ANY_X = FPSCR_OX | FPSCR_UX | FPSCR_ZX | FPSCR_XX | FPSCR_VX_ANY;
FPSCR_ANY_X = FPSCR_OX | FPSCR_UX | FPSCR_ZX | FPSCR_XX | FPSCR_VX_ANY,
};
// Floating Point Status and Control Register
union UReg_FPSCR

5
Source/Core/Core/PowerPC/Interpreter/Interpreter_FPUtils.h
View File

@ -8,6 +8,7 @@
#include "Common/CPUDetect.h"
#include "Common/MathUtil.h"
#include "Core/PowerPC/Gekko.h"
#include "Core/PowerPC/Interpreter/Interpreter.h"
// warning! very slow! This setting fixes NAN
@ -16,8 +17,8 @@
#define MIN_SINGLE 0xc7efffffe0000000ull
#define MAX_SINGLE 0x47efffffe0000000ull
const u64 PPC_NAN_U64 = 0x7ff8000000000000ull;
const double PPC_NAN = *(double* const)&PPC_NAN_U64;
const u64 PPC_NAN_U64 = 0x7ff8000000000000ull;
const double PPC_NAN = *(double* const)&PPC_NAN_U64;
// the 4 less-significand bits in FPSCR[FPRF]
enum FPCC