CommandProcessor: Fix shadowing warnings
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f1b1f5c013
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9559c45cae
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@ -221,30 +221,30 @@ void CommandProcessorManager::RegisterMMIO(Core::System& system, MMIO::Mapping*
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MMIO::InvalidWrite<u16>());
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MMIO::InvalidWrite<u16>());
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}
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}
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mmio->Register(base | STATUS_REGISTER, MMIO::ComplexRead<u16>([](Core::System& system, u32) {
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mmio->Register(base | STATUS_REGISTER, MMIO::ComplexRead<u16>([](Core::System& system_, u32) {
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auto& cp = system.GetCommandProcessor();
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auto& cp = system_.GetCommandProcessor();
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system.GetFifo().SyncGPUForRegisterAccess(system);
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system_.GetFifo().SyncGPUForRegisterAccess(system_);
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cp.SetCpStatusRegister(system);
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cp.SetCpStatusRegister(system_);
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return cp.m_cp_status_reg.Hex;
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return cp.m_cp_status_reg.Hex;
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}),
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}),
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MMIO::InvalidWrite<u16>());
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MMIO::InvalidWrite<u16>());
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mmio->Register(base | CTRL_REGISTER, MMIO::DirectRead<u16>(&m_cp_ctrl_reg.Hex),
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mmio->Register(base | CTRL_REGISTER, MMIO::DirectRead<u16>(&m_cp_ctrl_reg.Hex),
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MMIO::ComplexWrite<u16>([](Core::System& system, u32, u16 val) {
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MMIO::ComplexWrite<u16>([](Core::System& system_, u32, u16 val) {
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auto& cp = system.GetCommandProcessor();
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auto& cp = system_.GetCommandProcessor();
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UCPCtrlReg tmp(val);
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UCPCtrlReg tmp(val);
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cp.m_cp_ctrl_reg.Hex = tmp.Hex;
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cp.m_cp_ctrl_reg.Hex = tmp.Hex;
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cp.SetCpControlRegister(system);
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cp.SetCpControlRegister(system_);
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system.GetFifo().RunGpu(system);
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system_.GetFifo().RunGpu(system_);
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}));
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}));
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mmio->Register(base | CLEAR_REGISTER, MMIO::DirectRead<u16>(&m_cp_clear_reg.Hex),
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mmio->Register(base | CLEAR_REGISTER, MMIO::DirectRead<u16>(&m_cp_clear_reg.Hex),
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MMIO::ComplexWrite<u16>([](Core::System& system, u32, u16 val) {
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MMIO::ComplexWrite<u16>([](Core::System& system_, u32, u16 val) {
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auto& cp = system.GetCommandProcessor();
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auto& cp = system_.GetCommandProcessor();
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UCPClearReg tmp(val);
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UCPClearReg tmp(val);
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cp.m_cp_clear_reg.Hex = tmp.Hex;
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cp.m_cp_clear_reg.Hex = tmp.Hex;
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cp.SetCpClearRegister();
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cp.SetCpClearRegister();
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system.GetFifo().RunGpu(system);
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system_.GetFifo().RunGpu(system_);
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}));
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}));
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mmio->Register(base | PERF_SELECT, MMIO::InvalidRead<u16>(), MMIO::Nop<u16>());
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mmio->Register(base | PERF_SELECT, MMIO::InvalidRead<u16>(), MMIO::Nop<u16>());
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@ -254,20 +254,20 @@ void CommandProcessorManager::RegisterMMIO(Core::System& system, MMIO::Mapping*
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MMIO::ReadHandlingMethod<u16>* fifo_rw_distance_lo_r;
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MMIO::ReadHandlingMethod<u16>* fifo_rw_distance_lo_r;
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if (is_on_thread)
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if (is_on_thread)
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{
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{
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fifo_rw_distance_lo_r = MMIO::ComplexRead<u16>([](Core::System& system, u32) {
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fifo_rw_distance_lo_r = MMIO::ComplexRead<u16>([](Core::System& system_, u32) {
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const auto& fifo = system.GetCommandProcessor().GetFifo();
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const auto& fifo_ = system_.GetCommandProcessor().GetFifo();
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if (fifo.CPWritePointer.load(std::memory_order_relaxed) >=
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if (fifo_.CPWritePointer.load(std::memory_order_relaxed) >=
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fifo.SafeCPReadPointer.load(std::memory_order_relaxed))
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fifo_.SafeCPReadPointer.load(std::memory_order_relaxed))
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{
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{
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return static_cast<u16>(fifo.CPWritePointer.load(std::memory_order_relaxed) -
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return static_cast<u16>(fifo_.CPWritePointer.load(std::memory_order_relaxed) -
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fifo.SafeCPReadPointer.load(std::memory_order_relaxed));
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fifo_.SafeCPReadPointer.load(std::memory_order_relaxed));
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}
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}
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else
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else
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{
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{
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return static_cast<u16>(fifo.CPEnd.load(std::memory_order_relaxed) -
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return static_cast<u16>(fifo_.CPEnd.load(std::memory_order_relaxed) -
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fifo.SafeCPReadPointer.load(std::memory_order_relaxed) +
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fifo_.SafeCPReadPointer.load(std::memory_order_relaxed) +
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fifo.CPWritePointer.load(std::memory_order_relaxed) -
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fifo_.CPWritePointer.load(std::memory_order_relaxed) -
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fifo.CPBase.load(std::memory_order_relaxed) + 32);
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fifo_.CPBase.load(std::memory_order_relaxed) + 32);
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}
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}
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});
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});
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}
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}
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@ -282,40 +282,40 @@ void CommandProcessorManager::RegisterMMIO(Core::System& system, MMIO::Mapping*
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MMIO::ReadHandlingMethod<u16>* fifo_rw_distance_hi_r;
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MMIO::ReadHandlingMethod<u16>* fifo_rw_distance_hi_r;
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if (is_on_thread)
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if (is_on_thread)
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{
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{
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fifo_rw_distance_hi_r = MMIO::ComplexRead<u16>([](Core::System& system, u32) {
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fifo_rw_distance_hi_r = MMIO::ComplexRead<u16>([](Core::System& system_, u32) {
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const auto& fifo = system.GetCommandProcessor().GetFifo();
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const auto& fifo_ = system_.GetCommandProcessor().GetFifo();
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system.GetFifo().SyncGPUForRegisterAccess(system);
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system_.GetFifo().SyncGPUForRegisterAccess(system_);
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if (fifo.CPWritePointer.load(std::memory_order_relaxed) >=
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if (fifo_.CPWritePointer.load(std::memory_order_relaxed) >=
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fifo.SafeCPReadPointer.load(std::memory_order_relaxed))
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fifo_.SafeCPReadPointer.load(std::memory_order_relaxed))
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{
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{
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return (fifo.CPWritePointer.load(std::memory_order_relaxed) -
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return (fifo_.CPWritePointer.load(std::memory_order_relaxed) -
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fifo.SafeCPReadPointer.load(std::memory_order_relaxed)) >>
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fifo_.SafeCPReadPointer.load(std::memory_order_relaxed)) >>
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16;
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16;
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}
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}
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else
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else
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{
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{
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return (fifo.CPEnd.load(std::memory_order_relaxed) -
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return (fifo_.CPEnd.load(std::memory_order_relaxed) -
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fifo.SafeCPReadPointer.load(std::memory_order_relaxed) +
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fifo_.SafeCPReadPointer.load(std::memory_order_relaxed) +
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fifo.CPWritePointer.load(std::memory_order_relaxed) -
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fifo_.CPWritePointer.load(std::memory_order_relaxed) -
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fifo.CPBase.load(std::memory_order_relaxed) + 32) >>
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fifo_.CPBase.load(std::memory_order_relaxed) + 32) >>
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16;
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16;
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}
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}
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});
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});
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}
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}
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else
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else
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{
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{
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fifo_rw_distance_hi_r = MMIO::ComplexRead<u16>([](Core::System& system, u32) {
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fifo_rw_distance_hi_r = MMIO::ComplexRead<u16>([](Core::System& system_, u32) {
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const auto& fifo = system.GetCommandProcessor().GetFifo();
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const auto& fifo_ = system_.GetCommandProcessor().GetFifo();
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system.GetFifo().SyncGPUForRegisterAccess(system);
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system_.GetFifo().SyncGPUForRegisterAccess(system_);
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return fifo.CPReadWriteDistance.load(std::memory_order_relaxed) >> 16;
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return fifo_.CPReadWriteDistance.load(std::memory_order_relaxed) >> 16;
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});
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});
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}
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}
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mmio->Register(base | FIFO_RW_DISTANCE_HI, fifo_rw_distance_hi_r,
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mmio->Register(base | FIFO_RW_DISTANCE_HI, fifo_rw_distance_hi_r,
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MMIO::ComplexWrite<u16>([WMASK_HI_RESTRICT](Core::System& system, u32, u16 val) {
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MMIO::ComplexWrite<u16>([WMASK_HI_RESTRICT](Core::System& system_, u32, u16 val) {
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auto& fifo = system.GetCommandProcessor().GetFifo();
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auto& fifo_ = system_.GetCommandProcessor().GetFifo();
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system.GetFifo().SyncGPUForRegisterAccess(system);
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system_.GetFifo().SyncGPUForRegisterAccess(system_);
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WriteHigh(fifo.CPReadWriteDistance, val & WMASK_HI_RESTRICT);
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WriteHigh(fifo_.CPReadWriteDistance, val & WMASK_HI_RESTRICT);
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system.GetFifo().RunGpu(system);
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system_.GetFifo().RunGpu(system_);
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}));
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}));
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mmio->Register(
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mmio->Register(
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@ -328,31 +328,33 @@ void CommandProcessorManager::RegisterMMIO(Core::System& system, MMIO::Mapping*
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MMIO::WriteHandlingMethod<u16>* fifo_read_hi_w;
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MMIO::WriteHandlingMethod<u16>* fifo_read_hi_w;
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if (is_on_thread)
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if (is_on_thread)
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{
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{
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fifo_read_hi_r = MMIO::ComplexRead<u16>([](Core::System& system, u32) {
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fifo_read_hi_r = MMIO::ComplexRead<u16>([](Core::System& system_, u32) {
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auto& fifo = system.GetCommandProcessor().GetFifo();
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auto& fifo_ = system_.GetCommandProcessor().GetFifo();
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system.GetFifo().SyncGPUForRegisterAccess(system);
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system_.GetFifo().SyncGPUForRegisterAccess(system_);
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return fifo.SafeCPReadPointer.load(std::memory_order_relaxed) >> 16;
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return fifo_.SafeCPReadPointer.load(std::memory_order_relaxed) >> 16;
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});
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fifo_read_hi_w = MMIO::ComplexWrite<u16>([WMASK_HI_RESTRICT](Core::System& sys, u32, u16 val) {
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auto& fifo = sys.GetCommandProcessor().GetFifo();
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sys.GetFifo().SyncGPUForRegisterAccess(sys);
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WriteHigh(fifo.CPReadPointer, val & WMASK_HI_RESTRICT);
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fifo.SafeCPReadPointer.store(fifo.CPReadPointer.load(std::memory_order_relaxed),
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std::memory_order_relaxed);
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});
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});
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fifo_read_hi_w =
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MMIO::ComplexWrite<u16>([WMASK_HI_RESTRICT](Core::System& system_, u32, u16 val) {
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auto& fifo_ = system_.GetCommandProcessor().GetFifo();
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system_.GetFifo().SyncGPUForRegisterAccess(system_);
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WriteHigh(fifo_.CPReadPointer, val & WMASK_HI_RESTRICT);
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fifo_.SafeCPReadPointer.store(fifo_.CPReadPointer.load(std::memory_order_relaxed),
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std::memory_order_relaxed);
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});
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}
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}
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else
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else
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{
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{
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fifo_read_hi_r = MMIO::ComplexRead<u16>([](Core::System& system, u32) {
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fifo_read_hi_r = MMIO::ComplexRead<u16>([](Core::System& system_, u32) {
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const auto& fifo = system.GetCommandProcessor().GetFifo();
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const auto& fifo_ = system_.GetCommandProcessor().GetFifo();
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system.GetFifo().SyncGPUForRegisterAccess(system);
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system_.GetFifo().SyncGPUForRegisterAccess(system_);
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return fifo.CPReadPointer.load(std::memory_order_relaxed) >> 16;
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return fifo_.CPReadPointer.load(std::memory_order_relaxed) >> 16;
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});
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fifo_read_hi_w = MMIO::ComplexWrite<u16>([WMASK_HI_RESTRICT](Core::System& sys, u32, u16 val) {
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auto& fifo = sys.GetCommandProcessor().GetFifo();
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sys.GetFifo().SyncGPUForRegisterAccess(sys);
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WriteHigh(fifo.CPReadPointer, val & WMASK_HI_RESTRICT);
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});
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});
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fifo_read_hi_w =
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MMIO::ComplexWrite<u16>([WMASK_HI_RESTRICT](Core::System& system_, u32, u16 val) {
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auto& fifo_ = system_.GetCommandProcessor().GetFifo();
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system_.GetFifo().SyncGPUForRegisterAccess(system_);
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WriteHigh(fifo_.CPReadPointer, val & WMASK_HI_RESTRICT);
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});
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}
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}
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mmio->Register(base | FIFO_READ_POINTER_HI, fifo_read_hi_r, fifo_read_hi_w);
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mmio->Register(base | FIFO_READ_POINTER_HI, fifo_read_hi_r, fifo_read_hi_w);
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}
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}
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