Arm64Emitter: Make IsImmArithmetic, IsImmLogical, FPImm8ToFloat, and FPImm8FromFloat internally linked
These aren't used anywhere outside of the emitter. Centralizes them under an anonymous namespace.
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@ -16,11 +16,13 @@
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namespace Arm64Gen
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namespace Arm64Gen
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{
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{
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namespace
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{
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const int kWRegSizeInBits = 32;
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const int kWRegSizeInBits = 32;
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const int kXRegSizeInBits = 64;
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const int kXRegSizeInBits = 64;
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// The below few functions are taken from V8.
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// The below few functions are taken from V8.
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static int CountLeadingZeros(uint64_t value, int width)
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int CountLeadingZeros(uint64_t value, int width)
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{
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{
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// TODO(jbramley): Optimize this for ARM64 hosts.
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// TODO(jbramley): Optimize this for ARM64 hosts.
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int count = 0;
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int count = 0;
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@ -33,11 +35,12 @@ static int CountLeadingZeros(uint64_t value, int width)
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return count;
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return count;
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}
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}
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static uint64_t LargestPowerOf2Divisor(uint64_t value)
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uint64_t LargestPowerOf2Divisor(uint64_t value)
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{
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{
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return value & -(int64_t)value;
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return value & -(int64_t)value;
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}
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}
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// For ADD/SUB
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bool IsImmArithmetic(uint64_t input, u32* val, bool* shift)
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bool IsImmArithmetic(uint64_t input, u32* val, bool* shift)
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{
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{
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if (input < 4096)
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if (input < 4096)
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@ -55,6 +58,7 @@ bool IsImmArithmetic(uint64_t input, u32* val, bool* shift)
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return false;
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return false;
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}
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}
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// For AND/TST/ORR/EOR etc
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bool IsImmLogical(uint64_t value, unsigned int width, unsigned int* n, unsigned int* imm_s,
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bool IsImmLogical(uint64_t value, unsigned int width, unsigned int* n, unsigned int* imm_s,
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unsigned int* imm_r)
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unsigned int* imm_r)
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{
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{
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@ -260,6 +264,39 @@ bool IsImmLogical(uint64_t value, unsigned int width, unsigned int* n, unsigned
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return true;
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return true;
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}
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}
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float FPImm8ToFloat(uint8_t bits)
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{
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int sign = bits >> 7;
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uint32_t f = (sign << 31);
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int bit6 = (bits >> 6) & 1;
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uint32_t exp = ((!bit6) << 7) | (0x7C * bit6) | ((bits >> 4) & 3);
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uint32_t mantissa = (bits & 0xF) << 19;
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f |= exp << 23;
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f |= mantissa;
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float fl;
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memcpy(&fl, &f, sizeof(float));
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return fl;
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}
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bool FPImm8FromFloat(float value, uint8_t* immOut)
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{
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uint32_t f;
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memcpy(&f, &value, sizeof(float));
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uint32_t mantissa4 = (f & 0x7FFFFF) >> 19;
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uint32_t exponent = (f >> 23) & 0xFF;
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uint32_t sign = f >> 31;
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if ((exponent >> 7) == ((exponent >> 6) & 1))
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return false;
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uint8_t imm8 = (sign << 7) | ((!(exponent >> 7)) << 6) | ((exponent & 3) << 4) | mantissa4;
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float newFloat = FPImm8ToFloat(imm8);
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if (newFloat == value)
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*immOut = imm8;
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else
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return false;
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return true;
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}
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} // Anonymous namespace
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void ARM64XEmitter::SetCodePtrUnsafe(u8* ptr)
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void ARM64XEmitter::SetCodePtrUnsafe(u8* ptr)
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{
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{
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m_code = ptr;
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m_code = ptr;
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@ -4287,38 +4324,6 @@ bool ARM64XEmitter::TryEORI2R(ARM64Reg Rd, ARM64Reg Rn, u32 imm)
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return true;
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return true;
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}
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}
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float FPImm8ToFloat(uint8_t bits)
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{
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int sign = bits >> 7;
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uint32_t f = (sign << 31);
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int bit6 = (bits >> 6) & 1;
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uint32_t exp = ((!bit6) << 7) | (0x7C * bit6) | ((bits >> 4) & 3);
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uint32_t mantissa = (bits & 0xF) << 19;
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f |= exp << 23;
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f |= mantissa;
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float fl;
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memcpy(&fl, &f, sizeof(float));
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return fl;
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}
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bool FPImm8FromFloat(float value, uint8_t* immOut)
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{
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uint32_t f;
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memcpy(&f, &value, sizeof(float));
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uint32_t mantissa4 = (f & 0x7FFFFF) >> 19;
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uint32_t exponent = (f >> 23) & 0xFF;
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uint32_t sign = f >> 31;
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if ((exponent >> 7) == ((exponent >> 6) & 1))
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return false;
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uint8_t imm8 = (sign << 7) | ((!(exponent >> 7)) << 6) | ((exponent & 3) << 4) | mantissa4;
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float newFloat = FPImm8ToFloat(imm8);
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if (newFloat == value)
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*immOut = imm8;
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else
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return false;
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return true;
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}
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void ARM64FloatEmitter::MOVI2F(ARM64Reg Rd, float value, ARM64Reg scratch, bool negate)
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void ARM64FloatEmitter::MOVI2F(ARM64Reg Rd, float value, ARM64Reg scratch, bool negate)
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{
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{
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ASSERT_MSG(DYNA_REC, !IsDouble(Rd), "MOVI2F does not yet support double precision");
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ASSERT_MSG(DYNA_REC, !IsDouble(Rd), "MOVI2F does not yet support double precision");
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@ -277,15 +277,6 @@ constexpr ARM64Reg EncodeRegToQuad(ARM64Reg reg)
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return static_cast<ARM64Reg>(reg | 0xC0);
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return static_cast<ARM64Reg>(reg | 0xC0);
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}
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}
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// For AND/TST/ORR/EOR etc
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bool IsImmLogical(uint64_t value, unsigned int width, unsigned int* n, unsigned int* imm_s,
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unsigned int* imm_r);
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// For ADD/SUB
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bool IsImmArithmetic(uint64_t input, u32* val, bool* shift);
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float FPImm8ToFloat(uint8_t bits);
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bool FPImm8FromFloat(float value, uint8_t* immOut);
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enum OpType
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enum OpType
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{
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{
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TYPE_IMM = 0,
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TYPE_IMM = 0,
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