DSP Jit removed useless push/pop (at least I hope they were useless).
enabled nr in jit after getting skid_au's help in writing the inscrease_addr_reg. ector can you please take a look and see if the loop code makes sense? it seems no one it really sure how loops suppose to work in jit git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5301 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
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6136c94de5
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@ -110,7 +110,7 @@ void DSPEmitter::Default(UDSPInstruction _inst)
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const u8 *DSPEmitter::Compile(int start_addr) {
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const u8 *DSPEmitter::Compile(int start_addr) {
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AlignCode16();
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AlignCode16();
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const u8 *entryPoint = GetCodePtr();
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const u8 *entryPoint = GetCodePtr();
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ABI_PushAllCalleeSavedRegsAndAdjustStack();
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// ABI_PushAllCalleeSavedRegsAndAdjustStack();
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int addr = start_addr;
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int addr = start_addr;
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@ -129,8 +129,8 @@ const u8 *DSPEmitter::Compile(int start_addr) {
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CMP(32, R(EAX), Imm32(0));
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CMP(32, R(EAX), Imm32(0));
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FixupBranch noExceptionOccurred = J_CC(CC_L);
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FixupBranch noExceptionOccurred = J_CC(CC_L);
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ABI_CallFunction((void *)DSPInterpreter::HandleLoop);
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// ABI_CallFunction((void *)DSPInterpreter::HandleLoop);
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ABI_PopAllCalleeSavedRegsAndAdjustStack();
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// ABI_PopAllCalleeSavedRegsAndAdjustStack();
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RET();
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RET();
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SetJumpTarget(skipCheck);
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SetJumpTarget(skipCheck);
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@ -152,10 +152,10 @@ const u8 *DSPEmitter::Compile(int start_addr) {
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CMP(32, R(EAX), Imm32(0));
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CMP(32, R(EAX), Imm32(0));
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FixupBranch rLoopCounterExit = J_CC(CC_LE);
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FixupBranch rLoopCounterExit = J_CC(CC_LE);
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// These functions branch and therefore only need to be called in the end
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// These functions branch and therefore only need to be called in the
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// of each block and in this order
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// end of each block and in this order
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ABI_CallFunction((void *)&DSPInterpreter::HandleLoop);
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ABI_CallFunction((void *)&DSPInterpreter::HandleLoop);
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ABI_PopAllCalleeSavedRegsAndAdjustStack();
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// ABI_PopAllCalleeSavedRegsAndAdjustStack();
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RET();
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RET();
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SetJumpTarget(rLoopAddressExit);
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SetJumpTarget(rLoopAddressExit);
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@ -171,13 +171,13 @@ const u8 *DSPEmitter::Compile(int start_addr) {
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}
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}
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if (opcode->branch || endBlock[addr]
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if (opcode->branch || endBlock[addr]
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|| DSPAnalyzer::code_flags[addr] & DSPAnalyzer::CODE_IDLE_SKIP)
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|| (DSPAnalyzer::code_flags[addr] & DSPAnalyzer::CODE_IDLE_SKIP)) {
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break;
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break;
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}
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addr += opcode->size;
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addr += opcode->size;
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}
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}
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ABI_PopAllCalleeSavedRegsAndAdjustStack();
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// ABI_PopAllCalleeSavedRegsAndAdjustStack();
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RET();
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RET();
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blocks[start_addr] = (CompiledCode)entryPoint;
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blocks[start_addr] = (CompiledCode)entryPoint;
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@ -32,6 +32,8 @@ class DSPEmitter : public Gen::XCodeBlock
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CompiledCode *blocks;
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CompiledCode *blocks;
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u16 blockSize[0x10000];
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u16 blockSize[0x10000];
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bool *endBlock;
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bool *endBlock;
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DISALLOW_COPY_AND_ASSIGN(DSPEmitter);
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public:
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public:
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DSPEmitter();
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DSPEmitter();
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~DSPEmitter();
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~DSPEmitter();
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@ -45,8 +47,6 @@ public:
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const u8 *Compile(int start_addr);
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const u8 *Compile(int start_addr);
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void STACKALIGN RunBlock(int cycles);
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void STACKALIGN RunBlock(int cycles);
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DISALLOW_COPY_AND_ASSIGN(DSPEmitter);
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// Memory helper functions
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// Memory helper functions
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void increment_addr_reg(int reg);
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void increment_addr_reg(int reg);
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@ -310,7 +310,7 @@ const DSPOPCTemplate opcodes_ext[] =
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{"DR", 0x0004, 0x00fc, DSPInterpreter::Ext::dr, &DSPEmitter::dr, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false},
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{"DR", 0x0004, 0x00fc, DSPInterpreter::Ext::dr, &DSPEmitter::dr, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false},
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{"IR", 0x0008, 0x00fc, DSPInterpreter::Ext::ir, &DSPEmitter::ir, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false},
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{"IR", 0x0008, 0x00fc, DSPInterpreter::Ext::ir, &DSPEmitter::ir, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false},
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{"NR", 0x000c, 0x00fc, DSPInterpreter::Ext::nr, NULL /*&DSPEmitter::nr*/, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false},
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{"NR", 0x000c, 0x00fc, DSPInterpreter::Ext::nr, &DSPEmitter::nr, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false},
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{"MV", 0x0010, 0x00f0, DSPInterpreter::Ext::mv, NULL /*&DSPEmitter::mv*/, 1, +2, {{P_REG18, 1, 0, 2, 0x000c}, {P_REG1C, 1, 0, 0, 0x0003}}, false, false},
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{"MV", 0x0010, 0x00f0, DSPInterpreter::Ext::mv, NULL /*&DSPEmitter::mv*/, 1, +2, {{P_REG18, 1, 0, 2, 0x000c}, {P_REG1C, 1, 0, 0, 0x0003}}, false, false},
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{"S", 0x0020, 0x00e4, DSPInterpreter::Ext::s, NULL /*&DSPEmitter::s*/, 1, 2, {{P_PRG, 1, 0, 0, 0x0003}, {P_REG1C, 1, 0, 3, 0x0018}}, false, false},
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{"S", 0x0020, 0x00e4, DSPInterpreter::Ext::s, NULL /*&DSPEmitter::s*/, 1, 2, {{P_PRG, 1, 0, 0, 0x0003}, {P_REG1C, 1, 0, 3, 0x0018}}, false, false},
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@ -25,72 +25,69 @@
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using namespace Gen;
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using namespace Gen;
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// HORRIBLE UGLINESS, someone please fix.
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// HORRIBLE UGLINESS, someone please fix.
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// See http://code.google.com/p/dolphin-emu/source/detail?r=3125
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// See http://code.google.com/p/dolphin-emu/source/detail?r=3125
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void DSPEmitter::increment_addr_reg(int reg)
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void DSPEmitter::increment_addr_reg(int reg)
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{
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{
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ABI_PushAllCalleeSavedRegsAndAdjustStack();
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// u16 tmb = g_dsp.r[DSP_REG_WR0 + reg];
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// u16 tmb = g_dsp.r[DSP_REG_WR0 + reg];
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MOV(16, R(EAX), M(&g_dsp.r[DSP_REG_WR0 + reg]));
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MOVZX(32, 16, EAX, M(&g_dsp.r[DSP_REG_WR0 + reg]));
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// tmb = tmb | (tmb >> 8);
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// tmb = tmb | (tmb >> 8);
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MOV(16, R(EBX), R(EAX));
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MOV(16, R(ECX), R(EAX));
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SHR(16, R(EBX), Imm8(8));
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SHR(16, R(ECX), Imm8(8));
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OR(16, R(EAX), R(EBX));
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OR(16, R(EAX), R(ECX));
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// tmb = tmb | (tmb >> 4);
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// tmb = tmb | (tmb >> 4);
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MOV(16, R(EBX), R(EAX));
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MOV(16, R(ECX), R(EAX));
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SHR(16, R(EBX), Imm8(4));
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SHR(16, R(ECX), Imm8(4));
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OR(16, R(EAX), R(EBX));
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OR(16, R(EAX), R(ECX));
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// tmb = tmb | (tmb >> 2);
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// tmb = tmb | (tmb >> 2);
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MOV(16, R(EBX), R(EAX));
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MOV(16, R(ECX), R(EAX));
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SHR(16, R(EBX), Imm8(2));
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SHR(16, R(ECX), Imm8(2));
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OR(16, R(EAX), R(EBX));
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OR(16, R(EAX), R(ECX));
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// tmb = tmb | (tmb >> 1);
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// tmb = tmb | (tmb >> 1);
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MOV(16, R(EBX), R(EAX));
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MOV(16, R(ECX), R(EAX));
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SHR(16, R(EBX), Imm8(1));
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SHR(16, R(ECX), Imm8(1));
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OR(16, R(EAX), R(EBX));
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OR(16, R(EAX), R(ECX));
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// s16 tmp = g_dsp.r[reg];
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// s16 tmp = g_dsp.r[reg];
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MOV(16, R(EBX), M(&g_dsp.r[reg]));
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MOVZX(32, 16, ECX, M(&g_dsp.r[reg]));
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// if ((tmp & tmb) == tmb)
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// if ((tmp & tmb) == tmb)
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AND(16, R(EAX), R(EBX));
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AND(16, R(ECX), R(EAX));
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CMP(16, R(EAX), R(EBX));
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CMP(16, R(EAX), R(ECX));
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FixupBranch not_equal = J_CC(CC_NZ);
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FixupBranch not_equal = J_CC(CC_NZ);
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// tmp ^= g_dsp.r[DSP_REG_WR0 + reg];
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// tmp ^= g_dsp.r[DSP_REG_WR0 + reg];
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XOR(16, R(EBX), M(&g_dsp.r[DSP_REG_WR0 + reg]));
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MOVZX(32, 16, ECX, M(&g_dsp.r[reg]));
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XOR(16, R(ECX), M(&g_dsp.r[DSP_REG_WR0 + reg]));
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FixupBranch end = J();
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FixupBranch end = J();
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SetJumpTarget(not_equal);
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SetJumpTarget(not_equal);
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// tmp++;
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// tmp++;
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ADD(16, R(EBX), Imm8(1));
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MOVZX(32, 16, ECX, M(&g_dsp.r[reg]));
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ADD(16, R(ECX), Imm16(1));
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SetJumpTarget(end);
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SetJumpTarget(end);
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// g_dsp.r[reg] = tmp;
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// g_dsp.r[reg] = tmp;
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MOV(16, M(&g_dsp.r[reg]), R(EBX));
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MOV(16, M(&g_dsp.r[reg]), R(ECX));
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ABI_PopAllCalleeSavedRegsAndAdjustStack();
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}
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}
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// See http://code.google.com/p/dolphin-emu/source/detail?r=3125
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// See http://code.google.com/p/dolphin-emu/source/detail?r=3125
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void DSPEmitter::decrement_addr_reg(int reg)
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void DSPEmitter::decrement_addr_reg(int reg)
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{
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{
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ABI_PushAllCalleeSavedRegsAndAdjustStack();
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// s16 tmp = g_dsp.r[reg];
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// s16 tmp = g_dsp.r[reg];
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MOV(16, R(EAX), M(&g_dsp.r[reg]));
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MOVZX(32, 16, EAX, M(&g_dsp.r[reg]));
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// if ((tmp & g_dsp.r[DSP_REG_WR0 + reg]) == 0)
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// if ((tmp & g_dsp.r[DSP_REG_WR0 + reg]) == 0)
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MOV(16, R(EBX), R(EAX));
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MOV(16, R(ECX), R(EAX));
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AND(16, R(EBX), M(&g_dsp.r[DSP_REG_WR0 + reg]));
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AND(16, R(ECX), M(&g_dsp.r[DSP_REG_WR0 + reg]));
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CMP(16, R(EBX), Imm8(0));
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// CMP(16, R(ECX), Imm8(0));
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FixupBranch not_equal = J_CC(CC_NZ);
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FixupBranch not_equal = J_CC(CC_NZ);
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// tmp |= g_dsp.r[DSP_REG_WR0 + reg];
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// tmp |= g_dsp.r[DSP_REG_WR0 + reg];
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@ -106,61 +103,91 @@ void DSPEmitter::decrement_addr_reg(int reg)
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// g_dsp.r[reg] = tmp;
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// g_dsp.r[reg] = tmp;
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MOV(16, M(&g_dsp.r[reg]), R(EAX));
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MOV(16, M(&g_dsp.r[reg]), R(EAX));
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ABI_PopAllCalleeSavedRegsAndAdjustStack();
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}
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}
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// Increase addr register according to the correspond ix register
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// Increase addr register according to the correspond ix register
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void DSPEmitter::increase_addr_reg(int reg)
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void DSPEmitter::increase_addr_reg(int reg)
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{
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{
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// s16 value = (s16)g_dsp.r[DSP_REG_IX0 + reg];
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MOVSX(32, 16, EDX, M(&g_dsp.r[DSP_REG_IX0 + reg]));
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/*
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// if (value > 0)
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MOV(16, R(EAX), M(&g_dsp.r[DSP_REG_IX0 + reg]));
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CMP(16, R(EDX), Imm16(0));
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CMP(16, R(EAX), Imm16(0));
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FixupBranch end = J_CC(CC_Z);
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FixupBranch end = J_CC(CC_Z);
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FixupBranch negValue = J_CC(CC_L);
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FixupBranch negValue = J_CC(CC_L);
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ABI_CallFunctionC((void *)increment_addr_reg, reg);
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// for (int i = 0; i < value; i++)
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XOR(32, R(ESI), R(ESI)); // i = 0
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FixupBranch posloop;
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SetJumpTarget(posloop);
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increment_addr_reg(reg);
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ADD(32, R(ESI), Imm32(1)); // i++
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CMP(32, R(ESI), R(EDX)); // i < value
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FixupBranch posValue = J();
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FixupBranch posValue = J();
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// FIXME: get normal abs with cdq
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IMUL(32, EDX, Imm16(-1));
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SetJumpTarget(negValue);
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// for (int i = 0; i < (int)(-value); i++)
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ABI_CallFunctionC((void *)decrement_addr_reg, reg);
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XOR(32, R(ESI), R(ESI)); // i = 0
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FixupBranch negloop;
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SetJumpTarget(negloop);
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decrement_addr_reg(reg);
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ADD(32, R(ESI), Imm32(1)); // i++
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CMP(32, R(ESI), R(EDX)); // i < -value
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negloop = J_CC(CC_L);
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SetJumpTarget(posValue);
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SetJumpTarget(posValue);
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SetJumpTarget(end);
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SetJumpTarget(end);
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*/
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// TODO: DO RIGHT!
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s16 value = (s16)g_dsp.r[DSP_REG_IX0 + reg];
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if (value > 0) {
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for (int i = 0; i < value; i++) {
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increment_addr_reg(reg);
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}
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} else if (value < 0) {
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for (int i = 0; i < (int)(-value); i++) {
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decrement_addr_reg(reg);
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}
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}
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}
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}
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// Decrease addr register according to the correspond ix register
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// Decrease addr register according to the correspond ix register
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void DSPEmitter::decrease_addr_reg(int reg)
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void DSPEmitter::decrease_addr_reg(int reg)
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{
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{
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// TODO: DO RIGHT!
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// s16 value = (s16)g_dsp.r[DSP_REG_IX0 + reg];
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MOVSX(32, 16, EDX, M(&g_dsp.r[DSP_REG_IX0 + reg]));
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s16 value = (s16)g_dsp.r[DSP_REG_IX0 + reg];
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if (value > 0) {
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// if (value > 0)
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for (int i = 0; i < value; i++) {
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CMP(16, R(EDX), Imm16(0));
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decrement_addr_reg(reg);
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FixupBranch end = J_CC(CC_Z);
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}
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FixupBranch negValue = J_CC(CC_L);
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} else if (value < 0) {
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for (int i = 0; i < (int)(-value); i++) {
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// for (int i = 0; i < value; i++)
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increment_addr_reg(reg);
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XOR(32, R(ESI), R(ESI)); // i = 0
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}
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}
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FixupBranch posloop;
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SetJumpTarget(posloop);
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decrement_addr_reg(reg);
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ADD(32, R(ESI), Imm32(1)); // i++
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CMP(32, R(ESI), R(EDX)); // i < value
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FixupBranch posValue = J();
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// FIXME: get normal abs with cdq
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IMUL(32, EDX, Imm16(-1));
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// for (int i = 0; i < (int)(-value); i++)
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XOR(32, R(ESI), R(ESI)); // i = 0
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FixupBranch negloop;
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SetJumpTarget(negloop);
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increment_addr_reg(reg);
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ADD(32, R(ESI), Imm32(1)); // i++
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CMP(32, R(ESI), R(EDX)); // i < -value
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negloop = J_CC(CC_L);
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SetJumpTarget(posValue);
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SetJumpTarget(end);
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}
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}
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void DSPEmitter::ext_dmem_write(u32 dest, u32 src)
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void DSPEmitter::ext_dmem_write(u32 dest, u32 src)
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@ -173,20 +200,12 @@ void DSPEmitter::ext_dmem_write(u32 dest, u32 src)
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g_dsp.dram[addr & DSP_DRAM_MASK] = val;
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g_dsp.dram[addr & DSP_DRAM_MASK] = val;
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break;
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break;
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case 0x1: // 1xxx COEF
|
|
||||||
ERROR_LOG(DSPLLE, "Illegal write to COEF (pc = %02x)", g_dsp.pc);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 0xf: // Fxxx HW regs
|
case 0xf: // Fxxx HW regs
|
||||||
// Can ext write to ifx?
|
// Can ext write to ifx?
|
||||||
// gdsp_ifx_write(addr, val);
|
gdsp_ifx_write(addr, val);
|
||||||
ERROR_LOG(DSPLLE, "Illegal write to ifx (pc = %02x)", g_dsp.pc);
|
|
||||||
break;
|
|
||||||
|
|
||||||
default: // Unmapped/non-existing memory
|
|
||||||
ERROR_LOG(DSPLLE, "%04x DSP ERROR: Write to UNKNOWN (%04x) memory", g_dsp.pc, addr);
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
u16 DSPEmitter::ext_dmem_read(u16 addr)
|
u16 DSPEmitter::ext_dmem_read(u16 addr)
|
||||||
|
@ -196,17 +215,11 @@ u16 DSPEmitter::ext_dmem_read(u16 addr)
|
||||||
return g_dsp.dram[addr & DSP_DRAM_MASK];
|
return g_dsp.dram[addr & DSP_DRAM_MASK];
|
||||||
|
|
||||||
case 0x1: // 1xxx COEF
|
case 0x1: // 1xxx COEF
|
||||||
NOTICE_LOG(DSPLLE, "%04x : Coef Read @ %04x", g_dsp.pc, addr);
|
|
||||||
return g_dsp.coef[addr & DSP_COEF_MASK];
|
return g_dsp.coef[addr & DSP_COEF_MASK];
|
||||||
|
|
||||||
case 0xf: // Fxxx HW regs
|
case 0xf: // Fxxx HW regs
|
||||||
// Can ext read from ifx?
|
return gdsp_ifx_read(addr);
|
||||||
ERROR_LOG(DSPLLE, "Illegal read from ifx (pc = %02x)", g_dsp.pc);
|
|
||||||
// return gdsp_ifx_read(addr);
|
|
||||||
|
|
||||||
default: // Unmapped/non-existing memory
|
|
||||||
ERROR_LOG(DSPLLE, "%04x DSP ERROR: Read from UNKNOWN (%04x) memory", g_dsp.pc, addr);
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue