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DSP Jit removed useless push/pop (at least I hope they were useless). 

enabled nr in jit after getting skid_au's help in writing the inscrease_addr_reg.
ector can you please take a look and see if the loop code makes sense? it seems
no one it really sure how loops suppose to work in jit 


git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5301 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
nakeee 2010-04-09 15:11:02 +00:00
parent 6136c94de5
commit 91c6f5acba
4 changed files with 106 additions and 93 deletions
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18
Source/Core/DSPCore/Src/DSPEmitter.cpp
View File

@ -110,7 +110,7 @@ void DSPEmitter::Default(UDSPInstruction _inst)
const u8 *DSPEmitter::Compile(int start_addr) {
AlignCode16();
const u8 *entryPoint = GetCodePtr();
ABI_PushAllCalleeSavedRegsAndAdjustStack();
// ABI_PushAllCalleeSavedRegsAndAdjustStack();
int addr = start_addr;
@ -129,8 +129,8 @@ const u8 *DSPEmitter::Compile(int start_addr) {
CMP(32, R(EAX), Imm32(0));
FixupBranch noExceptionOccurred = J_CC(CC_L);
ABI_CallFunction((void *)DSPInterpreter::HandleLoop);
ABI_PopAllCalleeSavedRegsAndAdjustStack();
// ABI_CallFunction((void *)DSPInterpreter::HandleLoop);
// ABI_PopAllCalleeSavedRegsAndAdjustStack();
RET();
SetJumpTarget(skipCheck);
@ -152,10 +152,10 @@ const u8 *DSPEmitter::Compile(int start_addr) {
CMP(32, R(EAX), Imm32(0));
FixupBranch rLoopCounterExit = J_CC(CC_LE);
// These functions branch and therefore only need to be called in the end
// of each block and in this order
// These functions branch and therefore only need to be called in the
// end of each block and in this order
ABI_CallFunction((void *)&DSPInterpreter::HandleLoop);
ABI_PopAllCalleeSavedRegsAndAdjustStack();
// ABI_PopAllCalleeSavedRegsAndAdjustStack();
RET();
SetJumpTarget(rLoopAddressExit);
@ -171,13 +171,13 @@ const u8 *DSPEmitter::Compile(int start_addr) {
}
if (opcode->branch || endBlock[addr]
|| DSPAnalyzer::code_flags[addr] & DSPAnalyzer::CODE_IDLE_SKIP)
|| (DSPAnalyzer::code_flags[addr] & DSPAnalyzer::CODE_IDLE_SKIP)) {
break;
}
addr += opcode->size;
}
ABI_PopAllCalleeSavedRegsAndAdjustStack();
// ABI_PopAllCalleeSavedRegsAndAdjustStack();
RET();
blocks[start_addr] = (CompiledCode)entryPoint;

4
Source/Core/DSPCore/Src/DSPEmitter.h
View File

@ -32,6 +32,8 @@ class DSPEmitter : public Gen::XCodeBlock
CompiledCode *blocks;
u16 blockSize[0x10000];
bool *endBlock;
DISALLOW_COPY_AND_ASSIGN(DSPEmitter);
public:
DSPEmitter();
~DSPEmitter();
@ -45,8 +47,6 @@ public:
const u8 *Compile(int start_addr);
void STACKALIGN RunBlock(int cycles);
DISALLOW_COPY_AND_ASSIGN(DSPEmitter);
// Memory helper functions
void increment_addr_reg(int reg);

2
Source/Core/DSPCore/Src/DSPTables.cpp
View File

@ -310,7 +310,7 @@ const DSPOPCTemplate opcodes_ext[] =
{"DR", 0x0004, 0x00fc, DSPInterpreter::Ext::dr, &DSPEmitter::dr, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false},
{"IR", 0x0008, 0x00fc, DSPInterpreter::Ext::ir, &DSPEmitter::ir, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false},
{"NR", 0x000c, 0x00fc, DSPInterpreter::Ext::nr, NULL /*&DSPEmitter::nr*/, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false},
{"NR", 0x000c, 0x00fc, DSPInterpreter::Ext::nr, &DSPEmitter::nr, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false},
{"MV", 0x0010, 0x00f0, DSPInterpreter::Ext::mv, NULL /*&DSPEmitter::mv*/, 1, +2, {{P_REG18, 1, 0, 2, 0x000c}, {P_REG1C, 1, 0, 0, 0x0003}}, false, false},
{"S", 0x0020, 0x00e4, DSPInterpreter::Ext::s, NULL /*&DSPEmitter::s*/, 1, 2, {{P_PRG, 1, 0, 0, 0x0003}, {P_REG1C, 1, 0, 3, 0x0018}}, false, false},

175
Source/Core/DSPCore/Src/Jit/DSPJitUtil.cpp
View File

@ -25,72 +25,69 @@
using namespace Gen;
// HORRIBLE UGLINESS, someone please fix.
// See http://code.google.com/p/dolphin-emu/source/detail?r=3125
void DSPEmitter::increment_addr_reg(int reg)
{
ABI_PushAllCalleeSavedRegsAndAdjustStack();
// u16 tmb = g_dsp.r[DSP_REG_WR0 + reg];
MOV(16, R(EAX), M(&g_dsp.r[DSP_REG_WR0 + reg]));
MOVZX(32, 16, EAX, M(&g_dsp.r[DSP_REG_WR0 + reg]));
// tmb = tmb | (tmb >> 8);
MOV(16, R(EBX), R(EAX));
SHR(16, R(EBX), Imm8(8));
OR(16, R(EAX), R(EBX));
MOV(16, R(ECX), R(EAX));
SHR(16, R(ECX), Imm8(8));
OR(16, R(EAX), R(ECX));
// tmb = tmb | (tmb >> 4);
MOV(16, R(EBX), R(EAX));
SHR(16, R(EBX), Imm8(4));
OR(16, R(EAX), R(EBX));
MOV(16, R(ECX), R(EAX));
SHR(16, R(ECX), Imm8(4));
OR(16, R(EAX), R(ECX));
// tmb = tmb | (tmb >> 2);
MOV(16, R(EBX), R(EAX));
SHR(16, R(EBX), Imm8(2));
OR(16, R(EAX), R(EBX));
MOV(16, R(ECX), R(EAX));
SHR(16, R(ECX), Imm8(2));
OR(16, R(EAX), R(ECX));
// tmb = tmb | (tmb >> 1);
MOV(16, R(EBX), R(EAX));
SHR(16, R(EBX), Imm8(1));
OR(16, R(EAX), R(EBX));
MOV(16, R(ECX), R(EAX));
SHR(16, R(ECX), Imm8(1));
OR(16, R(EAX), R(ECX));
// s16 tmp = g_dsp.r[reg];
MOV(16, R(EBX), M(&g_dsp.r[reg]));
MOVZX(32, 16, ECX, M(&g_dsp.r[reg]));
// if ((tmp & tmb) == tmb)
AND(16, R(EAX), R(EBX));
CMP(16, R(EAX), R(EBX));
AND(16, R(ECX), R(EAX));
CMP(16, R(EAX), R(ECX));
FixupBranch not_equal = J_CC(CC_NZ);
// tmp ^= g_dsp.r[DSP_REG_WR0 + reg];
XOR(16, R(EBX), M(&g_dsp.r[DSP_REG_WR0 + reg]));
MOVZX(32, 16, ECX, M(&g_dsp.r[reg]));
XOR(16, R(ECX), M(&g_dsp.r[DSP_REG_WR0 + reg]));
FixupBranch end = J();
SetJumpTarget(not_equal);
// tmp++;
ADD(16, R(EBX), Imm8(1));
MOVZX(32, 16, ECX, M(&g_dsp.r[reg]));
ADD(16, R(ECX), Imm16(1));
SetJumpTarget(end);
// g_dsp.r[reg] = tmp;
MOV(16, M(&g_dsp.r[reg]), R(EBX));
ABI_PopAllCalleeSavedRegsAndAdjustStack();
MOV(16, M(&g_dsp.r[reg]), R(ECX));
}
// See http://code.google.com/p/dolphin-emu/source/detail?r=3125
void DSPEmitter::decrement_addr_reg(int reg)
{
ABI_PushAllCalleeSavedRegsAndAdjustStack();
// s16 tmp = g_dsp.r[reg];
MOV(16, R(EAX), M(&g_dsp.r[reg]));
MOVZX(32, 16, EAX, M(&g_dsp.r[reg]));
// if ((tmp & g_dsp.r[DSP_REG_WR0 + reg]) == 0)
MOV(16, R(EBX), R(EAX));
AND(16, R(EBX), M(&g_dsp.r[DSP_REG_WR0 + reg]));
CMP(16, R(EBX), Imm8(0));
MOV(16, R(ECX), R(EAX));
AND(16, R(ECX), M(&g_dsp.r[DSP_REG_WR0 + reg]));
// CMP(16, R(ECX), Imm8(0));
FixupBranch not_equal = J_CC(CC_NZ);
// tmp |= g_dsp.r[DSP_REG_WR0 + reg];
@ -106,61 +103,91 @@ void DSPEmitter::decrement_addr_reg(int reg)
// g_dsp.r[reg] = tmp;
MOV(16, M(&g_dsp.r[reg]), R(EAX));
ABI_PopAllCalleeSavedRegsAndAdjustStack();
}
// Increase addr register according to the correspond ix register
void DSPEmitter::increase_addr_reg(int reg)
{
{
// s16 value = (s16)g_dsp.r[DSP_REG_IX0 + reg];
MOVSX(32, 16, EDX, M(&g_dsp.r[DSP_REG_IX0 + reg]));
/*
MOV(16, R(EAX), M(&g_dsp.r[DSP_REG_IX0 + reg]));
CMP(16, R(EAX), Imm16(0));
// if (value > 0)
CMP(16, R(EDX), Imm16(0));
FixupBranch end = J_CC(CC_Z);
FixupBranch negValue = J_CC(CC_L);
ABI_CallFunctionC((void *)increment_addr_reg, reg);
// for (int i = 0; i < value; i++)
XOR(32, R(ESI), R(ESI)); // i = 0
FixupBranch posloop;
SetJumpTarget(posloop);
increment_addr_reg(reg);
ADD(32, R(ESI), Imm32(1)); // i++
CMP(32, R(ESI), R(EDX)); // i < value
FixupBranch posValue = J();
// FIXME: get normal abs with cdq
IMUL(32, EDX, Imm16(-1));
SetJumpTarget(negValue);
ABI_CallFunctionC((void *)decrement_addr_reg, reg);
// for (int i = 0; i < (int)(-value); i++)
XOR(32, R(ESI), R(ESI)); // i = 0
FixupBranch negloop;
SetJumpTarget(negloop);
decrement_addr_reg(reg);
ADD(32, R(ESI), Imm32(1)); // i++
CMP(32, R(ESI), R(EDX)); // i < -value
negloop = J_CC(CC_L);
SetJumpTarget(posValue);
SetJumpTarget(end);
*/
// TODO: DO RIGHT!
s16 value = (s16)g_dsp.r[DSP_REG_IX0 + reg];
if (value > 0) {
for (int i = 0; i < value; i++) {
increment_addr_reg(reg);
}
} else if (value < 0) {
for (int i = 0; i < (int)(-value); i++) {
decrement_addr_reg(reg);
}
}
}
// Decrease addr register according to the correspond ix register
void DSPEmitter::decrease_addr_reg(int reg)
{
// TODO: DO RIGHT!
s16 value = (s16)g_dsp.r[DSP_REG_IX0 + reg];
// s16 value = (s16)g_dsp.r[DSP_REG_IX0 + reg];
MOVSX(32, 16, EDX, M(&g_dsp.r[DSP_REG_IX0 + reg]));
if (value > 0) {
for (int i = 0; i < value; i++) {
decrement_addr_reg(reg);
}
} else if (value < 0) {
for (int i = 0; i < (int)(-value); i++) {
increment_addr_reg(reg);
}
}
// if (value > 0)
CMP(16, R(EDX), Imm16(0));
FixupBranch end = J_CC(CC_Z);
FixupBranch negValue = J_CC(CC_L);
// for (int i = 0; i < value; i++)
XOR(32, R(ESI), R(ESI)); // i = 0
FixupBranch posloop;
SetJumpTarget(posloop);
decrement_addr_reg(reg);
ADD(32, R(ESI), Imm32(1)); // i++
CMP(32, R(ESI), R(EDX)); // i < value
FixupBranch posValue = J();
// FIXME: get normal abs with cdq
IMUL(32, EDX, Imm16(-1));
// for (int i = 0; i < (int)(-value); i++)
XOR(32, R(ESI), R(ESI)); // i = 0
FixupBranch negloop;
SetJumpTarget(negloop);
increment_addr_reg(reg);
ADD(32, R(ESI), Imm32(1)); // i++
CMP(32, R(ESI), R(EDX)); // i < -value
negloop = J_CC(CC_L);
SetJumpTarget(posValue);
SetJumpTarget(end);
}
void DSPEmitter::ext_dmem_write(u32 dest, u32 src)
@ -173,20 +200,12 @@ void DSPEmitter::ext_dmem_write(u32 dest, u32 src)
g_dsp.dram[addr & DSP_DRAM_MASK] = val;
break;
case 0x1: // 1xxx COEF
ERROR_LOG(DSPLLE, "Illegal write to COEF (pc = %02x)", g_dsp.pc);
break;
case 0xf: // Fxxx HW regs
// Can ext write to ifx?
// gdsp_ifx_write(addr, val);
ERROR_LOG(DSPLLE, "Illegal write to ifx (pc = %02x)", g_dsp.pc);
break;
default: // Unmapped/non-existing memory
ERROR_LOG(DSPLLE, "%04x DSP ERROR: Write to UNKNOWN (%04x) memory", g_dsp.pc, addr);
gdsp_ifx_write(addr, val);
break;
}
}
u16 DSPEmitter::ext_dmem_read(u16 addr)
@ -196,17 +215,11 @@ u16 DSPEmitter::ext_dmem_read(u16 addr)
return g_dsp.dram[addr & DSP_DRAM_MASK];
case 0x1: // 1xxx COEF
NOTICE_LOG(DSPLLE, "%04x : Coef Read @ %04x", g_dsp.pc, addr);
return g_dsp.coef[addr & DSP_COEF_MASK];
case 0xf: // Fxxx HW regs
// Can ext read from ifx?
ERROR_LOG(DSPLLE, "Illegal read from ifx (pc = %02x)", g_dsp.pc);
// return gdsp_ifx_read(addr);
return gdsp_ifx_read(addr);
default: // Unmapped/non-existing memory
ERROR_LOG(DSPLLE, "%04x DSP ERROR: Read from UNKNOWN (%04x) memory", g_dsp.pc, addr);
return 0;
}
}