From 8ee7cfa6c686e8b324ef9201a5c48d25edc564a7 Mon Sep 17 00:00:00 2001 From: Shawn Hoffman Date: Fri, 22 May 2009 07:15:42 +0000 Subject: [PATCH] addendum to r3265: update mask used in rfi in jitIL as well git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3273 8ced0084-cf51-0410-be5f-012b33b47a6e --- .../Core/Src/PowerPC/Interpreter/Interpreter_Branch.cpp | 3 ++- Source/Core/Core/Src/PowerPC/Jit64/Jit_Branch.cpp | 3 +-- Source/Core/Core/Src/PowerPC/Jit64IL/IR.cpp | 6 ++---- 3 files changed, 5 insertions(+), 7 deletions(-) diff --git a/Source/Core/Core/Src/PowerPC/Interpreter/Interpreter_Branch.cpp b/Source/Core/Core/Src/PowerPC/Interpreter/Interpreter_Branch.cpp index bd87088cad..e020265204 100644 --- a/Source/Core/Core/Src/PowerPC/Interpreter/Interpreter_Branch.cpp +++ b/Source/Core/Core/Src/PowerPC/Interpreter/Interpreter_Branch.cpp @@ -114,6 +114,7 @@ void CompiledBlock(UGeckoInstruction _inst) void rfi(UGeckoInstruction _inst) { // Restore saved bits from SRR1 to MSR. + // Gecko/Broadway can save more bits than explicitly defined in ppc spec const int mask = 0x87C0FFFF; MSR = (MSR & ~mask) | (SRR1 & mask); //MSR[13] is set to 0. @@ -123,7 +124,7 @@ void rfi(UGeckoInstruction _inst) //PowerPC::CheckExceptions(); //else // set NPC to saved offset and resume - NPC = SRR0; // TODO: VERIFY...docs say ignore top two bits? + NPC = SRR0; m_EndBlock = true; } diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit_Branch.cpp b/Source/Core/Core/Src/PowerPC/Jit64/Jit_Branch.cpp index 44b7e61923..94c57d3a4b 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64/Jit_Branch.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit_Branch.cpp @@ -61,8 +61,7 @@ using namespace Gen; gpr.Flush(FLUSH_ALL); fpr.Flush(FLUSH_ALL); - //Bits SRR1[0, 5-9, 16-23, 25-27, 30-31] are placed into the corresponding bits of the MSR. - //MSR[13] is set to 0. + // See Interpreter rfi for details const u32 mask = 0x87C0FFFF; // MSR = (MSR & ~mask) | (SRR1 & mask); MOV(32, R(EAX), M(&MSR)); diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/IR.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/IR.cpp index 0ac0906c15..5f3c58dd3a 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/IR.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/IR.cpp @@ -2181,10 +2181,8 @@ static void DoWriteCode(IRBuilder* ibuild, Jit64* Jit, bool UseProfile) { break; } case RFIExit: { - // Bits SRR1[0, 5-9, 16-23, 25-27, 30-31] are placed - // into the corresponding bits of the MSR. - // MSR[13] is set to 0. - const u32 mask = 0x87C0FF73; + // See Interpreter rfi for details + const u32 mask = 0x87C0FFFF; // MSR = (MSR & ~mask) | (SRR1 & mask); Jit->MOV(32, R(EAX), M(&MSR)); Jit->MOV(32, R(ECX), M(&SRR1));