JitArm64: Add flush/discard support for condition registers
By flushing the condition registers as soon as we no longer need them, we reduce the register pressure.
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@ -205,6 +205,7 @@ void JitArm64::FallBackToInterpreter(UGeckoInstruction inst)
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// we must mark them as no longer discarded
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gpr.ResetRegisters(js.op->regsOut);
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fpr.ResetRegisters(js.op->GetFregsOut());
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gpr.ResetCRRegisters(js.op->crOut);
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if (js.op->opinfo->flags & FL_ENDBLOCK)
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{
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@ -1199,9 +1200,11 @@ bool JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
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{
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gpr.DiscardRegisters(op.gprDiscardable);
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fpr.DiscardRegisters(op.fprDiscardable);
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gpr.DiscardCRRegisters(op.crDiscardable);
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}
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gpr.StoreRegisters(~op.gprInUse & (op.regsIn | op.regsOut));
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fpr.StoreRegisters(~op.fprInUse & (op.fregsIn | op.GetFregsOut()));
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gpr.StoreCRRegisters(~op.crInUse & (op.crIn | op.crOut));
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if (opinfo->flags & FL_LOADSTORE)
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++js.numLoadStoreInst;
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@ -129,6 +129,8 @@ void Arm64RegCache::DiscardRegister(size_t preg)
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{
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OpArg& reg = m_guest_registers[preg];
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ARM64Reg host_reg = reg.GetReg();
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if (!IsVector(host_reg))
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host_reg = EncodeRegTo32(host_reg);
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reg.Discard();
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if (host_reg != ARM64Reg::INVALID_REG)
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@ -288,6 +290,25 @@ void Arm64GPRCache::FlushCRRegisters(BitSet8 regs, bool maintain_state, ARM64Reg
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}
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}
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void Arm64GPRCache::DiscardCRRegisters(BitSet8 regs)
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{
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for (int i : regs)
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DiscardRegister(GUEST_CR_OFFSET + i);
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}
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void Arm64GPRCache::ResetCRRegisters(BitSet8 regs)
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{
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for (int i : regs)
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{
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OpArg& reg = m_guest_registers[GUEST_CR_OFFSET + i];
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ARM64Reg host_reg = reg.GetReg();
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ASSERT_MSG(DYNA_REC, host_reg == ARM64Reg::INVALID_REG,
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"Attempted to reset a loaded register (did you mean to flush it?)");
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reg.Flush();
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}
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}
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void Arm64GPRCache::Flush(FlushMode mode, ARM64Reg tmp_reg)
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{
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FlushRegisters(BitSet32(0xFFFFFFFF), mode == FlushMode::MaintainState, tmp_reg);
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@ -335,6 +335,9 @@ public:
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FlushCRRegisters(regs, false, tmp_reg);
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}
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void DiscardCRRegisters(BitSet8 regs);
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void ResetCRRegisters(BitSet8 regs);
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protected:
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// Get the order of the host registers
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void GetAllocationOrder() override;
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