From 8e7b6f4178b80196a5d0047ee2ae33a211a36dd6 Mon Sep 17 00:00:00 2001 From: Sintendo Date: Sun, 5 Jan 2020 23:01:48 +0100 Subject: [PATCH] Jit64: addx - Prefer ADD over LEA when possible The old logic would always emit LEA when both sources are in a register and OE is disabled. However, ADD is still preferable when one of the sources matches the destination. Before: 45 8D 6C 35 00 lea r13d,[r13+rsi] After: 44 03 EE add r13d,esi --- Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp index 8eadc3d33f..25b27e465b 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp @@ -1330,18 +1330,21 @@ void Jit64::addx(UGeckoInstruction inst) RCX64Reg Rd = gpr.Bind(d, RCMode::Write); RegCache::Realize(Ra, Rb, Rd); - if (Ra.IsSimpleReg() && Rb.IsSimpleReg() && !inst.OE) + if (d == a) { - LEA(32, Rd, MRegSum(Ra.GetSimpleReg(), Rb.GetSimpleReg())); + ADD(32, Rd, Rb); } else if (d == b) { ADD(32, Rd, Ra); } + else if (Ra.IsSimpleReg() && Rb.IsSimpleReg() && !inst.OE) + { + LEA(32, Rd, MRegSum(Ra.GetSimpleReg(), Rb.GetSimpleReg())); + } else { - if (d != a) - MOV(32, Rd, Ra); + MOV(32, Rd, Ra); ADD(32, Rd, Rb); } if (inst.OE)