MMU: remove goto in MMU fast past check
Split into a separate patch to avoid rebasing conflicts and to split from functional changes.
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6f028257d7
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@ -98,8 +98,8 @@ __forceinline void ReadFromHardware(U &_var, const u32 em_address)
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int segment = em_address >> 28;
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// Quick check for an address that can't meet any of the following conditions,
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// to speed up the MMU path.
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if (BitSet32(0xCFC)[segment])
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goto translateaddress;
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if (!BitSet32(0xCFC)[segment])
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{
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// TODO: Figure out the fastest order of tests for both read and write (they are probably different).
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if ((em_address & 0xC8000000) == 0xC8000000)
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{
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@ -107,22 +107,25 @@ __forceinline void ReadFromHardware(U &_var, const u32 em_address)
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_var = EFB_Read(em_address);
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else
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_var = (T)mmio_mapping->Read<typename std::make_unsigned<T>::type>(em_address);
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return;
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}
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else if (segment == 0x8 || segment == 0xC || segment == 0x0)
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{
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_var = bswap((*(const T*)&m_pRAM[em_address & RAM_MASK]));
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return;
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}
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else if (m_pEXRAM && (segment == 0x9 || segment == 0xD || segment == 0x1))
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{
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_var = bswap((*(const T*)&m_pEXRAM[em_address & EXRAM_MASK]));
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return;
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}
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else if (segment == 0xE && (em_address < (0xE0000000+L1_CACHE_SIZE)))
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else if (segment == 0xE && (em_address < (0xE0000000 + L1_CACHE_SIZE)))
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{
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_var = bswap((*(const T*)&m_pL1Cache[em_address & L1_CACHE_MASK]));
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return;
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}
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else
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{
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translateaddress:
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}
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if (bFakeVMEM && (segment == 0x7 || segment == 0x4))
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{
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// fake VMEM
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@ -165,12 +168,9 @@ translateaddress:
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}
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return;
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}
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else
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{
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// The easy case!
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_var = bswap(*(const T*)&Memory::base[tlb_addr]);
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}
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}
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}
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@ -180,8 +180,8 @@ __forceinline void WriteToHardware(u32 em_address, const T data)
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int segment = em_address >> 28;
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// Quick check for an address that can't meet any of the following conditions,
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// to speed up the MMU path.
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if (BitSet32(0xCFC)[segment])
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goto translateaddress;
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if (!BitSet32(0xCFC)[segment])
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{
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// First, let's check for FIFO writes, since they are probably the most common
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// reason we end up in this function:
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if ((em_address & 0xFFFFF000) == 0xCC008000)
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@ -209,7 +209,7 @@ __forceinline void WriteToHardware(u32 em_address, const T data)
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}
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else
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{
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g_video_backend->Video_AccessEFB(POKE_COLOR, x, y,(u32)data);
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g_video_backend->Video_AccessEFB(POKE_COLOR, x, y, (u32)data);
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DEBUG_LOG(MEMMAP, "EFB Color Write %08x @ %i, %i", (u32)data, x, y);
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}
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return;
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@ -230,14 +230,13 @@ __forceinline void WriteToHardware(u32 em_address, const T data)
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*(T*)&m_pEXRAM[em_address & EXRAM_MASK] = bswap(data);
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return;
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}
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else if (segment == 0xE && (em_address < (0xE0000000+L1_CACHE_SIZE)))
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else if (segment == 0xE && (em_address < (0xE0000000 + L1_CACHE_SIZE)))
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{
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*(T*)&m_pL1Cache[em_address & L1_CACHE_MASK] = bswap(data);
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return;
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}
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else
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{
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translateaddress:
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}
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if (bFakeVMEM && (segment == 0x7 || segment == 0x4))
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{
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// fake VMEM
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@ -274,13 +273,11 @@ translateaddress:
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tlb_addr = tlb_addr_next_page;
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Memory::base[tlb_addr] = (u8)val;
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}
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return;
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}
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else
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{
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// The easy case!
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*(T*)&Memory::base[tlb_addr] = bswap(data);
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}
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}
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}
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// =====================
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