MMU: remove goto in MMU fast past check
Split into a separate patch to avoid rebasing conflicts and to split from functional changes.
This commit is contained in:
Fiora
parent
6f028257d7
commit
8e1c92f2e7
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@ -98,79 +98,79 @@ __forceinline void ReadFromHardware(U &_var, const u32 em_address)
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int segment = em_address >> 28;
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int segment = em_address >> 28;
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// Quick check for an address that can't meet any of the following conditions,
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// Quick check for an address that can't meet any of the following conditions,
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// to speed up the MMU path.
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// to speed up the MMU path.
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if (BitSet32(0xCFC)[segment])
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if (!BitSet32(0xCFC)[segment])
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goto translateaddress;
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// TODO: Figure out the fastest order of tests for both read and write (they are probably different).
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if ((em_address & 0xC8000000) == 0xC8000000)
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{
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{
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if (em_address < 0xcc000000)
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// TODO: Figure out the fastest order of tests for both read and write (they are probably different).
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_var = EFB_Read(em_address);
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if ((em_address & 0xC8000000) == 0xC8000000)
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else
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_var = (T)mmio_mapping->Read<typename std::make_unsigned<T>::type>(em_address);
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}
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else if (segment == 0x8 || segment == 0xC || segment == 0x0)
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{
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_var = bswap((*(const T*)&m_pRAM[em_address & RAM_MASK]));
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}
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else if (m_pEXRAM && (segment == 0x9 || segment == 0xD || segment == 0x1))
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{
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_var = bswap((*(const T*)&m_pEXRAM[em_address & EXRAM_MASK]));
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}
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else if (segment == 0xE && (em_address < (0xE0000000+L1_CACHE_SIZE)))
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{
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_var = bswap((*(const T*)&m_pL1Cache[em_address & L1_CACHE_MASK]));
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}
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else
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{
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translateaddress:
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if (bFakeVMEM && (segment == 0x7 || segment == 0x4))
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{
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{
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// fake VMEM
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if (em_address < 0xcc000000)
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_var = bswap((*(const T*)&m_pFakeVMEM[em_address & FAKEVMEM_MASK]));
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_var = EFB_Read(em_address);
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else
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_var = (T)mmio_mapping->Read<typename std::make_unsigned<T>::type>(em_address);
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return;
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return;
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}
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}
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else if (segment == 0x8 || segment == 0xC || segment == 0x0)
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{
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_var = bswap((*(const T*)&m_pRAM[em_address & RAM_MASK]));
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return;
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}
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else if (m_pEXRAM && (segment == 0x9 || segment == 0xD || segment == 0x1))
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{
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_var = bswap((*(const T*)&m_pEXRAM[em_address & EXRAM_MASK]));
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return;
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}
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else if (segment == 0xE && (em_address < (0xE0000000 + L1_CACHE_SIZE)))
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{
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_var = bswap((*(const T*)&m_pL1Cache[em_address & L1_CACHE_MASK]));
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return;
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}
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}
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// MMU: Do page table translation
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if (bFakeVMEM && (segment == 0x7 || segment == 0x4))
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u32 tlb_addr = TranslateAddress<flag>(em_address);
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{
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if (tlb_addr == 0)
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// fake VMEM
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_var = bswap((*(const T*)&m_pFakeVMEM[em_address & FAKEVMEM_MASK]));
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return;
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}
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// MMU: Do page table translation
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u32 tlb_addr = TranslateAddress<flag>(em_address);
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if (tlb_addr == 0)
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{
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if (flag == FLAG_READ)
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GenerateDSIException(em_address, false);
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return;
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}
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// Handle loads that cross page boundaries (ewwww)
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// The alignment check isn't strictly necessary, but since this is a rare slow path, it provides a faster
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// (1 instruction on x86) bailout.
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if (sizeof(T) > 1 && (em_address & (sizeof(T) - 1)) && (em_address & (HW_PAGE_SIZE - 1)) > HW_PAGE_SIZE - sizeof(T))
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{
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// This could be unaligned down to the byte level... hopefully this is rare, so doing it this
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// way isn't too terrible.
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// TODO: floats on non-word-aligned boundaries should technically cause alignment exceptions.
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// Note that "word" means 32-bit, so paired singles or doubles might still be 32-bit aligned!
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u32 em_address_next_page = (em_address + sizeof(T) - 1) & ~(HW_PAGE_SIZE - 1);
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u32 tlb_addr_next_page = TranslateAddress<flag>(em_address_next_page);
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if (tlb_addr == 0 || tlb_addr_next_page == 0)
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{
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{
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if (flag == FLAG_READ)
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if (flag == FLAG_READ)
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GenerateDSIException(em_address, false);
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GenerateDSIException(em_address_next_page, false);
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return;
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return;
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}
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}
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_var = 0;
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// Handle loads that cross page boundaries (ewwww)
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for (u32 addr = em_address; addr < em_address + sizeof(T); addr++, tlb_addr++)
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// The alignment check isn't strictly necessary, but since this is a rare slow path, it provides a faster
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// (1 instruction on x86) bailout.
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if (sizeof(T) > 1 && (em_address & (sizeof(T) - 1)) && (em_address & (HW_PAGE_SIZE - 1)) > HW_PAGE_SIZE - sizeof(T))
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{
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{
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// This could be unaligned down to the byte level... hopefully this is rare, so doing it this
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if (addr == em_address_next_page)
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// way isn't too terrible.
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tlb_addr = tlb_addr_next_page;
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// TODO: floats on non-word-aligned boundaries should technically cause alignment exceptions.
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_var = (_var << 8) | Memory::base[tlb_addr];
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// Note that "word" means 32-bit, so paired singles or doubles might still be 32-bit aligned!
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u32 em_address_next_page = (em_address + sizeof(T) - 1) & ~(HW_PAGE_SIZE - 1);
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u32 tlb_addr_next_page = TranslateAddress<flag>(em_address_next_page);
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if (tlb_addr == 0 || tlb_addr_next_page == 0)
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{
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if (flag == FLAG_READ)
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GenerateDSIException(em_address_next_page, false);
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return;
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}
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_var = 0;
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for (u32 addr = em_address; addr < em_address + sizeof(T); addr++, tlb_addr++)
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{
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if (addr == em_address_next_page)
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tlb_addr = tlb_addr_next_page;
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_var = (_var << 8) | Memory::base[tlb_addr];
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}
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return;
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}
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else
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{
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// The easy case!
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_var = bswap(*(const T*)&Memory::base[tlb_addr]);
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}
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}
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return;
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}
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}
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// The easy case!
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_var = bswap(*(const T*)&Memory::base[tlb_addr]);
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}
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}
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@ -180,107 +180,104 @@ __forceinline void WriteToHardware(u32 em_address, const T data)
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int segment = em_address >> 28;
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int segment = em_address >> 28;
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// Quick check for an address that can't meet any of the following conditions,
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// Quick check for an address that can't meet any of the following conditions,
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// to speed up the MMU path.
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// to speed up the MMU path.
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if (BitSet32(0xCFC)[segment])
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if (!BitSet32(0xCFC)[segment])
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goto translateaddress;
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// First, let's check for FIFO writes, since they are probably the most common
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// reason we end up in this function:
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if ((em_address & 0xFFFFF000) == 0xCC008000)
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{
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{
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switch (sizeof(T))
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// First, let's check for FIFO writes, since they are probably the most common
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// reason we end up in this function:
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if ((em_address & 0xFFFFF000) == 0xCC008000)
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{
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{
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case 1: GPFifo::Write8((u8)data, em_address); return;
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switch (sizeof(T))
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case 2: GPFifo::Write16((u16)data, em_address); return;
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case 4: GPFifo::Write32((u32)data, em_address); return;
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case 8: GPFifo::Write64((u64)data, em_address); return;
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}
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}
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if ((em_address & 0xC8000000) == 0xC8000000)
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{
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if (em_address < 0xcc000000)
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{
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int x = (em_address & 0xfff) >> 2;
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int y = (em_address >> 12) & 0x3ff;
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// TODO figure out a way to send data without falling into the template trap
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if (em_address & 0x00400000)
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{
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{
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g_video_backend->Video_AccessEFB(POKE_Z, x, y, (u32)data);
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case 1: GPFifo::Write8((u8)data, em_address); return;
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DEBUG_LOG(MEMMAP, "EFB Z Write %08x @ %i, %i", (u32)data, x, y);
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case 2: GPFifo::Write16((u16)data, em_address); return;
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case 4: GPFifo::Write32((u32)data, em_address); return;
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case 8: GPFifo::Write64((u64)data, em_address); return;
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}
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}
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if ((em_address & 0xC8000000) == 0xC8000000)
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{
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if (em_address < 0xcc000000)
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{
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int x = (em_address & 0xfff) >> 2;
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int y = (em_address >> 12) & 0x3ff;
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// TODO figure out a way to send data without falling into the template trap
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if (em_address & 0x00400000)
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{
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g_video_backend->Video_AccessEFB(POKE_Z, x, y, (u32)data);
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DEBUG_LOG(MEMMAP, "EFB Z Write %08x @ %i, %i", (u32)data, x, y);
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}
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else
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{
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g_video_backend->Video_AccessEFB(POKE_COLOR, x, y, (u32)data);
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DEBUG_LOG(MEMMAP, "EFB Color Write %08x @ %i, %i", (u32)data, x, y);
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}
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return;
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}
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}
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else
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else
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{
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{
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g_video_backend->Video_AccessEFB(POKE_COLOR, x, y,(u32)data);
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mmio_mapping->Write(em_address, data);
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DEBUG_LOG(MEMMAP, "EFB Color Write %08x @ %i, %i", (u32)data, x, y);
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}
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return;
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}
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else
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{
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mmio_mapping->Write(em_address, data);
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return;
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}
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}
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else if (segment == 0x8 || segment == 0xC || segment == 0x0)
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{
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*(T*)&m_pRAM[em_address & RAM_MASK] = bswap(data);
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return;
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}
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else if (m_pEXRAM && (segment == 0x9 || segment == 0xD || segment == 0x1))
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{
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*(T*)&m_pEXRAM[em_address & EXRAM_MASK] = bswap(data);
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return;
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}
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else if (segment == 0xE && (em_address < (0xE0000000+L1_CACHE_SIZE)))
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{
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*(T*)&m_pL1Cache[em_address & L1_CACHE_MASK] = bswap(data);
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return;
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}
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else
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{
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translateaddress:
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if (bFakeVMEM && (segment == 0x7 || segment == 0x4))
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{
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// fake VMEM
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*(T*)&m_pFakeVMEM[em_address & FAKEVMEM_MASK] = bswap(data);
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return;
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}
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// MMU: Do page table translation
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u32 tlb_addr = TranslateAddress<flag>(em_address);
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if (tlb_addr == 0)
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{
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if (flag == FLAG_WRITE)
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GenerateDSIException(em_address, true);
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return;
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}
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// Handle stores that cross page boundaries (ewwww)
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if (sizeof(T) > 1 && (em_address & (sizeof(T) - 1)) && (em_address & (HW_PAGE_SIZE - 1)) > HW_PAGE_SIZE - sizeof(T))
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{
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T val = bswap(data);
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// We need to check both addresses before writing in case there's a DSI.
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u32 em_address_next_page = (em_address + sizeof(T) - 1) & ~(HW_PAGE_SIZE - 1);
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u32 tlb_addr_next_page = TranslateAddress<flag>(em_address_next_page);
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if (tlb_addr_next_page == 0)
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{
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if (flag == FLAG_WRITE)
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GenerateDSIException(em_address_next_page, true);
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return;
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return;
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}
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}
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for (u32 addr = em_address; addr < em_address + sizeof(T); addr++, tlb_addr++, val >>= 8)
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{
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if (addr == em_address_next_page)
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tlb_addr = tlb_addr_next_page;
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Memory::base[tlb_addr] = (u8)val;
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}
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}
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}
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else
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else if (segment == 0x8 || segment == 0xC || segment == 0x0)
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{
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{
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// The easy case!
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*(T*)&m_pRAM[em_address & RAM_MASK] = bswap(data);
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*(T*)&Memory::base[tlb_addr] = bswap(data);
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return;
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}
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else if (m_pEXRAM && (segment == 0x9 || segment == 0xD || segment == 0x1))
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{
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*(T*)&m_pEXRAM[em_address & EXRAM_MASK] = bswap(data);
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return;
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}
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else if (segment == 0xE && (em_address < (0xE0000000 + L1_CACHE_SIZE)))
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{
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*(T*)&m_pL1Cache[em_address & L1_CACHE_MASK] = bswap(data);
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return;
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}
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}
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}
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}
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if (bFakeVMEM && (segment == 0x7 || segment == 0x4))
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{
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// fake VMEM
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*(T*)&m_pFakeVMEM[em_address & FAKEVMEM_MASK] = bswap(data);
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return;
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}
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// MMU: Do page table translation
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u32 tlb_addr = TranslateAddress<flag>(em_address);
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if (tlb_addr == 0)
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{
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if (flag == FLAG_WRITE)
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GenerateDSIException(em_address, true);
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return;
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}
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// Handle stores that cross page boundaries (ewwww)
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if (sizeof(T) > 1 && (em_address & (sizeof(T) - 1)) && (em_address & (HW_PAGE_SIZE - 1)) > HW_PAGE_SIZE - sizeof(T))
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{
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T val = bswap(data);
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// We need to check both addresses before writing in case there's a DSI.
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u32 em_address_next_page = (em_address + sizeof(T) - 1) & ~(HW_PAGE_SIZE - 1);
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u32 tlb_addr_next_page = TranslateAddress<flag>(em_address_next_page);
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if (tlb_addr_next_page == 0)
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{
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if (flag == FLAG_WRITE)
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GenerateDSIException(em_address_next_page, true);
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return;
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}
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for (u32 addr = em_address; addr < em_address + sizeof(T); addr++, tlb_addr++, val >>= 8)
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{
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if (addr == em_address_next_page)
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tlb_addr = tlb_addr_next_page;
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Memory::base[tlb_addr] = (u8)val;
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}
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return;
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}
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// The easy case!
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*(T*)&Memory::base[tlb_addr] = bswap(data);
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}
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}
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// =====================
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// =====================
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