diff --git a/Source/Core/Common/BreakPoints.h b/Source/Core/Common/BreakPoints.h index a17cce5341..e9ac0b1667 100644 --- a/Source/Core/Common/BreakPoints.h +++ b/Source/Core/Common/BreakPoints.h @@ -14,9 +14,9 @@ class DebugInterface; struct TBreakPoint { - u32 iAddress; - bool bOn; - bool bTemporary; + u32 iAddress; + bool bOn; + bool bTemporary; }; struct TMemCheck @@ -29,18 +29,18 @@ struct TMemCheck u32 StartAddress; u32 EndAddress; - bool bRange; + bool bRange; - bool OnRead; - bool OnWrite; + bool OnRead; + bool OnWrite; - bool Log; - bool Break; + bool Log; + bool Break; - u32 numHits; + u32 numHits; void Action(DebugInterface *dbg_interface, u32 _iValue, u32 addr, - bool write, int size, u32 pc); + bool write, int size, u32 pc); }; // Code breakpoints. @@ -71,7 +71,7 @@ public: private: TBreakPoints m_BreakPoints; - u32 m_iBreakOnCount; + u32 m_iBreakOnCount; }; diff --git a/Source/Core/Common/CommonFuncs.h b/Source/Core/Common/CommonFuncs.h index 63bdc04dfb..1b385859d5 100644 --- a/Source/Core/Common/CommonFuncs.h +++ b/Source/Core/Common/CommonFuncs.h @@ -29,7 +29,7 @@ struct ArraySizeImpl : public std::extent #define b8(x) ( b4(x) | ( b4(x) >> 4) ) #define b16(x) ( b8(x) | ( b8(x) >> 8) ) #define b32(x) (b16(x) | (b16(x) >>16) ) -#define ROUND_UP_POW2(x) (b32(x - 1) + 1) +#define ROUND_UP_POW2(x) (b32(x - 1) + 1) #ifndef __GNUC_PREREQ #define __GNUC_PREREQ(a, b) 0 diff --git a/Source/Core/Common/FileUtil.h b/Source/Core/Common/FileUtil.h index 91de214a38..4fee364a2e 100644 --- a/Source/Core/Common/FileUtil.h +++ b/Source/Core/Common/FileUtil.h @@ -59,9 +59,9 @@ namespace File struct FSTEntry { bool isDirectory; - u64 size; // file length or number of entries from children - std::string physicalName; // name on disk - std::string virtualName; // name in FST names table + u64 size; // File length or number of entries from children + std::string physicalName; // Name on disk + std::string virtualName; // Name in FST names table std::vector children; }; diff --git a/Source/Core/Common/MathUtil.h b/Source/Core/Common/MathUtil.h index 599701ca16..3e7b198c49 100644 --- a/Source/Core/Common/MathUtil.h +++ b/Source/Core/Common/MathUtil.h @@ -148,8 +148,8 @@ inline double pow2(double x) {return x * x;} float MathFloatVectorSum(const std::vector&); -#define ROUND_UP(x, a) (((x) + (a) - 1) & ~((a) - 1)) -#define ROUND_DOWN(x, a) ((x) & ~((a) - 1)) +#define ROUND_UP(x, a) (((x) + (a) - 1) & ~((a) - 1)) +#define ROUND_DOWN(x, a) ((x) & ~((a) - 1)) // Rounds down. 0 -> undefined inline u64 Log2(u64 val) diff --git a/Source/Core/Common/SymbolDB.h b/Source/Core/Common/SymbolDB.h index e189ca24fa..043d6ad22f 100644 --- a/Source/Core/Common/SymbolDB.h +++ b/Source/Core/Common/SymbolDB.h @@ -56,12 +56,12 @@ struct Symbol enum { - FFLAG_TIMERINSTRUCTIONS=(1<<0), - FFLAG_LEAF=(1<<1), - FFLAG_ONLYCALLSNICELEAFS=(1<<2), - FFLAG_EVIL=(1<<3), - FFLAG_RFI=(1<<4), - FFLAG_STRAIGHT=(1<<5) + FFLAG_TIMERINSTRUCTIONS = (1<<0), + FFLAG_LEAF = (1<<1), + FFLAG_ONLYCALLSNICELEAFS = (1<<2), + FFLAG_EVIL = (1<<3), + FFLAG_RFI = (1<<4), + FFLAG_STRAIGHT = (1<<5) }; diff --git a/Source/Core/Common/x64Emitter.h b/Source/Core/Common/x64Emitter.h index 87e76ef21a..d4d3433b68 100644 --- a/Source/Core/Common/x64Emitter.h +++ b/Source/Core/Common/x64Emitter.h @@ -43,10 +43,10 @@ enum CCFlags { CC_O = 0, CC_NO = 1, - CC_B = 2, CC_C = 2, CC_NAE = 2, - CC_NB = 3, CC_NC = 3, CC_AE = 3, + CC_B = 2, CC_C = 2, CC_NAE = 2, + CC_NB = 3, CC_NC = 3, CC_AE = 3, CC_Z = 4, CC_E = 4, - CC_NZ = 5, CC_NE = 5, + CC_NZ = 5, CC_NE = 5, CC_BE = 6, CC_NA = 6, CC_NBE = 7, CC_A = 7, CC_S = 8, diff --git a/Source/Core/Core/Boot/Boot_DOL.h b/Source/Core/Core/Boot/Boot_DOL.h index 1ac886e0f3..af8681b302 100644 --- a/Source/Core/Core/Boot/Boot_DOL.h +++ b/Source/Core/Core/Boot/Boot_DOL.h @@ -14,8 +14,8 @@ public: CDolLoader(u8* _pBuffer, u32 _Size); ~CDolLoader(); - bool IsWii() { return m_isWii; } - u32 GetEntryPoint() { return m_dolheader.entryPoint; } + bool IsWii() { return m_isWii; } + u32 GetEntryPoint() { return m_dolheader.entryPoint; } // Load into emulated memory void Load(); @@ -23,8 +23,8 @@ public: private: enum { - DOL_NUM_TEXT = 7, - DOL_NUM_DATA = 11 + DOL_NUM_TEXT = 7, + DOL_NUM_DATA = 11 }; struct SDolHeader diff --git a/Source/Core/Core/Boot/ElfReader.h b/Source/Core/Core/Boot/ElfReader.h index c5befc7226..bb60d683db 100644 --- a/Source/Core/Core/Boot/ElfReader.h +++ b/Source/Core/Core/Boot/ElfReader.h @@ -10,9 +10,9 @@ enum KnownElfTypes { KNOWNELF_PSP = 0, - KNOWNELF_DS = 1, + KNOWNELF_DS = 1, KNOWNELF_GBA = 2, - KNOWNELF_GC = 3, + KNOWNELF_GC = 3, }; typedef int SectionID; diff --git a/Source/Core/Core/Boot/ElfTypes.h b/Source/Core/Core/Boot/ElfTypes.h index 543c0de10c..f851298088 100644 --- a/Source/Core/Core/Boot/ElfTypes.h +++ b/Source/Core/Core/Boot/ElfTypes.h @@ -10,26 +10,26 @@ // File type enum ElfType { - ET_NONE =0, - ET_REL =1, - ET_EXEC =2, - ET_DYN =3, - ET_CORE =4, - ET_LOPROC =0xFF00, - ET_HIPROC =0xFFFF, + ET_NONE = 0, + ET_REL = 1, + ET_EXEC = 2, + ET_DYN = 3, + ET_CORE = 4, + ET_LOPROC = 0xFF00, + ET_HIPROC = 0xFFFF, }; // Machine/Architecture enum ElfMachine { - EM_NONE =0, - EM_M32 =1, - EM_SPARC =2, - EM_386 =3, - EM_68K =4, - EM_88K =5, - EM_860 =7, - EM_MIPS =8 + EM_NONE = 0, + EM_M32 = 1, + EM_SPARC = 2, + EM_386 = 3, + EM_68K = 4, + EM_88K = 5, + EM_860 = 7, + EM_MIPS = 8 }; // File version @@ -101,10 +101,10 @@ enum ElfMachine // Section flags enum ElfSectionFlags { - SHF_WRITE =0x1, - SHF_ALLOC =0x2, - SHF_EXECINSTR =0x4, - SHF_MASKPROC =0xF0000000, + SHF_WRITE = 0x1, + SHF_ALLOC = 0x2, + SHF_EXECINSTR = 0x4, + SHF_MASKPROC = 0xF0000000, }; // Symbol binding diff --git a/Source/Core/Core/ConfigManager.cpp b/Source/Core/Core/ConfigManager.cpp index f28dfa5d21..6877d10ca5 100644 --- a/Source/Core/Core/ConfigManager.cpp +++ b/Source/Core/Core/ConfigManager.cpp @@ -18,96 +18,96 @@ static const struct const int DefaultModifier; } g_HKData[] = { #ifdef __APPLE__ - { "Open", 79 /* 'O' */, 2 /* wxMOD_CMD */ }, - { "ChangeDisc", 0, 0 /* wxMOD_NONE */ }, - { "RefreshList", 0, 0 /* wxMOD_NONE */ }, + { "Open", 79 /* 'O' */, 2 /* wxMOD_CMD */ }, + { "ChangeDisc", 0, 0 /* wxMOD_NONE */ }, + { "RefreshList", 0, 0 /* wxMOD_NONE */ }, - { "PlayPause", 80 /* 'P' */, 2 /* wxMOD_CMD */ }, - { "Stop", 87 /* 'W' */, 2 /* wxMOD_CMD */ }, - { "Reset", 0, 0 /* wxMOD_NONE */ }, - { "FrameAdvance", 0, 0 /* wxMOD_NONE */ }, + { "PlayPause", 80 /* 'P' */, 2 /* wxMOD_CMD */ }, + { "Stop", 87 /* 'W' */, 2 /* wxMOD_CMD */ }, + { "Reset", 0, 0 /* wxMOD_NONE */ }, + { "FrameAdvance", 0, 0 /* wxMOD_NONE */ }, - { "StartRecording", 0, 0 /* wxMOD_NONE */ }, - { "PlayRecording", 0, 0 /* wxMOD_NONE */ }, - { "ExportRecording", 0, 0 /* wxMOD_NONE */ }, - { "Readonlymode", 0, 0 /* wxMOD_NONE */ }, + { "StartRecording", 0, 0 /* wxMOD_NONE */ }, + { "PlayRecording", 0, 0 /* wxMOD_NONE */ }, + { "ExportRecording", 0, 0 /* wxMOD_NONE */ }, + { "Readonlymode", 0, 0 /* wxMOD_NONE */ }, - { "ToggleFullscreen", 70 /* 'F' */, 2 /* wxMOD_CMD */ }, - { "Screenshot", 83 /* 'S' */, 2 /* wxMOD_CMD */ }, - { "Exit", 0, 0 /* wxMOD_NONE */ }, + { "ToggleFullscreen", 70 /* 'F' */, 2 /* wxMOD_CMD */ }, + { "Screenshot", 83 /* 'S' */, 2 /* wxMOD_CMD */ }, + { "Exit", 0, 0 /* wxMOD_NONE */ }, - { "Wiimote1Connect", 49 /* '1' */, 2 /* wxMOD_CMD */ }, - { "Wiimote2Connect", 50 /* '2' */, 2 /* wxMOD_CMD */ }, - { "Wiimote3Connect", 51 /* '3' */, 2 /* wxMOD_CMD */ }, - { "Wiimote4Connect", 52 /* '4' */, 2 /* wxMOD_CMD */ }, - { "BalanceBoardConnect",53 /* '4' */, 2 /* wxMOD_CMD */ }, + { "Wiimote1Connect", 49 /* '1' */, 2 /* wxMOD_CMD */ }, + { "Wiimote2Connect", 50 /* '2' */, 2 /* wxMOD_CMD */ }, + { "Wiimote3Connect", 51 /* '3' */, 2 /* wxMOD_CMD */ }, + { "Wiimote4Connect", 52 /* '4' */, 2 /* wxMOD_CMD */ }, + { "BalanceBoardConnect", 53 /* '4' */, 2 /* wxMOD_CMD */ }, #else - { "Open", 79 /* 'O' */, 2 /* wxMOD_CONTROL */}, - { "ChangeDisc", 0, 0 /* wxMOD_NONE */ }, - { "RefreshList", 0, 0 /* wxMOD_NONE */ }, + { "Open", 79 /* 'O' */, 2 /* wxMOD_CONTROL */}, + { "ChangeDisc", 0, 0 /* wxMOD_NONE */ }, + { "RefreshList", 0, 0 /* wxMOD_NONE */ }, - { "PlayPause", 349 /* WXK_F10 */, 0 /* wxMOD_NONE */ }, - { "Stop", 27 /* WXK_ESCAPE */, 0 /* wxMOD_NONE */ }, - { "Reset", 0, 0 /* wxMOD_NONE */ }, - { "FrameAdvance", 0, 0 /* wxMOD_NONE */ }, + { "PlayPause", 349 /* WXK_F10 */, 0 /* wxMOD_NONE */ }, + { "Stop", 27 /* WXK_ESCAPE */, 0 /* wxMOD_NONE */ }, + { "Reset", 0, 0 /* wxMOD_NONE */ }, + { "FrameAdvance", 0, 0 /* wxMOD_NONE */ }, - { "StartRecording", 0, 0 /* wxMOD_NONE */ }, - { "PlayRecording", 0, 0 /* wxMOD_NONE */ }, - { "ExportRecording",0, 0 /* wxMOD_NONE */ }, - { "Readonlymode", 0, 0 /* wxMOD_NONE */ }, + { "StartRecording", 0, 0 /* wxMOD_NONE */ }, + { "PlayRecording", 0, 0 /* wxMOD_NONE */ }, + { "ExportRecording", 0, 0 /* wxMOD_NONE */ }, + { "Readonlymode", 0, 0 /* wxMOD_NONE */ }, - { "ToggleFullscreen", 13 /* WXK_RETURN */, 1 /* wxMOD_ALT */ }, - { "Screenshot", 348 /* WXK_F9 */, 0 /* wxMOD_NONE */ }, - { "Exit", 0, 0 /* wxMOD_NONE */ }, + { "ToggleFullscreen", 13 /* WXK_RETURN */, 1 /* wxMOD_ALT */ }, + { "Screenshot", 348 /* WXK_F9 */, 0 /* wxMOD_NONE */ }, + { "Exit", 0, 0 /* wxMOD_NONE */ }, - { "Wiimote1Connect", 344 /* WXK_F5 */, 1 /* wxMOD_ALT */ }, - { "Wiimote2Connect", 345 /* WXK_F6 */, 1 /* wxMOD_ALT */ }, - { "Wiimote3Connect", 346 /* WXK_F7 */, 1 /* wxMOD_ALT */ }, - { "Wiimote4Connect", 347 /* WXK_F8 */, 1 /* wxMOD_ALT */ }, - { "BalanceBoardConnect",348 /* WXK_F9 */, 1 /* wxMOD_ALT */ }, + { "Wiimote1Connect", 344 /* WXK_F5 */, 1 /* wxMOD_ALT */ }, + { "Wiimote2Connect", 345 /* WXK_F6 */, 1 /* wxMOD_ALT */ }, + { "Wiimote3Connect", 346 /* WXK_F7 */, 1 /* wxMOD_ALT */ }, + { "Wiimote4Connect", 347 /* WXK_F8 */, 1 /* wxMOD_ALT */ }, + { "BalanceBoardConnect",348 /* WXK_F9 */, 1 /* wxMOD_ALT */ }, #endif - { "ToggleIR", 0, 0 /* wxMOD_NONE */ }, - { "ToggleAspectRatio", 0, 0 /* wxMOD_NONE */ }, - { "ToggleEFBCopies", 0, 0 /* wxMOD_NONE */ }, - { "ToggleFog", 0, 0 /* wxMOD_NONE */ }, - { "IncreaseFrameLimit", 0, 0 /* wxMOD_NONE */ }, - { "DecreaseFrameLimit", 0, 0 /* wxMOD_NONE */ }, - { "LoadStateSlot1", 340 /* WXK_F1 */, 0 /* wxMOD_NONE */ }, - { "LoadStateSlot2", 341 /* WXK_F2 */, 0 /* wxMOD_NONE */ }, - { "LoadStateSlot3", 342 /* WXK_F3 */, 0 /* wxMOD_NONE */ }, - { "LoadStateSlot4", 343 /* WXK_F4 */, 0 /* wxMOD_NONE */ }, - { "LoadStateSlot5", 344 /* WXK_F5 */, 0 /* wxMOD_NONE */ }, - { "LoadStateSlot6", 345 /* WXK_F6 */, 0 /* wxMOD_NONE */ }, - { "LoadStateSlot7", 346 /* WXK_F7 */, 0 /* wxMOD_NONE */ }, - { "LoadStateSlot8", 347 /* WXK_F8 */, 0 /* wxMOD_NONE */ }, - { "LoadStateSlot9", 0, 0 /* wxMOD_NONE */ }, - { "LoadStateSlot10",0, 0 /* wxMOD_NONE */ }, + { "ToggleIR", 0, 0 /* wxMOD_NONE */ }, + { "ToggleAspectRatio", 0, 0 /* wxMOD_NONE */ }, + { "ToggleEFBCopies", 0, 0 /* wxMOD_NONE */ }, + { "ToggleFog", 0, 0 /* wxMOD_NONE */ }, + { "IncreaseFrameLimit", 0, 0 /* wxMOD_NONE */ }, + { "DecreaseFrameLimit", 0, 0 /* wxMOD_NONE */ }, + { "LoadStateSlot1", 340 /* WXK_F1 */, 0 /* wxMOD_NONE */ }, + { "LoadStateSlot2", 341 /* WXK_F2 */, 0 /* wxMOD_NONE */ }, + { "LoadStateSlot3", 342 /* WXK_F3 */, 0 /* wxMOD_NONE */ }, + { "LoadStateSlot4", 343 /* WXK_F4 */, 0 /* wxMOD_NONE */ }, + { "LoadStateSlot5", 344 /* WXK_F5 */, 0 /* wxMOD_NONE */ }, + { "LoadStateSlot6", 345 /* WXK_F6 */, 0 /* wxMOD_NONE */ }, + { "LoadStateSlot7", 346 /* WXK_F7 */, 0 /* wxMOD_NONE */ }, + { "LoadStateSlot8", 347 /* WXK_F8 */, 0 /* wxMOD_NONE */ }, + { "LoadStateSlot9", 0, 0 /* wxMOD_NONE */ }, + { "LoadStateSlot10", 0, 0 /* wxMOD_NONE */ }, - { "SaveStateSlot1", 340 /* WXK_F1 */, 4 /* wxMOD_SHIFT */ }, - { "SaveStateSlot2", 341 /* WXK_F2 */, 4 /* wxMOD_SHIFT */ }, - { "SaveStateSlot3", 342 /* WXK_F3 */, 4 /* wxMOD_SHIFT */ }, - { "SaveStateSlot4", 343 /* WXK_F4 */, 4 /* wxMOD_SHIFT */ }, - { "SaveStateSlot5", 344 /* WXK_F5 */, 4 /* wxMOD_SHIFT */ }, - { "SaveStateSlot6", 345 /* WXK_F6 */, 4 /* wxMOD_SHIFT */ }, - { "SaveStateSlot7", 346 /* WXK_F7 */, 4 /* wxMOD_SHIFT */ }, - { "SaveStateSlot8", 347 /* WXK_F8 */, 4 /* wxMOD_SHIFT */ }, - { "SaveStateSlot9", 0, 0 /* wxMOD_NONE */ }, - { "SaveStateSlot10",0, 0 /* wxMOD_NONE */ }, + { "SaveStateSlot1", 340 /* WXK_F1 */, 4 /* wxMOD_SHIFT */ }, + { "SaveStateSlot2", 341 /* WXK_F2 */, 4 /* wxMOD_SHIFT */ }, + { "SaveStateSlot3", 342 /* WXK_F3 */, 4 /* wxMOD_SHIFT */ }, + { "SaveStateSlot4", 343 /* WXK_F4 */, 4 /* wxMOD_SHIFT */ }, + { "SaveStateSlot5", 344 /* WXK_F5 */, 4 /* wxMOD_SHIFT */ }, + { "SaveStateSlot6", 345 /* WXK_F6 */, 4 /* wxMOD_SHIFT */ }, + { "SaveStateSlot7", 346 /* WXK_F7 */, 4 /* wxMOD_SHIFT */ }, + { "SaveStateSlot8", 347 /* WXK_F8 */, 4 /* wxMOD_SHIFT */ }, + { "SaveStateSlot9", 0, 0 /* wxMOD_NONE */ }, + { "SaveStateSlot10", 0, 0 /* wxMOD_NONE */ }, - { "LoadLastState1", 0, 0 /* wxMOD_NONE */ }, - { "LoadLastState2", 0, 0 /* wxMOD_NONE */ }, - { "LoadLastState3", 0, 0 /* wxMOD_NONE */ }, - { "LoadLastState4", 0, 0 /* wxMOD_NONE */ }, - { "LoadLastState5", 0, 0 /* wxMOD_NONE */ }, - { "LoadLastState6", 0, 0 /* wxMOD_NONE */ }, - { "LoadLastState7", 0, 0 /* wxMOD_NONE */ }, - { "LoadLastState8", 0, 0 /* wxMOD_NONE */ }, + { "LoadLastState1", 0, 0 /* wxMOD_NONE */ }, + { "LoadLastState2", 0, 0 /* wxMOD_NONE */ }, + { "LoadLastState3", 0, 0 /* wxMOD_NONE */ }, + { "LoadLastState4", 0, 0 /* wxMOD_NONE */ }, + { "LoadLastState5", 0, 0 /* wxMOD_NONE */ }, + { "LoadLastState6", 0, 0 /* wxMOD_NONE */ }, + { "LoadLastState7", 0, 0 /* wxMOD_NONE */ }, + { "LoadLastState8", 0, 0 /* wxMOD_NONE */ }, - { "SaveFirstState", 0, 0 /* wxMOD_NONE */ }, - { "UndoLoadState", 351 /* WXK_F12 */, 0 /* wxMOD_NONE */ }, - { "UndoSaveState", 351 /* WXK_F12 */, 4 /* wxMOD_SHIFT */ }, - { "SaveStateFile", 0, 0 /* wxMOD_NONE */ }, - { "LoadStateFile", 0, 0 /* wxMOD_NONE */ }, + { "SaveFirstState", 0, 0 /* wxMOD_NONE */ }, + { "UndoLoadState", 351 /* WXK_F12 */, 0 /* wxMOD_NONE */ }, + { "UndoSaveState", 351 /* WXK_F12 */, 4 /* wxMOD_SHIFT */ }, + { "SaveStateFile", 0, 0 /* wxMOD_NONE */ }, + { "LoadStateFile", 0, 0 /* wxMOD_NONE */ }, }; SConfig::SConfig() diff --git a/Source/Core/Core/ConfigManager.h b/Source/Core/Core/ConfigManager.h index 6fc411a3ea..7a688760fa 100644 --- a/Source/Core/Core/ConfigManager.h +++ b/Source/Core/Core/ConfigManager.h @@ -14,15 +14,15 @@ #include "SysConf.h" // DSP Backend Types -#define BACKEND_NULLSOUND _trans("No audio output") -#define BACKEND_ALSA "ALSA" -#define BACKEND_AOSOUND "AOSound" -#define BACKEND_COREAUDIO "CoreAudio" -#define BACKEND_DIRECTSOUND "DSound" -#define BACKEND_OPENAL "OpenAL" -#define BACKEND_PULSEAUDIO "Pulse" -#define BACKEND_XAUDIO2 "XAudio2" -#define BACKEND_OPENSLES "OpenSLES" +#define BACKEND_NULLSOUND _trans("No audio output") +#define BACKEND_ALSA "ALSA" +#define BACKEND_AOSOUND "AOSound" +#define BACKEND_COREAUDIO "CoreAudio" +#define BACKEND_DIRECTSOUND "DSound" +#define BACKEND_OPENAL "OpenAL" +#define BACKEND_PULSEAUDIO "Pulse" +#define BACKEND_XAUDIO2 "XAudio2" +#define BACKEND_OPENSLES "OpenSLES" struct SConfig : NonCopyable { // Wii Devices diff --git a/Source/Core/Core/DSP/DSPAnalyzer.h b/Source/Core/Core/DSP/DSPAnalyzer.h index 82cfab9ecc..61a7d28703 100644 --- a/Source/Core/Core/DSP/DSPAnalyzer.h +++ b/Source/Core/Core/DSP/DSPAnalyzer.h @@ -17,11 +17,11 @@ namespace DSPAnalyzer { enum { CODE_START_OF_INST = 1, - CODE_IDLE_SKIP = 2, - CODE_LOOP_START = 4, - CODE_LOOP_END = 8, - CODE_UPDATE_SR = 16, - CODE_CHECK_INT = 32, + CODE_IDLE_SKIP = 2, + CODE_LOOP_START = 4, + CODE_LOOP_END = 8, + CODE_UPDATE_SR = 16, + CODE_CHECK_INT = 32, }; // Easy to query array covering the whole of instruction memory. diff --git a/Source/Core/Core/DSP/DSPCore.cpp b/Source/Core/Core/DSP/DSPCore.cpp index ff05dcb3fa..caaff46be5 100644 --- a/Source/Core/Core/DSP/DSPCore.cpp +++ b/Source/Core/Core/DSP/DSPCore.cpp @@ -79,8 +79,8 @@ static bool VerifyRoms(const char *irom_filename, const char *coef_filename) { struct DspRomHashes { - u32 hash_irom; // dsp_rom.bin - u32 hash_drom; // dsp_coef.bin + u32 hash_irom; // dsp_rom.bin + u32 hash_drom; // dsp_coef.bin } KNOWN_ROMS[] = { // Official Nintendo ROM { 0x66f334fe, 0xf3b93527 }, diff --git a/Source/Core/Core/DSP/DSPTables.h b/Source/Core/Core/DSP/DSPTables.h index 140b4b427b..c57493d6a3 100644 --- a/Source/Core/Core/DSP/DSPTables.h +++ b/Source/Core/Core/DSP/DSPTables.h @@ -20,37 +20,37 @@ enum partype_t { - P_NONE = 0x0000, - P_VAL = 0x0001, - P_IMM = 0x0002, - P_MEM = 0x0003, - P_STR = 0x0004, - P_ADDR_I = 0x0005, - P_ADDR_D = 0x0006, - P_REG = 0x8000, - P_REG04 = P_REG | 0x0400, // IX - P_REG08 = P_REG | 0x0800, - P_REG18 = P_REG | 0x1800, - P_REGM18 = P_REG | 0x1810, // used in multiply instructions - P_REG19 = P_REG | 0x1900, - P_REGM19 = P_REG | 0x1910, // used in multiply instructions - P_REG1A = P_REG | 0x1a80, - P_REG1C = P_REG | 0x1c00, -// P_ACC = P_REG | 0x1c10, // used for global accum (gcdsptool's value) - P_ACCL = P_REG | 0x1c00, // used for low part of accum - P_ACCM = P_REG | 0x1e00, // used for mid part of accum + P_NONE = 0x0000, + P_VAL = 0x0001, + P_IMM = 0x0002, + P_MEM = 0x0003, + P_STR = 0x0004, + P_ADDR_I = 0x0005, + P_ADDR_D = 0x0006, + P_REG = 0x8000, + P_REG04 = P_REG | 0x0400, // IX + P_REG08 = P_REG | 0x0800, + P_REG18 = P_REG | 0x1800, + P_REGM18 = P_REG | 0x1810, // used in multiply instructions + P_REG19 = P_REG | 0x1900, + P_REGM19 = P_REG | 0x1910, // used in multiply instructions + P_REG1A = P_REG | 0x1a80, + P_REG1C = P_REG | 0x1c00, +// P_ACC = P_REG | 0x1c10, // used for global accum (gcdsptool's value) + P_ACCL = P_REG | 0x1c00, // used for low part of accum + P_ACCM = P_REG | 0x1e00, // used for mid part of accum // The following are not in gcdsptool - P_ACCM_D = P_REG | 0x1e80, - P_ACC = P_REG | 0x2000, // used for full accum. - P_ACC_D = P_REG | 0x2080, - P_AX = P_REG | 0x2200, - P_REGS_MASK = 0x03f80, // gcdsptool's value = 0x01f80 - P_REF = P_REG | 0x4000, - P_PRG = P_REF | P_REG, + P_ACCM_D = P_REG | 0x1e80, + P_ACC = P_REG | 0x2000, // used for full accum. + P_ACC_D = P_REG | 0x2080, + P_AX = P_REG | 0x2200, + P_REGS_MASK = 0x03f80, // gcdsptool's value = 0x01f80 + P_REF = P_REG | 0x4000, + P_PRG = P_REF | P_REG, // The following seem like junk: - // P_REG10 = P_REG | 0x1000, - // P_AX_D = P_REG | 0x2280, + // P_REG10 = P_REG | 0x1000, + // P_AX_D = P_REG | 0x2280, }; #define OPTABLE_SIZE 0xffff + 1 diff --git a/Source/Core/Core/DSP/LabelMap.h b/Source/Core/Core/DSP/LabelMap.h index 908b3bd7c9..4f700bb632 100644 --- a/Source/Core/Core/DSP/LabelMap.h +++ b/Source/Core/Core/DSP/LabelMap.h @@ -24,7 +24,7 @@ class LabelMap { label_t(const std::string &lbl, s32 address, LabelType ltype) : name(lbl), addr(address), type(ltype) {} std::string name; - s32 addr; + s32 addr; LabelType type; }; std::vector labels; diff --git a/Source/Core/Core/DSP/assemble.h b/Source/Core/Core/DSP/assemble.h index 5a15ed2ded..25795c8153 100644 --- a/Source/Core/Core/DSP/assemble.h +++ b/Source/Core/Core/DSP/assemble.h @@ -81,9 +81,9 @@ public: private: struct param_t { - u32 val; - partype_t type; - char *str; + u32 val; + partype_t type; + char *str; }; enum segment_t diff --git a/Source/Core/Core/Debugger/Debugger_SymbolMap.h b/Source/Core/Core/Debugger/Debugger_SymbolMap.h index 2d470e2059..dde4ba0b04 100644 --- a/Source/Core/Core/Debugger/Debugger_SymbolMap.h +++ b/Source/Core/Core/Debugger/Debugger_SymbolMap.h @@ -15,8 +15,8 @@ namespace Dolphin_Debugger struct CallstackEntry { - std::string Name; - u32 vAddress; + std::string Name; + u32 vAddress; }; bool GetCallstack(std::vector &output); diff --git a/Source/Core/Core/Debugger/Dump.h b/Source/Core/Core/Debugger/Dump.h index 57244c2572..9908bbb99a 100644 --- a/Source/Core/Core/Debugger/Dump.h +++ b/Source/Core/Core/Debugger/Dump.h @@ -25,9 +25,9 @@ public: private: enum { - OFFSET_GPR = 0x4, - OFFSET_PC = 0x194, - STRUCTUR_SIZE = 0x2BC + OFFSET_GPR = 0x4, + OFFSET_PC = 0x194, + STRUCTUR_SIZE = 0x2BC }; u8 *m_pData; diff --git a/Source/Core/Core/FifoPlayer/FifoDataFile.h b/Source/Core/Core/FifoPlayer/FifoDataFile.h index c5dc6aee8e..cb90670252 100644 --- a/Source/Core/Core/FifoPlayer/FifoDataFile.h +++ b/Source/Core/Core/FifoPlayer/FifoDataFile.h @@ -17,10 +17,10 @@ struct MemoryUpdate { enum Type { - TEXTURE_MAP = 0x01, - XF_DATA = 0x02, + TEXTURE_MAP = 0x01, + XF_DATA = 0x02, VERTEX_STREAM = 0x04, - TMEM = 0x08, + TMEM = 0x08, }; u32 fifoPosition; diff --git a/Source/Core/Core/FifoPlayer/FifoFileStruct.h b/Source/Core/Core/FifoPlayer/FifoFileStruct.h index 1eeada1160..8c8a441fb0 100644 --- a/Source/Core/Core/FifoPlayer/FifoFileStruct.h +++ b/Source/Core/Core/FifoPlayer/FifoFileStruct.h @@ -12,8 +12,8 @@ namespace FifoFileStruct enum { - FILE_ID = 0x0d01f1f0, - VERSION_NUMBER = 1, + FILE_ID = 0x0d01f1f0, + VERSION_NUMBER = 1, MIN_LOADER_VERSION = 1, }; diff --git a/Source/Core/Core/HLE/HLE.cpp b/Source/Core/Core/HLE/HLE.cpp index 24180fc6b5..c0ecc50826 100644 --- a/Source/Core/Core/HLE/HLE.cpp +++ b/Source/Core/Core/HLE/HLE.cpp @@ -40,35 +40,35 @@ struct SPatch static const SPatch OSPatches[] = { - { "FAKE_TO_SKIP_0", HLE_Misc::UnimplementedFunction, HLE_HOOK_REPLACE, HLE_TYPE_GENERIC }, + { "FAKE_TO_SKIP_0", HLE_Misc::UnimplementedFunction, HLE_HOOK_REPLACE, HLE_TYPE_GENERIC }, - { "PanicAlert", HLE_Misc::HLEPanicAlert, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, + { "PanicAlert", HLE_Misc::HLEPanicAlert, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, // Name doesn't matter, installed in CBoot::BootUp() - { "HBReload", HLE_Misc::HBReload, HLE_HOOK_REPLACE, HLE_TYPE_GENERIC }, + { "HBReload", HLE_Misc::HBReload, HLE_HOOK_REPLACE, HLE_TYPE_GENERIC }, // ES_LAUNCH - { "__OSBootDol", HLE_Misc::OSBootDol, HLE_HOOK_REPLACE, HLE_TYPE_GENERIC }, - { "OSGetResetCode", HLE_Misc::OSGetResetCode, HLE_HOOK_REPLACE, HLE_TYPE_GENERIC }, + { "__OSBootDol", HLE_Misc::OSBootDol, HLE_HOOK_REPLACE, HLE_TYPE_GENERIC }, + { "OSGetResetCode", HLE_Misc::OSGetResetCode, HLE_HOOK_REPLACE, HLE_TYPE_GENERIC }, // Debug/OS Support - { "OSPanic", HLE_OS::HLE_OSPanic, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, + { "OSPanic", HLE_OS::HLE_OSPanic, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, - { "OSReport", HLE_OS::HLE_GeneralDebugPrint, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, - { "DEBUGPrint", HLE_OS::HLE_GeneralDebugPrint, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, - { "WUD_DEBUGPrint", HLE_OS::HLE_GeneralDebugPrint, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, - { "vprintf", HLE_OS::HLE_GeneralDebugPrint, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, - { "printf", HLE_OS::HLE_GeneralDebugPrint, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, - { "puts", HLE_OS::HLE_GeneralDebugPrint, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, // gcc-optimized printf? - { "___blank(char *,...)", HLE_OS::HLE_GeneralDebugPrint, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, // used for early init things (normally) - { "___blank", HLE_OS::HLE_GeneralDebugPrint, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, - { "__write_console", HLE_OS::HLE_write_console, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, // used by sysmenu (+more?) - { "GeckoCodehandler", HLE_Misc::HLEGeckoCodehandler, HLE_HOOK_START, HLE_TYPE_GENERIC }, + { "OSReport", HLE_OS::HLE_GeneralDebugPrint, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, + { "DEBUGPrint", HLE_OS::HLE_GeneralDebugPrint, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, + { "WUD_DEBUGPrint", HLE_OS::HLE_GeneralDebugPrint, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, + { "vprintf", HLE_OS::HLE_GeneralDebugPrint, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, + { "printf", HLE_OS::HLE_GeneralDebugPrint, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, + { "puts", HLE_OS::HLE_GeneralDebugPrint, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, // gcc-optimized printf? + { "___blank(char *,...)", HLE_OS::HLE_GeneralDebugPrint, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, // used for early init things (normally) + { "___blank", HLE_OS::HLE_GeneralDebugPrint, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, + { "__write_console", HLE_OS::HLE_write_console, HLE_HOOK_REPLACE, HLE_TYPE_DEBUG }, // used by sysmenu (+more?) + { "GeckoCodehandler", HLE_Misc::HLEGeckoCodehandler, HLE_HOOK_START, HLE_TYPE_GENERIC }, }; static const SPatch OSBreakPoints[] = { - { "FAKE_TO_SKIP_0", HLE_Misc::UnimplementedFunction }, + { "FAKE_TO_SKIP_0", HLE_Misc::UnimplementedFunction }, }; void Patch(u32 addr, const char *hle_func_name) diff --git a/Source/Core/Core/HW/AudioInterface.cpp b/Source/Core/Core/HW/AudioInterface.cpp index 42203a951b..70a4dd099c 100644 --- a/Source/Core/Core/HW/AudioInterface.cpp +++ b/Source/Core/Core/HW/AudioInterface.cpp @@ -69,10 +69,10 @@ namespace AudioInterface // Internal hardware addresses enum { - AI_CONTROL_REGISTER = 0x6C00, - AI_VOLUME_REGISTER = 0x6C04, - AI_SAMPLE_COUNTER = 0x6C08, - AI_INTERRUPT_TIMING = 0x6C0C, + AI_CONTROL_REGISTER = 0x6C00, + AI_VOLUME_REGISTER = 0x6C04, + AI_SAMPLE_COUNTER = 0x6C08, + AI_INTERRUPT_TIMING = 0x6C0C, }; enum @@ -91,15 +91,15 @@ union AICR AICR(u32 _hex) { hex = _hex;} struct { - u32 PSTAT : 1; // sample counter/playback enable - u32 AISFR : 1; // AIS Frequency (0=32khz 1=48khz) - u32 AIINTMSK : 1; // 0=interrupt masked 1=interrupt enabled - u32 AIINT : 1; // audio interrupt status - u32 AIINTVLD : 1; // This bit controls whether AIINT is affected by the Interrupt Timing register - // matching the sample counter. Once set, AIINT will hold its last value - u32 SCRESET : 1; // write to reset counter - u32 AIDFR : 1; // AID Frequency (0=48khz 1=32khz) - u32 :25; + u32 PSTAT : 1; // sample counter/playback enable + u32 AISFR : 1; // AIS Frequency (0=32khz 1=48khz) + u32 AIINTMSK : 1; // 0=interrupt masked 1=interrupt enabled + u32 AIINT : 1; // audio interrupt status + u32 AIINTVLD : 1; // This bit controls whether AIINT is affected by the Interrupt Timing register + // matching the sample counter. Once set, AIINT will hold its last value + u32 SCRESET : 1; // write to reset counter + u32 AIDFR : 1; // AID Frequency (0=48khz 1=32khz) + u32 :25; }; u32 hex; }; @@ -110,9 +110,9 @@ union AIVR AIVR() { hex = 0;} struct { - u32 left : 8; - u32 right : 8; - u32 :16; + u32 left : 8; + u32 right : 8; + u32 :16; }; u32 hex; }; diff --git a/Source/Core/Core/HW/DSP.cpp b/Source/Core/Core/HW/DSP.cpp index 51ca22d388..821ba69925 100644 --- a/Source/Core/Core/HW/DSP.cpp +++ b/Source/Core/Core/HW/DSP.cpp @@ -42,26 +42,26 @@ namespace DSP // register offsets enum { - DSP_MAIL_TO_DSP_HI = 0x5000, - DSP_MAIL_TO_DSP_LO = 0x5002, - DSP_MAIL_FROM_DSP_HI = 0x5004, - DSP_MAIL_FROM_DSP_LO = 0x5006, - DSP_CONTROL = 0x500A, - DSP_INTERRUPT_CONTROL = 0x5010, - AR_INFO = 0x5012, // These names are a good guess at best - AR_MODE = 0x5016, // - AR_REFRESH = 0x501a, - AR_DMA_MMADDR_H = 0x5020, - AR_DMA_MMADDR_L = 0x5022, - AR_DMA_ARADDR_H = 0x5024, - AR_DMA_ARADDR_L = 0x5026, - AR_DMA_CNT_H = 0x5028, - AR_DMA_CNT_L = 0x502A, - AUDIO_DMA_START_HI = 0x5030, - AUDIO_DMA_START_LO = 0x5032, - AUDIO_DMA_BLOCKS_LENGTH = 0x5034, // Ever used? - AUDIO_DMA_CONTROL_LEN = 0x5036, - AUDIO_DMA_BLOCKS_LEFT = 0x503A, + DSP_MAIL_TO_DSP_HI = 0x5000, + DSP_MAIL_TO_DSP_LO = 0x5002, + DSP_MAIL_FROM_DSP_HI = 0x5004, + DSP_MAIL_FROM_DSP_LO = 0x5006, + DSP_CONTROL = 0x500A, + DSP_INTERRUPT_CONTROL = 0x5010, + AR_INFO = 0x5012, // These names are a good guess at best + AR_MODE = 0x5016, // + AR_REFRESH = 0x501a, + AR_DMA_MMADDR_H = 0x5020, + AR_DMA_MMADDR_L = 0x5022, + AR_DMA_ARADDR_H = 0x5024, + AR_DMA_ARADDR_L = 0x5026, + AR_DMA_CNT_H = 0x5028, + AR_DMA_CNT_L = 0x502A, + AUDIO_DMA_START_HI = 0x5030, + AUDIO_DMA_START_LO = 0x5032, + AUDIO_DMA_BLOCKS_LENGTH = 0x5034, // Ever used? + AUDIO_DMA_CONTROL_LEN = 0x5036, + AUDIO_DMA_BLOCKS_LEFT = 0x503A, }; // UARAMCount @@ -70,8 +70,8 @@ union UARAMCount u32 Hex; struct { - u32 count : 31; - u32 dir : 1; // 0: MRAM -> ARAM 1: ARAM -> MRAM + u32 count : 31; + u32 dir : 1; // 0: MRAM -> ARAM 1: ARAM -> MRAM }; }; @@ -83,23 +83,23 @@ union UDSPControl struct { // DSP Control - u16 DSPReset : 1; // Write 1 to reset and waits for 0 - u16 DSPAssertInt : 1; - u16 DSPHalt : 1; + u16 DSPReset : 1; // Write 1 to reset and waits for 0 + u16 DSPAssertInt : 1; + u16 DSPHalt : 1; // Interrupt for DMA to the AI/speakers - u16 AID : 1; - u16 AID_mask : 1; + u16 AID : 1; + u16 AID_mask : 1; // ARAM DMA interrupt - u16 ARAM : 1; - u16 ARAM_mask : 1; + u16 ARAM : 1; + u16 ARAM_mask : 1; // DSP DMA interrupt - u16 DSP : 1; - u16 DSP_mask : 1; + u16 DSP : 1; + u16 DSP_mask : 1; // Other ??? - u16 DMAState : 1; // DSPGetDMAStatus() uses this flag. __ARWaitForDMA() uses it too...maybe it's just general DMA flag - u16 unk3 : 1; - u16 DSPInit : 1; // DSPInit() writes to this flag - u16 pad : 4; + u16 DMAState : 1; // DSPGetDMAStatus() uses this flag. __ARWaitForDMA() uses it too...maybe it's just general DMA flag + u16 unk3 : 1; + u16 DSPInit : 1; // DSPInit() writes to this flag + u16 pad : 4; }; }; @@ -188,9 +188,9 @@ union ARAM_Info u16 Hex; struct { - u16 size : 6; - u16 unk : 1; - u16 : 9; + u16 size : 6; + u16 unk : 1; + u16 : 9; }; }; static ARAM_Info g_ARAM_Info; diff --git a/Source/Core/Core/HW/DSP.h b/Source/Core/Core/HW/DSP.h index 8feabf4876..2734c659c3 100644 --- a/Source/Core/Core/HW/DSP.h +++ b/Source/Core/Core/HW/DSP.h @@ -14,16 +14,16 @@ namespace DSP enum DSPInterruptType { - INT_DSP = 0, - INT_ARAM = 1, - INT_AID = 2 + INT_DSP = 0, + INT_ARAM = 1, + INT_AID = 2 }; // aram size and mask enum { - ARAM_SIZE = 0x01000000, // 16 MB - ARAM_MASK = 0x00FFFFFF, + ARAM_SIZE = 0x01000000, // 16 MB + ARAM_MASK = 0x00FFFFFF, }; void Init(bool hle); diff --git a/Source/Core/Core/HW/DSPHLE/UCodes/UCode_AX.h b/Source/Core/Core/HW/DSPHLE/UCodes/UCode_AX.h index 5539a00820..177e64adb0 100644 --- a/Source/Core/Core/HW/DSPHLE/UCodes/UCode_AX.h +++ b/Source/Core/Core/HW/DSPHLE/UCodes/UCode_AX.h @@ -21,33 +21,33 @@ // mixer_control value to an AXMixControl bitfield. enum AXMixControl { - MIX_L = 0x000001, - MIX_L_RAMP = 0x000002, - MIX_R = 0x000004, - MIX_R_RAMP = 0x000008, - MIX_S = 0x000010, - MIX_S_RAMP = 0x000020, + MIX_L = 0x000001, + MIX_L_RAMP = 0x000002, + MIX_R = 0x000004, + MIX_R_RAMP = 0x000008, + MIX_S = 0x000010, + MIX_S_RAMP = 0x000020, - MIX_AUXA_L = 0x000040, - MIX_AUXA_L_RAMP = 0x000080, - MIX_AUXA_R = 0x000100, - MIX_AUXA_R_RAMP = 0x000200, - MIX_AUXA_S = 0x000400, - MIX_AUXA_S_RAMP = 0x000800, + MIX_AUXA_L = 0x000040, + MIX_AUXA_L_RAMP = 0x000080, + MIX_AUXA_R = 0x000100, + MIX_AUXA_R_RAMP = 0x000200, + MIX_AUXA_S = 0x000400, + MIX_AUXA_S_RAMP = 0x000800, - MIX_AUXB_L = 0x001000, - MIX_AUXB_L_RAMP = 0x002000, - MIX_AUXB_R = 0x004000, - MIX_AUXB_R_RAMP = 0x008000, - MIX_AUXB_S = 0x010000, - MIX_AUXB_S_RAMP = 0x020000, + MIX_AUXB_L = 0x001000, + MIX_AUXB_L_RAMP = 0x002000, + MIX_AUXB_R = 0x004000, + MIX_AUXB_R_RAMP = 0x008000, + MIX_AUXB_S = 0x010000, + MIX_AUXB_S_RAMP = 0x020000, - MIX_AUXC_L = 0x040000, - MIX_AUXC_L_RAMP = 0x080000, - MIX_AUXC_R = 0x100000, - MIX_AUXC_R_RAMP = 0x200000, - MIX_AUXC_S = 0x400000, - MIX_AUXC_S_RAMP = 0x800000 + MIX_AUXC_L = 0x040000, + MIX_AUXC_L_RAMP = 0x080000, + MIX_AUXC_R = 0x100000, + MIX_AUXC_R_RAMP = 0x200000, + MIX_AUXC_S = 0x400000, + MIX_AUXC_S_RAMP = 0x800000 }; class CUCode_AX : public IUCode @@ -69,13 +69,13 @@ public: protected: enum MailType { - MAIL_RESUME = 0xCDD10000, - MAIL_NEW_UCODE = 0xCDD10001, - MAIL_RESET = 0xCDD10002, - MAIL_CONTINUE = 0xCDD10003, + MAIL_RESUME = 0xCDD10000, + MAIL_NEW_UCODE = 0xCDD10001, + MAIL_RESET = 0xCDD10002, + MAIL_CONTINUE = 0xCDD10003, // CPU sends 0xBABE0000 | cmdlist_size to the DSP - MAIL_CMDLIST = 0xBABE0000, + MAIL_CMDLIST = 0xBABE0000, MAIL_CMDLIST_MASK = 0xFFFF0000 }; @@ -157,26 +157,26 @@ protected: private: enum CmdType { - CMD_SETUP = 0x00, - CMD_DL_AND_VOL_MIX = 0x01, - CMD_PB_ADDR = 0x02, - CMD_PROCESS = 0x03, - CMD_MIX_AUXA = 0x04, - CMD_MIX_AUXB = 0x05, - CMD_UPLOAD_LRS = 0x06, - CMD_SET_LR = 0x07, - CMD_UNK_08 = 0x08, - CMD_MIX_AUXB_NOWRITE = 0x09, + CMD_SETUP = 0x00, + CMD_DL_AND_VOL_MIX = 0x01, + CMD_PB_ADDR = 0x02, + CMD_PROCESS = 0x03, + CMD_MIX_AUXA = 0x04, + CMD_MIX_AUXB = 0x05, + CMD_UPLOAD_LRS = 0x06, + CMD_SET_LR = 0x07, + CMD_UNK_08 = 0x08, + CMD_MIX_AUXB_NOWRITE = 0x09, CMD_COMPRESSOR_TABLE_ADDR = 0x0A, - CMD_UNK_0B = 0x0B, - CMD_UNK_0C = 0x0C, - CMD_MORE = 0x0D, - CMD_OUTPUT = 0x0E, - CMD_END = 0x0F, - CMD_MIX_AUXB_LR = 0x10, - CMD_SET_OPPOSITE_LR = 0x11, - CMD_UNK_12 = 0x12, - CMD_SEND_AUX_AND_MIX = 0x13, + CMD_UNK_0B = 0x0B, + CMD_UNK_0C = 0x0C, + CMD_MORE = 0x0D, + CMD_OUTPUT = 0x0E, + CMD_END = 0x0F, + CMD_MIX_AUXB_LR = 0x10, + CMD_SET_OPPOSITE_LR = 0x11, + CMD_UNK_12 = 0x12, + CMD_SEND_AUX_AND_MIX = 0x13, }; }; diff --git a/Source/Core/Core/HW/DSPHLE/UCodes/UCode_AXStructs.h b/Source/Core/Core/HW/DSPHLE/UCodes/UCode_AXStructs.h index 58039fc2f9..e4c538bfc5 100644 --- a/Source/Core/Core/HW/DSPHLE/UCodes/UCode_AXStructs.h +++ b/Source/Core/Core/HW/DSPHLE/UCodes/UCode_AXStructs.h @@ -161,8 +161,8 @@ struct PBDpopWM struct PBVolumeEnvelope { - u16 cur_volume; // volume at start of frame - s16 cur_volume_delta; // signed per sample delta (96 samples per frame) + u16 cur_volume; // Volume at start of frame + s16 cur_volume_delta; // Signed per sample delta (96 samples per frame) }; struct PBUnknown2 @@ -254,12 +254,12 @@ struct AXPB struct PBBiquadFilter { - u16 on; // on = 2, off = 0 - u16 xn1; // History data + u16 on; // on = 2, off = 0 + u16 xn1; // History data u16 xn2; u16 yn1; u16 yn2; - u16 b0; // Filter coefficients + u16 b0; // Filter coefficients u16 b1; u16 b2; u16 a1; @@ -280,13 +280,13 @@ struct AXPBWii u16 this_pb_hi; u16 this_pb_lo; - u16 src_type; // Type of sample rate converter (none, 4-tap, linear) - u16 coef_select; // coef for the 4-tap src + u16 src_type; // Type of sample rate converter (none, 4-tap, linear) + u16 coef_select; // coef for the 4-tap src u16 mixer_control_hi; u16 mixer_control_lo; - u16 running; // 1=RUN 0=STOP - u16 is_stream; // 1 = stream, 0 = one shot + u16 running; // 1=RUN 0=STOP + u16 is_stream; // 1 = stream, 0 = one shot PBMixerWii mixer; PBInitialTimeDelay initial_time_delay; diff --git a/Source/Core/Core/HW/DSPHLE/UCodes/UCode_AXWii.h b/Source/Core/Core/HW/DSPHLE/UCodes/UCode_AXWii.h index a9e6950684..e95d4799d1 100644 --- a/Source/Core/Core/HW/DSPHLE/UCodes/UCode_AXWii.h +++ b/Source/Core/Core/HW/DSPHLE/UCodes/UCode_AXWii.h @@ -71,21 +71,21 @@ protected: private: enum CmdType { - CMD_SETUP = 0x00, - CMD_ADD_TO_LR = 0x01, - CMD_SUB_TO_LR = 0x02, - CMD_ADD_SUB_TO_LR = 0x03, - CMD_PROCESS = 0x04, - CMD_MIX_AUXA = 0x05, - CMD_MIX_AUXB = 0x06, - CMD_MIX_AUXC = 0x07, + CMD_SETUP = 0x00, + CMD_ADD_TO_LR = 0x01, + CMD_SUB_TO_LR = 0x02, + CMD_ADD_SUB_TO_LR = 0x03, + CMD_PROCESS = 0x04, + CMD_MIX_AUXA = 0x05, + CMD_MIX_AUXB = 0x06, + CMD_MIX_AUXC = 0x07, CMD_UPL_AUXA_MIX_LRSC = 0x08, CMD_UPL_AUXB_MIX_LRSC = 0x09, - CMD_UNK_0A = 0x0A, - CMD_OUTPUT = 0x0B, - CMD_OUTPUT_DPL2 = 0x0C, - CMD_WM_OUTPUT = 0x0D, - CMD_END = 0x0E, + CMD_UNK_0A = 0x0A, + CMD_OUTPUT = 0x0B, + CMD_OUTPUT_DPL2 = 0x0C, + CMD_WM_OUTPUT = 0x0D, + CMD_END = 0x0E, }; // A lot of these are similar to the new version, but there is an offset in @@ -93,22 +93,22 @@ private: // new AXWii). enum CmdTypeOld { - CMD_SETUP_OLD = 0x00, - CMD_ADD_TO_LR_OLD = 0x01, - CMD_SUB_TO_LR_OLD = 0x02, - CMD_ADD_SUB_TO_LR_OLD = 0x03, - CMD_PB_ADDR_OLD = 0x04, - CMD_PROCESS_OLD = 0x05, - CMD_MIX_AUXA_OLD = 0x06, - CMD_MIX_AUXB_OLD = 0x07, - CMD_MIX_AUXC_OLD = 0x08, + CMD_SETUP_OLD = 0x00, + CMD_ADD_TO_LR_OLD = 0x01, + CMD_SUB_TO_LR_OLD = 0x02, + CMD_ADD_SUB_TO_LR_OLD = 0x03, + CMD_PB_ADDR_OLD = 0x04, + CMD_PROCESS_OLD = 0x05, + CMD_MIX_AUXA_OLD = 0x06, + CMD_MIX_AUXB_OLD = 0x07, + CMD_MIX_AUXC_OLD = 0x08, CMD_UPL_AUXA_MIX_LRSC_OLD = 0x09, CMD_UPL_AUXB_MIX_LRSC_OLD = 0x0a, - CMD_UNK_0B_OLD = 0x0B, - CMD_OUTPUT_OLD = 0x0C, // no volume! - CMD_OUTPUT_DPL2_OLD = 0x0D, - CMD_WM_OUTPUT_OLD = 0x0E, - CMD_END_OLD = 0x0F + CMD_UNK_0B_OLD = 0x0B, + CMD_OUTPUT_OLD = 0x0C, // no volume! + CMD_OUTPUT_DPL2_OLD = 0x0D, + CMD_WM_OUTPUT_OLD = 0x0E, + CMD_END_OLD = 0x0F }; }; diff --git a/Source/Core/Core/HW/DSPHLE/UCodes/UCode_Zelda.h b/Source/Core/Core/HW/DSPHLE/UCodes/UCode_Zelda.h index 76f2663317..1f33a08a7a 100644 --- a/Source/Core/Core/HW/DSPHLE/UCodes/UCode_Zelda.h +++ b/Source/Core/Core/HW/DSPHLE/UCodes/UCode_Zelda.h @@ -18,87 +18,87 @@ union ZeldaVoicePB struct { // Read-Write part - u16 Status; // 0x00 | 1 = play, 0 = stop - u16 KeyOff; // 0x01 | writing 1 stops voice? - u16 RatioInt; // 0x02 | Position delta (playback speed) - u16 Unk03; // 0x03 | unknown - u16 NeedsReset; // 0x04 | indicates if some values in PB need to be reset - u16 ReachedEnd; // 0x05 | set to 1 when end reached - u16 IsBlank; // 0x06 | 0 = normal sound, 1 = samples are always the same - u16 Unk07; // 0x07 | unknown, in zelda always 0x0010. Something to do with number of saved samples (0x68)? + u16 Status; // 0x00 | 1 = play, 0 = stop + u16 KeyOff; // 0x01 | writing 1 stops voice? + u16 RatioInt; // 0x02 | Position delta (playback speed) + u16 Unk03; // 0x03 | unknown + u16 NeedsReset; // 0x04 | indicates if some values in PB need to be reset + u16 ReachedEnd; // 0x05 | set to 1 when end reached + u16 IsBlank; // 0x06 | 0 = normal sound, 1 = samples are always the same + u16 Unk07; // 0x07 | unknown, in zelda always 0x0010. Something to do with number of saved samples (0x68)? - u16 SoundType; // 0x08 | "Sound type": so far in zww: 0x0d00 for music (volume mode 0), 0x4861 for sfx (volume mode 1) - u16 volumeLeft1; // 0x09 | Left Volume 1 // There's probably two of each because they should be ramped within each frame. - u16 volumeLeft2; // 0x0A | Left Volume 2 - u16 Unk0B; // 0x0B | unknown + u16 SoundType; // 0x08 | "Sound type": so far in zww: 0x0d00 for music (volume mode 0), 0x4861 for sfx (volume mode 1) + u16 volumeLeft1; // 0x09 | Left Volume 1 // There's probably two of each because they should be ramped within each frame. + u16 volumeLeft2; // 0x0A | Left Volume 2 + u16 Unk0B; // 0x0B | unknown - u16 SoundType2; // 0x0C | "Sound type" 2 (not really sound type) - u16 volumeRight1; // 0x0D | Right Volume 1 - u16 volumeRight2; // 0x0E | Right Volume 2 - u16 Unk0F; // 0x0F | unknown + u16 SoundType2; // 0x0C | "Sound type" 2 (not really sound type) + u16 volumeRight1; // 0x0D | Right Volume 1 + u16 volumeRight2; // 0x0E | Right Volume 2 + u16 Unk0F; // 0x0F | unknown - u16 SoundType3; // 0x10 | "Sound type" 3 (not really sound type) - u16 volumeUnknown1_1; // 0x11 | Unknown Volume 1 - u16 volumeUnknown1_2; // 0x12 | Unknown Volume 1 - u16 Unk13; // 0x13 | unknown + u16 SoundType3; // 0x10 | "Sound type" 3 (not really sound type) + u16 volumeUnknown1_1; // 0x11 | Unknown Volume 1 + u16 volumeUnknown1_2; // 0x12 | Unknown Volume 1 + u16 Unk13; // 0x13 | unknown - u16 SoundType4; // 0x14 | "Sound type" 4 (not really sound type) - u16 volumeUnknown2_1; // 0x15 | Unknown Volume 2 - u16 volumeUnknown2_2; // 0x16 | Unknown Volume 2 - u16 Unk17; // 0x17 | unknown + u16 SoundType4; // 0x14 | "Sound type" 4 (not really sound type) + u16 volumeUnknown2_1; // 0x15 | Unknown Volume 2 + u16 volumeUnknown2_2; // 0x16 | Unknown Volume 2 + u16 Unk17; // 0x17 | unknown - u16 Unk18[0x10]; // 0x18 | unknown - u16 Unk28; // 0x28 | unknown - u16 Unk29; // 0x29 | unknown // multiplied by 0x2a @ 0d21/ZWW - u16 Unk2a; // 0x2A | unknown // loaded at 0d2e/ZWW - u16 Unk2b; // 0x2B | unknown - u16 VolumeMode; // 0x2C | unknown // See 0337/ZWW - u16 Unk2D; // 0x2D | unknown - u16 Unk2E; // 0x2E | unknown - u16 Unk2F; // 0x2F | unknown - u16 CurSampleFrac; // 0x30 | Fractional part of the current sample position - u16 Unk31; // 0x31 | unknown / unused - u16 CurBlock; // 0x32 | current block? used by zelda's AFC decoder. we don't need it. - u16 FixedSample; // 0x33 | sample value for "blank" voices - u32 RestartPos; // 0x34 | restart pos / "loop start offset" - u16 Unk36[2]; // 0x36 | unknown // loaded at 0adc/ZWW in 0x21 decoder - u32 CurAddr; // 0x38 | current address - u32 RemLength; // 0x3A | remaining length - u16 ResamplerOldData[4]; // 0x3C | The resampler stores the last 4 decoded samples here from the previous frame, so that the filter kernel has something to read before the start of the buffer. - u16 Unk40[0x10]; // 0x40 | Used as some sort of buffer by IIR - u16 Unk50[0x8]; // 0x50 | Used as some sort of buffer by 06ff/ZWW - u16 Unk58[0x8]; // 0x58 | - u16 Unk60[0x6]; // 0x60 | - u16 YN2; // 0x66 | YN2 - u16 YN1; // 0x67 | YN1 - u16 Unk68[0x10]; // 0x68 | Saved samples from last decode? - u16 FilterState1; // 0x78 | unknown // ZWW: 0c84_FilterBufferInPlace loads and stores. Simply, the filter state. - u16 FilterState2; // 0x79 | unknown // ZWW: same as above. these two are active if 0x04a8 != 0. - u16 Unk7A; // 0x7A | unknown - u16 Unk7B; // 0x7B | unknown - u16 Unk7C; // 0x7C | unknown - u16 Unk7D; // 0x7D | unknown - u16 Unk7E; // 0x7E | unknown - u16 Unk7F; // 0x7F | unknown + u16 Unk18[0x10]; // 0x18 | unknown + u16 Unk28; // 0x28 | unknown + u16 Unk29; // 0x29 | unknown // multiplied by 0x2a @ 0d21/ZWW + u16 Unk2a; // 0x2A | unknown // loaded at 0d2e/ZWW + u16 Unk2b; // 0x2B | unknown + u16 VolumeMode; // 0x2C | unknown // See 0337/ZWW + u16 Unk2D; // 0x2D | unknown + u16 Unk2E; // 0x2E | unknown + u16 Unk2F; // 0x2F | unknown + u16 CurSampleFrac; // 0x30 | Fractional part of the current sample position + u16 Unk31; // 0x31 | unknown / unused + u16 CurBlock; // 0x32 | current block? used by zelda's AFC decoder. we don't need it. + u16 FixedSample; // 0x33 | sample value for "blank" voices + u32 RestartPos; // 0x34 | restart pos / "loop start offset" + u16 Unk36[2]; // 0x36 | unknown // loaded at 0adc/ZWW in 0x21 decoder + u32 CurAddr; // 0x38 | current address + u32 RemLength; // 0x3A | remaining length + u16 ResamplerOldData[4]; // 0x3C | The resampler stores the last 4 decoded samples here from the previous frame, so that the filter kernel has something to read before the start of the buffer. + u16 Unk40[0x10]; // 0x40 | Used as some sort of buffer by IIR + u16 Unk50[0x8]; // 0x50 | Used as some sort of buffer by 06ff/ZWW + u16 Unk58[0x8]; // 0x58 | + u16 Unk60[0x6]; // 0x60 | + u16 YN2; // 0x66 | YN2 + u16 YN1; // 0x67 | YN1 + u16 Unk68[0x10]; // 0x68 | Saved samples from last decode? + u16 FilterState1; // 0x78 | unknown // ZWW: 0c84_FilterBufferInPlace loads and stores. Simply, the filter state. + u16 FilterState2; // 0x79 | unknown // ZWW: same as above. these two are active if 0x04a8 != 0. + u16 Unk7A; // 0x7A | unknown + u16 Unk7B; // 0x7B | unknown + u16 Unk7C; // 0x7C | unknown + u16 Unk7D; // 0x7D | unknown + u16 Unk7E; // 0x7E | unknown + u16 Unk7F; // 0x7F | unknown // Read-only part - u16 Format; // 0x80 | audio format - u16 RepeatMode; // 0x81 | 0 = one-shot, non zero = loop - u16 LoopYN1; // 0x82 | YN1 reload (when AFC loops) - u16 LoopYN2; // 0x83 | YN2 reload (when AFC loops) - u16 Unk84; // 0x84 | IIR Filter # coefs? - u16 StopOnSilence; // 0x85 | Stop on silence? (Flag for something volume related. Decides the weird stuff at 035a/ZWW, alco 0cd3) - u16 Unk86; // 0x86 | unknown - u16 Unk87; // 0x87 | unknown - u32 LoopStartPos; // 0x88 | loopstart pos - u32 Length; // 0x8A | sound length - u32 StartAddr; // 0x8C | sound start address - u32 UnkAddr; // 0x8E | ??? - u16 Padding[0x10]; // 0x90 | padding - u16 Padding2[0x8]; // 0xa0 | FIR filter coefs of some sort (0xa4 controls the appearance of 0xa5-0xa7 and is almost always 0x7FFF) - u16 FilterEnable; // 0xa8 | FilterBufferInPlace enable - u16 Padding3[0x7]; // 0xa9 | padding - u16 Padding4[0x10]; // 0xb0 | padding + u16 Format; // 0x80 | audio format + u16 RepeatMode; // 0x81 | 0 = one-shot, non zero = loop + u16 LoopYN1; // 0x82 | YN1 reload (when AFC loops) + u16 LoopYN2; // 0x83 | YN2 reload (when AFC loops) + u16 Unk84; // 0x84 | IIR Filter # coefs? + u16 StopOnSilence; // 0x85 | Stop on silence? (Flag for something volume related. Decides the weird stuff at 035a/ZWW, alco 0cd3) + u16 Unk86; // 0x86 | unknown + u16 Unk87; // 0x87 | unknown + u32 LoopStartPos; // 0x88 | loopstart pos + u32 Length; // 0x8A | sound length + u32 StartAddr; // 0x8C | sound start address + u32 UnkAddr; // 0x8E | ??? + u16 Padding[0x10]; // 0x90 | padding + u16 Padding2[0x8]; // 0xa0 | FIR filter coefs of some sort (0xa4 controls the appearance of 0xa5-0xa7 and is almost always 0x7FFF) + u16 FilterEnable; // 0xa8 | FilterBufferInPlace enable + u16 Padding3[0x7]; // 0xa9 | padding + u16 Padding4[0x10]; // 0xb0 | padding }; u16 raw[0xc0]; // WARNING-do not use on parts of the 32-bit values - they are swapped! }; @@ -107,10 +107,10 @@ union ZeldaUnkPB { struct { - u16 Control; // 0x00 | control - u16 Unk01; // 0x01 | unknown - u32 SrcAddr; // 0x02 | some address - u16 Unk04[0xC]; // 0x04 | unknown + u16 Control; // 0x00 | control + u16 Unk01; // 0x01 | unknown + u32 SrcAddr; // 0x02 | some address + u16 Unk04[0xC]; // 0x04 | unknown }; u16 raw[16]; }; diff --git a/Source/Core/Core/HW/DSPHLE/UCodes/UCodes.h b/Source/Core/Core/HW/DSPHLE/UCodes/UCodes.h index 7737a8a59b..7d0e086bdd 100644 --- a/Source/Core/Core/HW/DSPHLE/UCodes/UCodes.h +++ b/Source/Core/Core/HW/DSPHLE/UCodes/UCodes.h @@ -100,12 +100,12 @@ protected: enum EDSP_Codes { - DSP_INIT = 0xDCD10000, - DSP_RESUME = 0xDCD10001, - DSP_YIELD = 0xDCD10002, - DSP_DONE = 0xDCD10003, - DSP_SYNC = 0xDCD10004, - DSP_FRAME_END = 0xDCD10005, + DSP_INIT = 0xDCD10000, + DSP_RESUME = 0xDCD10001, + DSP_YIELD = 0xDCD10002, + DSP_DONE = 0xDCD10003, + DSP_SYNC = 0xDCD10004, + DSP_FRAME_END = 0xDCD10005, }; // UCode is forwarding mails to PrepareBootUCode diff --git a/Source/Core/Core/HW/DVDInterface.cpp b/Source/Core/Core/HW/DVDInterface.cpp index 52696ebf1d..90e2bbf2eb 100644 --- a/Source/Core/Core/HW/DVDInterface.cpp +++ b/Source/Core/Core/HW/DVDInterface.cpp @@ -30,35 +30,35 @@ namespace DVDInterface // internal hardware addresses enum { - DI_STATUS_REGISTER = 0x00, - DI_COVER_REGISTER = 0x04, - DI_COMMAND_0 = 0x08, - DI_COMMAND_1 = 0x0C, - DI_COMMAND_2 = 0x10, - DI_DMA_ADDRESS_REGISTER = 0x14, - DI_DMA_LENGTH_REGISTER = 0x18, - DI_DMA_CONTROL_REGISTER = 0x1C, - DI_IMMEDIATE_DATA_BUFFER = 0x20, - DI_CONFIG_REGISTER = 0x24 + DI_STATUS_REGISTER = 0x00, + DI_COVER_REGISTER = 0x04, + DI_COMMAND_0 = 0x08, + DI_COMMAND_1 = 0x0C, + DI_COMMAND_2 = 0x10, + DI_DMA_ADDRESS_REGISTER = 0x14, + DI_DMA_LENGTH_REGISTER = 0x18, + DI_DMA_CONTROL_REGISTER = 0x1C, + DI_IMMEDIATE_DATA_BUFFER = 0x20, + DI_CONFIG_REGISTER = 0x24 }; // DVD IntteruptTypes enum DI_InterruptType { - INT_DEINT = 0, - INT_TCINT = 1, - INT_BRKINT = 2, - INT_CVRINT = 3, + INT_DEINT = 0, + INT_TCINT = 1, + INT_BRKINT = 2, + INT_CVRINT = 3, }; // debug commands which may be ORd enum { - STOP_DRIVE = 0, - START_DRIVE = 0x100, - ACCEPT_COPY = 0x4000, - DISC_CHECK = 0x8000, + STOP_DRIVE = 0, + START_DRIVE = 0x100, + ACCEPT_COPY = 0x4000, + DISC_CHECK = 0x8000, }; // DI Status Register @@ -67,14 +67,14 @@ union UDISR u32 Hex; struct { - u32 BREAK : 1; // Stop the Device + Interrupt - u32 DEINITMASK : 1; // Access Device Error Int Mask - u32 DEINT : 1; // Access Device Error Int - u32 TCINTMASK : 1; // Transfer Complete Int Mask - u32 TCINT : 1; // Transfer Complete Int - u32 BRKINTMASK : 1; - u32 BRKINT : 1; // w 1: clear brkint - u32 : 25; + u32 BREAK : 1; // Stop the Device + Interrupt + u32 DEINITMASK : 1; // Access Device Error Int Mask + u32 DEINT : 1; // Access Device Error Int + u32 TCINTMASK : 1; // Transfer Complete Int Mask + u32 TCINT : 1; // Transfer Complete Int + u32 BRKINTMASK : 1; + u32 BRKINT : 1; // w 1: clear brkint + u32 : 25; }; UDISR() {Hex = 0;} UDISR(u32 _hex) {Hex = _hex;} @@ -86,10 +86,10 @@ union UDICVR u32 Hex; struct { - u32 CVR : 1; // 0: Cover closed 1: Cover open - u32 CVRINTMASK : 1; // 1: Interrupt enabled - u32 CVRINT : 1; // r 1: Interrupt requested w 1: Interrupt clear - u32 : 29; + u32 CVR : 1; // 0: Cover closed 1: Cover open + u32 CVRINTMASK : 1; // 1: Interrupt enabled + u32 CVRINT : 1; // r 1: Interrupt requested w 1: Interrupt clear + u32 : 29; }; UDICVR() {Hex = 0;} UDICVR(u32 _hex) {Hex = _hex;} @@ -113,13 +113,13 @@ union UDIMAR u32 Hex; struct { - u32 Zerobits : 5; // Must be zero (32byte aligned) - u32 : 27; + u32 Zerobits : 5; // Must be zero (32byte aligned) + u32 : 27; }; struct { - u32 Address : 26; - u32 : 6; + u32 Address : 26; + u32 : 6; }; }; @@ -129,13 +129,13 @@ union UDILENGTH u32 Hex; struct { - u32 Zerobits : 5; // Must be zero (32byte aligned) - u32 : 27; + u32 Zerobits : 5; // Must be zero (32byte aligned) + u32 : 27; }; struct { - u32 Length : 26; - u32 : 6; + u32 Length : 26; + u32 : 6; }; }; @@ -145,10 +145,10 @@ union UDICR u32 Hex; struct { - u32 TSTART : 1; // w:1 start r:0 ready - u32 DMA : 1; // 1: DMA Mode 0: Immediate Mode (can only do Access Register Command) - u32 RW : 1; // 0: Read Command (DVD to Memory) 1: Write Command (Memory to DVD) - u32 : 29; + u32 TSTART : 1; // w:1 start r:0 ready + u32 DMA : 1; // 1: DMA Mode 0: Immediate Mode (can only do Access Register Command) + u32 RW : 1; // 0: Read Command (DVD to Memory) 1: Write Command (Memory to DVD) + u32 : 29; }; }; @@ -170,8 +170,8 @@ union UDICFG u32 Hex; struct { - u32 CONFIG : 8; - u32 : 24; + u32 CONFIG : 8; + u32 : 24; }; UDICFG() {Hex = 0;} UDICFG(u32 _hex) {Hex = _hex;} @@ -180,22 +180,22 @@ union UDICFG // STATE_TO_SAVE // hardware registers -static UDISR m_DISR; -static UDICVR m_DICVR; -static UDICMDBUF m_DICMDBUF[3]; -static UDIMAR m_DIMAR; -static UDILENGTH m_DILENGTH; -static UDICR m_DICR; -static UDIIMMBUF m_DIIMMBUF; -static UDICFG m_DICFG; +static UDISR m_DISR; +static UDICVR m_DICVR; +static UDICMDBUF m_DICMDBUF[3]; +static UDIMAR m_DIMAR; +static UDILENGTH m_DILENGTH; +static UDICR m_DICR; +static UDIIMMBUF m_DIIMMBUF; +static UDICFG m_DICFG; -static u32 LoopStart; -static u32 AudioPos; -static u32 CurrentStart; -static u32 LoopLength; -static u32 CurrentLength; +static u32 LoopStart; +static u32 AudioPos; +static u32 CurrentStart; +static u32 LoopLength; +static u32 CurrentLength; -u32 g_ErrorCode = 0; +u32 g_ErrorCode = 0; bool g_bDiscInside = false; bool g_bStream = false; int tc = 0; diff --git a/Source/Core/Core/HW/DVDInterface.h b/Source/Core/Core/HW/DVDInterface.h index 8d9648510b..61dfb4aeb5 100644 --- a/Source/Core/Core/HW/DVDInterface.h +++ b/Source/Core/Core/HW/DVDInterface.h @@ -43,65 +43,65 @@ void Write32(const u32 _iValue, const u32 _iAddress); // Not sure about endianness here. I'll just name them like this... enum DIErrorLow { - ERROR_READY = 0x00000000, // Ready. - ERROR_COVER_L = 0x01000000, // Cover is opened. - ERROR_CHANGE_DISK = 0x02000000, // Disk change. - ERROR_NO_DISK = 0x03000000, // No Disk. - ERROR_MOTOR_STOP_L = 0x04000000, // Motor stop. - ERROR_NO_DISKID_L = 0x05000000 // Disk ID not read. + ERROR_READY = 0x00000000, // Ready. + ERROR_COVER_L = 0x01000000, // Cover is opened. + ERROR_CHANGE_DISK = 0x02000000, // Disk change. + ERROR_NO_DISK = 0x03000000, // No Disk. + ERROR_MOTOR_STOP_L = 0x04000000, // Motor stop. + ERROR_NO_DISKID_L = 0x05000000 // Disk ID not read. }; enum DIErrorHigh { - ERROR_NONE = 0x000000, // No error. - ERROR_MOTOR_STOP_H = 0x020400, // Motor stopped. - ERROR_NO_DISKID_H = 0x020401, // Disk ID not read. - ERROR_COVER_H = 0x023a00, // Medium not present / Cover opened. - ERROR_SEEK_NDONE = 0x030200, // No Seek complete. - ERROR_READ = 0x031100, // UnRecoverd read error. - ERROR_PROTOCOL = 0x040800, // Transfer protocol error. - ERROR_INV_CMD = 0x052000, // Invalid command operation code. - ERROR_AUDIO_BUF = 0x052001, // Audio Buffer not set. - ERROR_BLOCK_OOB = 0x052100, // Logical block address out of bounds. - ERROR_INV_FIELD = 0x052400, // Invalid Field in command packet. - ERROR_INV_AUDIO = 0x052401, // Invalid audio command. - ERROR_INV_PERIOD = 0x052402, // Configuration out of permitted period. - ERROR_END_USR_AREA = 0x056300, // End of user area encountered on this track. - ERROR_MEDIUM = 0x062800, // Medium may have changed. - ERROR_MEDIUM_REQ = 0x0b5a01 // Operator medium removal request. + ERROR_NONE = 0x000000, // No error. + ERROR_MOTOR_STOP_H = 0x020400, // Motor stopped. + ERROR_NO_DISKID_H = 0x020401, // Disk ID not read. + ERROR_COVER_H = 0x023a00, // Medium not present / Cover opened. + ERROR_SEEK_NDONE = 0x030200, // No Seek complete. + ERROR_READ = 0x031100, // UnRecoverd read error. + ERROR_PROTOCOL = 0x040800, // Transfer protocol error. + ERROR_INV_CMD = 0x052000, // Invalid command operation code. + ERROR_AUDIO_BUF = 0x052001, // Audio Buffer not set. + ERROR_BLOCK_OOB = 0x052100, // Logical block address out of bounds. + ERROR_INV_FIELD = 0x052400, // Invalid Field in command packet. + ERROR_INV_AUDIO = 0x052401, // Invalid audio command. + ERROR_INV_PERIOD = 0x052402, // Configuration out of permitted period. + ERROR_END_USR_AREA = 0x056300, // End of user area encountered on this track. + ERROR_MEDIUM = 0x062800, // Medium may have changed. + ERROR_MEDIUM_REQ = 0x0b5a01 // Operator medium removal request. }; enum DICommand { - DVDLowInquiry = 0x12, - DVDLowReadDiskID = 0x70, - DVDLowRead = 0x71, - DVDLowWaitForCoverClose = 0x79, - DVDLowGetCoverReg = 0x7a, // DVDLowPrepareCoverRegister? - DVDLowNotifyReset = 0x7e, - DVDLowReadDvdPhysical = 0x80, - DVDLowReadDvdCopyright = 0x81, - DVDLowReadDvdDiscKey = 0x82, - DVDLowClearCoverInterrupt = 0x86, - DVDLowGetCoverStatus = 0x88, - DVDLowReset = 0x8a, - DVDLowOpenPartition = 0x8b, - DVDLowClosePartition = 0x8c, - DVDLowUnencryptedRead = 0x8d, - DVDLowEnableDvdVideo = 0x8e, - DVDLowReportKey = 0xa4, - DVDLowSeek = 0xab, - DVDLowReadDvd = 0xd0, - DVDLowReadDvdConfig = 0xd1, - DVDLowStopLaser = 0xd2, - DVDLowOffset = 0xd9, - DVDLowReadDiskBca = 0xda, - DVDLowRequestDiscStatus = 0xdb, - DVDLowRequestRetryNumber = 0xdc, - DVDLowSetMaximumRotation = 0xdd, - DVDLowSerMeasControl = 0xdf, - DVDLowRequestError = 0xe0, - DVDLowStopMotor = 0xe3, - DVDLowAudioBufferConfig = 0xe4 + DVDLowInquiry = 0x12, + DVDLowReadDiskID = 0x70, + DVDLowRead = 0x71, + DVDLowWaitForCoverClose = 0x79, + DVDLowGetCoverReg = 0x7a, // DVDLowPrepareCoverRegister? + DVDLowNotifyReset = 0x7e, + DVDLowReadDvdPhysical = 0x80, + DVDLowReadDvdCopyright = 0x81, + DVDLowReadDvdDiscKey = 0x82, + DVDLowClearCoverInterrupt = 0x86, + DVDLowGetCoverStatus = 0x88, + DVDLowReset = 0x8a, + DVDLowOpenPartition = 0x8b, + DVDLowClosePartition = 0x8c, + DVDLowUnencryptedRead = 0x8d, + DVDLowEnableDvdVideo = 0x8e, + DVDLowReportKey = 0xa4, + DVDLowSeek = 0xab, + DVDLowReadDvd = 0xd0, + DVDLowReadDvdConfig = 0xd1, + DVDLowStopLaser = 0xd2, + DVDLowOffset = 0xd9, + DVDLowReadDiskBca = 0xda, + DVDLowRequestDiscStatus = 0xdb, + DVDLowRequestRetryNumber = 0xdc, + DVDLowSetMaximumRotation = 0xdd, + DVDLowSerMeasControl = 0xdf, + DVDLowRequestError = 0xe0, + DVDLowStopMotor = 0xe3, + DVDLowAudioBufferConfig = 0xe4 }; } // end of namespace DVDInterface diff --git a/Source/Core/Core/HW/EXI_Channel.h b/Source/Core/Core/HW/EXI_Channel.h index 1555df3d1f..d47e1be7da 100644 --- a/Source/Core/Core/HW/EXI_Channel.h +++ b/Source/Core/Core/HW/EXI_Channel.h @@ -16,11 +16,11 @@ private: enum { - EXI_STATUS = 0, - EXI_DMAADDR = 1, - EXI_DMALENGTH = 2, - EXI_DMACONTROL = 3, - EXI_IMMDATA = 4 + EXI_STATUS = 0, + EXI_DMAADDR = 1, + EXI_DMALENGTH = 2, + EXI_DMACONTROL = 3, + EXI_IMMDATA = 4 }; const char* Debug_GetRegisterName(u32 _register) { @@ -42,21 +42,21 @@ private: // DO NOT obey the warning and give this struct a name. Things will fail. struct { - // Indentation Meaning: - // Channels 0, 1, 2 - // Channels 0, 1 only - // Channel 0 only - u32 EXIINTMASK : 1; - u32 EXIINT : 1; - u32 TCINTMASK : 1; - u32 TCINT : 1; - u32 CLK : 3; - u32 CHIP_SELECT : 3; // CS1 and CS2 are Channel 0 only - u32 EXTINTMASK : 1; - u32 EXTINT : 1; - u32 EXT : 1; // External Insertion Status (1: External EXI device present) - u32 ROMDIS : 1; // ROM Disable - u32 :18; + // Indentation Meaning: + // Channels 0, 1, 2 + // Channels 0, 1 only + // Channel 0 only + u32 EXIINTMASK : 1; + u32 EXIINT : 1; + u32 TCINTMASK : 1; + u32 TCINT : 1; + u32 CLK : 3; + u32 CHIP_SELECT : 3; // CS1 and CS2 are Channel 0 only + u32 EXTINTMASK : 1; + u32 EXTINT : 1; + u32 EXT : 1; // External Insertion Status (1: External EXI device present) + u32 ROMDIS : 1; // ROM Disable + u32 :18; }; UEXI_STATUS() {Hex = 0;} UEXI_STATUS(u32 _hex) {Hex = _hex;} @@ -68,20 +68,20 @@ private: u32 Hex; struct { - u32 TSTART : 1; - u32 DMA : 1; - u32 RW : 2; - u32 TLEN : 2; - u32 :26; + u32 TSTART : 1; + u32 DMA : 1; + u32 RW : 2; + u32 TLEN : 2; + u32 :26; }; }; // STATE_TO_SAVE - UEXI_STATUS m_Status; - u32 m_DMAMemoryAddress; - u32 m_DMALength; - UEXI_CONTROL m_Control; - u32 m_ImmData; + UEXI_STATUS m_Status; + u32 m_DMAMemoryAddress; + u32 m_DMALength; + UEXI_CONTROL m_Control; + u32 m_ImmData; // Devices enum diff --git a/Source/Core/Core/HW/EXI_DeviceAD16.h b/Source/Core/Core/HW/EXI_DeviceAD16.h index b80db4882b..46a5bf0604 100644 --- a/Source/Core/Core/HW/EXI_DeviceAD16.h +++ b/Source/Core/Core/HW/EXI_DeviceAD16.h @@ -16,9 +16,9 @@ public: private: enum { - init = 0x00, - write = 0xa0, - read = 0xa2 + init = 0x00, + write = 0xa0, + read = 0xa2 }; union UAD16Reg diff --git a/Source/Core/Core/HW/EXI_DeviceEthernet.h b/Source/Core/Core/HW/EXI_DeviceEthernet.h index ba66e816f8..39e6f5c694 100644 --- a/Source/Core/Core/HW/EXI_DeviceEthernet.h +++ b/Source/Core/Core/HW/EXI_DeviceEthernet.h @@ -14,172 +14,172 @@ // Network Control Register A enum NCRA { - NCRA_RESET = 0x01, // RESET - NCRA_ST0 = 0x02, // Start transmit command/status - NCRA_ST1 = 0x04, // " - NCRA_SR = 0x08 // Start Receive + NCRA_RESET = 0x01, // RESET + NCRA_ST0 = 0x02, // Start transmit command/status + NCRA_ST1 = 0x04, // " + NCRA_SR = 0x08 // Start Receive }; // Network Control Register B enum NCRB { - NCRB_PR = 0x01, // Promiscuous Mode - NCRB_CA = 0x02, // Capture Effect Mode - NCRB_PM = 0x04, // Pass Multicast - NCRB_PB = 0x08, // Pass Bad Frame - NCRB_AB = 0x10, // Accept Broadcast - NCRB_HBD = 0x20, // reserved - NCRB_RXINTC = 0xC0 // Receive Interrupt Counter (mask) + NCRB_PR = 0x01, // Promiscuous Mode + NCRB_CA = 0x02, // Capture Effect Mode + NCRB_PM = 0x04, // Pass Multicast + NCRB_PB = 0x08, // Pass Bad Frame + NCRB_AB = 0x10, // Accept Broadcast + NCRB_HBD = 0x20, // reserved + NCRB_RXINTC = 0xC0 // Receive Interrupt Counter (mask) }; // Interrupt Mask Register // Interrupt Register enum Interrupts { - INT_FRAG = 0x01, // Fragment Counter - INT_R = 0x02, // Receive - INT_T = 0x04, // Transmit - INT_R_ERR = 0x08, // Receive Error - INT_T_ERR = 0x10, // Transmit Error - INT_FIFO_ERR = 0x20, // FIFO Error - INT_BUS_ERR = 0x40, // BUS Error - INT_RBF = 0x80 // RX Buffer Full + INT_FRAG = 0x01, // Fragment Counter + INT_R = 0x02, // Receive + INT_T = 0x04, // Transmit + INT_R_ERR = 0x08, // Receive Error + INT_T_ERR = 0x10, // Transmit Error + INT_FIFO_ERR = 0x20, // FIFO Error + INT_BUS_ERR = 0x40, // BUS Error + INT_RBF = 0x80 // RX Buffer Full }; // NWAY Configuration Register enum NWAYC { - NWAYC_FD = 0x01, // Full Duplex Mode - NWAYC_PS100_10 = 0x02, // Port Select 100/10 - NWAYC_ANE = 0x04, // Autonegotiate enable + NWAYC_FD = 0x01, // Full Duplex Mode + NWAYC_PS100_10 = 0x02, // Port Select 100/10 + NWAYC_ANE = 0x04, // Autonegotiate enable // Autonegotiation status bits... - NWAYC_NTTEST = 0x40, // Reserved - NWAYC_LTE = 0x80 // Link Test Enable + NWAYC_NTTEST = 0x40, // Reserved + NWAYC_LTE = 0x80 // Link Test Enable }; enum NWAYS { - NWAYS_LS10 = 0x01, - NWAYS_LS100 = 0x02, - NWAYS_LPNWAY = 0x04, - NWAYS_ANCLPT = 0x08, - NWAYS_100TXF = 0x10, - NWAYS_100TXH = 0x20, - NWAYS_10TXF = 0x40, - NWAYS_10TXH = 0x80 + NWAYS_LS10 = 0x01, + NWAYS_LS100 = 0x02, + NWAYS_LPNWAY = 0x04, + NWAYS_ANCLPT = 0x08, + NWAYS_100TXF = 0x10, + NWAYS_100TXH = 0x20, + NWAYS_10TXF = 0x40, + NWAYS_10TXH = 0x80 }; enum MISC1 { - MISC1_BURSTDMA = 0x01, - MISC1_DISLDMA = 0x02, - MISC1_TPF = 0x04, - MISC1_TPH = 0x08, - MISC1_TXF = 0x10, - MISC1_TXH = 0x20, - MISC1_TXFIFORST = 0x40, - MISC1_RXFIFORST = 0x80 + MISC1_BURSTDMA = 0x01, + MISC1_DISLDMA = 0x02, + MISC1_TPF = 0x04, + MISC1_TPH = 0x08, + MISC1_TXF = 0x10, + MISC1_TXH = 0x20, + MISC1_TXFIFORST = 0x40, + MISC1_RXFIFORST = 0x80 }; enum MISC2 { - MISC2_HBRLEN0 = 0x01, - MISC2_HBRLEN1 = 0x02, - MISC2_RUNTSIZE = 0x04, - MISC2_DREQBCTRL = 0x08, - MISC2_RINTSEL = 0x10, - MISC2_ITPSEL = 0x20, - MISC2_A11A8EN = 0x40, - MISC2_AUTORCVR = 0x80 + MISC2_HBRLEN0 = 0x01, + MISC2_HBRLEN1 = 0x02, + MISC2_RUNTSIZE = 0x04, + MISC2_DREQBCTRL = 0x08, + MISC2_RINTSEL = 0x10, + MISC2_ITPSEL = 0x20, + MISC2_A11A8EN = 0x40, + MISC2_AUTORCVR = 0x80 }; enum { - BBA_NCRA = 0x00, - BBA_NCRB = 0x01, + BBA_NCRA = 0x00, + BBA_NCRB = 0x01, - BBA_LTPS = 0x04, - BBA_LRPS = 0x05, + BBA_LTPS = 0x04, + BBA_LRPS = 0x05, - BBA_IMR = 0x08, - BBA_IR = 0x09, + BBA_IMR = 0x08, + BBA_IR = 0x09, - BBA_BP = 0x0a, - BBA_TLBP = 0x0c, - BBA_TWP = 0x0e, - BBA_IOB = 0x10, - BBA_TRP = 0x12, - BBA_RWP = 0x16, - BBA_RRP = 0x18, - BBA_RHBP = 0x1a, + BBA_BP = 0x0a, + BBA_TLBP = 0x0c, + BBA_TWP = 0x0e, + BBA_IOB = 0x10, + BBA_TRP = 0x12, + BBA_RWP = 0x16, + BBA_RRP = 0x18, + BBA_RHBP = 0x1a, - BBA_RXINTT = 0x14, + BBA_RXINTT = 0x14, - BBA_NAFR_PAR0 = 0x20, - BBA_NAFR_PAR1 = 0x21, - BBA_NAFR_PAR2 = 0x22, - BBA_NAFR_PAR3 = 0x23, - BBA_NAFR_PAR4 = 0x24, - BBA_NAFR_PAR5 = 0x25, - BBA_NAFR_MAR0 = 0x26, - BBA_NAFR_MAR1 = 0x27, - BBA_NAFR_MAR2 = 0x28, - BBA_NAFR_MAR3 = 0x29, - BBA_NAFR_MAR4 = 0x2a, - BBA_NAFR_MAR5 = 0x2b, - BBA_NAFR_MAR6 = 0x2c, - BBA_NAFR_MAR7 = 0x2d, + BBA_NAFR_PAR0 = 0x20, + BBA_NAFR_PAR1 = 0x21, + BBA_NAFR_PAR2 = 0x22, + BBA_NAFR_PAR3 = 0x23, + BBA_NAFR_PAR4 = 0x24, + BBA_NAFR_PAR5 = 0x25, + BBA_NAFR_MAR0 = 0x26, + BBA_NAFR_MAR1 = 0x27, + BBA_NAFR_MAR2 = 0x28, + BBA_NAFR_MAR3 = 0x29, + BBA_NAFR_MAR4 = 0x2a, + BBA_NAFR_MAR5 = 0x2b, + BBA_NAFR_MAR6 = 0x2c, + BBA_NAFR_MAR7 = 0x2d, - BBA_NWAYC = 0x30, - BBA_NWAYS = 0x31, + BBA_NWAYC = 0x30, + BBA_NWAYS = 0x31, - BBA_GCA = 0x32, + BBA_GCA = 0x32, - BBA_MISC = 0x3d, + BBA_MISC = 0x3d, - BBA_TXFIFOCNT = 0x3e, - BBA_WRTXFIFOD = 0x48, + BBA_TXFIFOCNT = 0x3e, + BBA_WRTXFIFOD = 0x48, - BBA_MISC2 = 0x50, + BBA_MISC2 = 0x50, - BBA_SI_ACTRL = 0x5c, - BBA_SI_STATUS = 0x5d, - BBA_SI_ACTRL2 = 0x60 + BBA_SI_ACTRL = 0x5c, + BBA_SI_STATUS = 0x5d, + BBA_SI_ACTRL2 = 0x60 }; enum { - BBA_NUM_PAGES = 0x10, - BBA_PAGE_SIZE = 0x100, - BBA_MEM_SIZE = BBA_NUM_PAGES * BBA_PAGE_SIZE + BBA_NUM_PAGES = 0x10, + BBA_PAGE_SIZE = 0x100, + BBA_MEM_SIZE = BBA_NUM_PAGES * BBA_PAGE_SIZE }; enum { EXI_DEVTYPE_ETHER = 0x04020200 }; enum SendStatus { - DESC_CC0 = 0x01, - DESC_CC1 = 0x02, - DESC_CC2 = 0x04, - DESC_CC3 = 0x08, - DESC_CRSLOST= 0x10, - DESC_UF = 0x20, - DESC_OWC = 0x40, - DESC_OWN = 0x80 + DESC_CC0 = 0x01, + DESC_CC1 = 0x02, + DESC_CC2 = 0x04, + DESC_CC3 = 0x08, + DESC_CRSLOST = 0x10, + DESC_UF = 0x20, + DESC_OWC = 0x40, + DESC_OWN = 0x80 }; enum RecvStatus { - DESC_BF = 0x01, - DESC_CRC = 0x02, - DESC_FAE = 0x04, - DESC_FO = 0x08, - DESC_RW = 0x10, - DESC_MF = 0x20, - DESC_RF = 0x40, - DESC_RERR = 0x80 + DESC_BF = 0x01, + DESC_CRC = 0x02, + DESC_FAE = 0x04, + DESC_FO = 0x08, + DESC_RW = 0x10, + DESC_MF = 0x20, + DESC_RF = 0x40, + DESC_RERR = 0x80 }; #define BBA_RECV_SIZE 0x800 diff --git a/Source/Core/Core/HW/EXI_DeviceMemoryCard.h b/Source/Core/Core/HW/EXI_DeviceMemoryCard.h index 2651ca08f0..49ab2a55aa 100644 --- a/Source/Core/Core/HW/EXI_DeviceMemoryCard.h +++ b/Source/Core/Core/HW/EXI_DeviceMemoryCard.h @@ -48,21 +48,21 @@ private: enum { - cmdNintendoID = 0x00, - cmdReadArray = 0x52, - cmdArrayToBuffer = 0x53, - cmdSetInterrupt = 0x81, - cmdWriteBuffer = 0x82, - cmdReadStatus = 0x83, - cmdReadID = 0x85, - cmdReadErrorBuffer = 0x86, - cmdWakeUp = 0x87, - cmdSleep = 0x88, - cmdClearStatus = 0x89, - cmdSectorErase = 0xF1, - cmdPageProgram = 0xF2, - cmdExtraByteProgram = 0xF3, - cmdChipErase = 0xF4, + cmdNintendoID = 0x00, + cmdReadArray = 0x52, + cmdArrayToBuffer = 0x53, + cmdSetInterrupt = 0x81, + cmdWriteBuffer = 0x82, + cmdReadStatus = 0x83, + cmdReadID = 0x85, + cmdReadErrorBuffer = 0x86, + cmdWakeUp = 0x87, + cmdSleep = 0x88, + cmdClearStatus = 0x89, + cmdSectorErase = 0xF1, + cmdPageProgram = 0xF2, + cmdExtraByteProgram = 0xF3, + cmdChipErase = 0xF4, }; std::string m_strFilename; diff --git a/Source/Core/Core/HW/EXI_DeviceMic.h b/Source/Core/Core/HW/EXI_DeviceMic.h index ff4fe522e6..3305362934 100644 --- a/Source/Core/Core/HW/EXI_DeviceMic.h +++ b/Source/Core/Core/HW/EXI_DeviceMic.h @@ -26,11 +26,11 @@ private: enum { - cmdID = 0x00, - cmdGetStatus = 0x40, - cmdSetStatus = 0x80, - cmdGetBuffer = 0x20, - cmdReset = 0xFF, + cmdID = 0x00, + cmdGetStatus = 0x40, + cmdSetStatus = 0x80, + cmdGetBuffer = 0x20, + cmdReset = 0xFF, }; int slot; @@ -43,15 +43,15 @@ private: u8 U8[2]; struct { - u16 out :4; // MICSet/GetOut...??? - u16 id :1; // Used for MICGetDeviceID (always 0) - u16 button_unk :3; // Button bits which appear unused - u16 button :1; // The actual button on the mic - u16 buff_ovrflw :1; // Ring buffer wrote over bytes which weren't read by console - u16 gain :1; // Gain: 0dB or 15dB - u16 sample_rate :2; // Sample rate, 00-11025, 01-22050, 10-44100, 11-?? - u16 buff_size :2; // Ring buffer size in bytes, 00-32, 01-64, 10-128, 11-??? - u16 is_active :1; // If we are sampling or not + u16 out : 4; // MICSet/GetOut...??? + u16 id : 1; // Used for MICGetDeviceID (always 0) + u16 button_unk : 3; // Button bits which appear unused + u16 button : 1; // The actual button on the mic + u16 buff_ovrflw : 1; // Ring buffer wrote over bytes which weren't read by console + u16 gain : 1; // Gain: 0dB or 15dB + u16 sample_rate : 2; // Sample rate, 00-11025, 01-22050, 10-44100, 11-?? + u16 buff_size : 2; // Ring buffer size in bytes, 00-32, 01-64, 10-128, 11-??? + u16 is_active : 1; // If we are sampling or not }; }; diff --git a/Source/Core/Core/HW/GCMemcard.h b/Source/Core/Core/HW/GCMemcard.h index fdd553194a..ad001de03c 100644 --- a/Source/Core/Core/HW/GCMemcard.h +++ b/Source/Core/Core/HW/GCMemcard.h @@ -73,88 +73,88 @@ private: }; std::vector mc_data_blocks; #pragma pack(push,1) - struct Header { //Offset Size Description + struct Header { //Offset Size Description // Serial in libogc - u8 serial[12]; //0x0000 12 ? - u64 formatTime; //0x000c 8 time of format (OSTime value) - u32 SramBias; //0x0014 4 sram bias at time of format - u32 SramLang; //0x0018 4 sram language - u8 Unk2[4]; //0x001c 4 ? almost always 0 + u8 serial[12]; //0x0000 12 ? + u64 formatTime; //0x000c 8 Time of format (OSTime value) + u32 SramBias; //0x0014 4 SRAM bias at time of format + u32 SramLang; //0x0018 4 SRAM language + u8 Unk2[4]; //0x001c 4 ? almost always 0 // end Serial in libogc - u8 deviceID[2]; //0x0020 2 0 if formated in slot A 1 if formated in slot B - u8 SizeMb[2]; //0x0022 2 size of memcard in Mbits - u16 Encoding; //0x0024 2 encoding (ASCII or japanese) - u8 Unused1[468]; //0x0026 468 unused (0xff) - u16 UpdateCounter; //0x01fa 2 update Counter (?, probably unused) - u16 Checksum; //0x01fc 2 Additive Checksum - u16 Checksum_Inv; //0x01fe 2 Inverse Checksum - u8 Unused2[7680]; //0x0200 0x1e00 unused (0xff) + u8 deviceID[2]; //0x0020 2 0 if formated in slot A 1 if formated in slot B + u8 SizeMb[2]; //0x0022 2 Size of memcard in Mbits + u16 Encoding; //0x0024 2 Encoding (ASCII or japanese) + u8 Unused1[468]; //0x0026 468 Unused (0xff) + u16 UpdateCounter; //0x01fa 2 Update Counter (?, probably unused) + u16 Checksum; //0x01fc 2 Additive Checksum + u16 Checksum_Inv; //0x01fe 2 Inverse Checksum + u8 Unused2[7680]; //0x0200 0x1e00 Unused (0xff) } hdr; struct DEntry { - u8 Gamecode[4]; //0x00 0x04 Gamecode - u8 Makercode[2]; //0x04 0x02 Makercode - u8 Unused1; //0x06 0x01 reserved/unused (always 0xff, has no effect) - u8 BIFlags; //0x07 0x01 banner gfx format and icon animation (Image Key) - // bit(s) description - // 2 Icon Animation 0: forward 1: ping-pong - // 1 [--0: No Banner 1: Banner present--] WRONG! YAGCD LIES! - // 0 [--Banner Color 0: RGB5A3 1: CI8--] WRONG! YAGCD LIES! - // bits 0 and 1: image format - // 00 no banner - // 01 CI8 banner - // 10 RGB5A3 banner - // 11 ? maybe ==00? Time Splitters 2 and 3 have it and don't have banner - // - u8 Filename[DENTRY_STRLEN]; //0x08 0x20 filename - u8 ModTime[4]; //0x28 0x04 Time of file's last modification in seconds since 12am, January 1st, 2000 - u8 ImageOffset[4]; //0x2c 0x04 image data offset - u8 IconFmt[2]; //0x30 0x02 icon gfx format (2bits per icon) - // bits Description - // 00 no icon - // 01 CI8 with a shared color palette after the last frame - // 10 RGB5A3 - // 11 CI8 with a unique color palette after itself - // - u8 AnimSpeed[2]; //0x32 0x02 animation speed (2bits per icon) (*1) - // bits Description - // 00 no icon - // 01 Icon lasts for 4 frames - // 10 Icon lasts for 8 frames - // 11 Icon lasts for 12 frames - // - u8 Permissions; //0x34 0x01 file-permissions - // bit permission Description - // 4 no move File cannot be moved by the IPL - // 3 no copy File cannot be copied by the IPL - // 2 public Can be read by any game - // - u8 CopyCounter; //0x35 0x01 copy counter (*2) - u8 FirstBlock[2]; //0x36 0x02 block no of first block of file (0 == offset 0) - u8 BlockCount[2]; //0x38 0x02 file-length (number of blocks in file) - u8 Unused2[2]; //0x3a 0x02 reserved/unused (always 0xffff, has no effect) - u8 CommentsAddr[4]; //0x3c 0x04 Address of the two comments within the file data (*3) + u8 Gamecode[4]; //0x00 0x04 Gamecode + u8 Makercode[2]; //0x04 0x02 Makercode + u8 Unused1; //0x06 0x01 reserved/unused (always 0xff, has no effect) + u8 BIFlags; //0x07 0x01 banner gfx format and icon animation (Image Key) + // Bit(s) Description + // 2 Icon Animation 0: forward 1: ping-pong + // 1 [--0: No Banner 1: Banner present--] WRONG! YAGCD LIES! + // 0 [--Banner Color 0: RGB5A3 1: CI8--] WRONG! YAGCD LIES! + // bits 0 and 1: image format + // 00 no banner + // 01 CI8 banner + // 10 RGB5A3 banner + // 11 ? maybe ==00? Time Splitters 2 and 3 have it and don't have banner + // + u8 Filename[DENTRY_STRLEN]; //0x08 0x20 Filename + u8 ModTime[4]; //0x28 0x04 Time of file's last modification in seconds since 12am, January 1st, 2000 + u8 ImageOffset[4]; //0x2c 0x04 image data offset + u8 IconFmt[2]; //0x30 0x02 icon gfx format (2bits per icon) + // Bits Description + // 00 No icon + // 01 CI8 with a shared color palette after the last frame + // 10 RGB5A3 + // 11 CI8 with a unique color palette after itself + // + u8 AnimSpeed[2]; //0x32 0x02 Animation speed (2bits per icon) (*1) + // Bits Description + // 00 No icon + // 01 Icon lasts for 4 frames + // 10 Icon lasts for 8 frames + // 11 Icon lasts for 12 frames + // + u8 Permissions; //0x34 0x01 File-permissions + // Bit Permission Description + // 4 no move File cannot be moved by the IPL + // 3 no copy File cannot be copied by the IPL + // 2 public Can be read by any game + // + u8 CopyCounter; //0x35 0x01 Copy counter (*2) + u8 FirstBlock[2]; //0x36 0x02 Block no of first block of file (0 == offset 0) + u8 BlockCount[2]; //0x38 0x02 File-length (number of blocks in file) + u8 Unused2[2]; //0x3a 0x02 Reserved/unused (always 0xffff, has no effect) + u8 CommentsAddr[4]; //0x3c 0x04 Address of the two comments within the file data (*3) }; struct Directory { - DEntry Dir[DIRLEN]; //0x0000 Directory Entries (max 127) + DEntry Dir[DIRLEN]; //0x0000 Directory Entries (max 127) u8 Padding[0x3a]; - u16 UpdateCounter; //0x1ffa 2 update Counter - u16 Checksum; //0x1ffc 2 Additive Checksum - u16 Checksum_Inv; //0x1ffe 2 Inverse Checksum + u16 UpdateCounter; //0x1ffa 2 Update Counter + u16 Checksum; //0x1ffc 2 Additive Checksum + u16 Checksum_Inv; //0x1ffe 2 Inverse Checksum } dir, dir_backup; Directory *CurrentDir, *PreviousDir; struct BlockAlloc { - u16 Checksum; //0x0000 2 Additive Checksum - u16 Checksum_Inv; //0x0002 2 Inverse Checksum - u16 UpdateCounter; //0x0004 2 update Counter - u16 FreeBlocks; //0x0006 2 free Blocks - u16 LastAllocated; //0x0008 2 last allocated Block - u16 Map[BAT_SIZE]; //0x000a 0x1ff8 Map of allocated Blocks + u16 Checksum; //0x0000 2 Additive Checksum + u16 Checksum_Inv; //0x0002 2 Inverse Checksum + u16 UpdateCounter; //0x0004 2 Update Counter + u16 FreeBlocks; //0x0006 2 Free Blocks + u16 LastAllocated; //0x0008 2 Last allocated Block + u16 Map[BAT_SIZE]; //0x000a 0x1ff8 Map of allocated Blocks u16 GetNextBlock(u16 Block) const; u16 NextFreeBlock(u16 StartingBlock=MC_FST_BLOCKS) const; bool ClearBlocks(u16 StartingBlock, u16 Length); diff --git a/Source/Core/Core/HW/Memmap.h b/Source/Core/Core/HW/Memmap.h index 819829c354..f7d07b7d7e 100644 --- a/Source/Core/Core/HW/Memmap.h +++ b/Source/Core/Core/HW/Memmap.h @@ -63,21 +63,21 @@ enum // what will be reported in lowmem, and thus used by emulated software. // Note: Writing to lowmem is done by IPL. If using retail IPL, it will // always be set to 24MB. - REALRAM_SIZE = 0x1800000, - RAM_SIZE = ROUND_UP_POW2(REALRAM_SIZE), - RAM_MASK = RAM_SIZE - 1, - FAKEVMEM_SIZE = 0x2000000, - FAKEVMEM_MASK = FAKEVMEM_SIZE - 1, - L1_CACHE_SIZE = 0x40000, - L1_CACHE_MASK = L1_CACHE_SIZE - 1, - EFB_SIZE = 0x200000, - EFB_MASK = EFB_SIZE - 1, - IO_SIZE = 0x10000, - EXRAM_SIZE = 0x4000000, - EXRAM_MASK = EXRAM_SIZE - 1, + REALRAM_SIZE = 0x1800000, + RAM_SIZE = ROUND_UP_POW2(REALRAM_SIZE), + RAM_MASK = RAM_SIZE - 1, + FAKEVMEM_SIZE = 0x2000000, + FAKEVMEM_MASK = FAKEVMEM_SIZE - 1, + L1_CACHE_SIZE = 0x40000, + L1_CACHE_MASK = L1_CACHE_SIZE - 1, + EFB_SIZE = 0x200000, + EFB_MASK = EFB_SIZE - 1, + IO_SIZE = 0x10000, + EXRAM_SIZE = 0x4000000, + EXRAM_MASK = EXRAM_SIZE - 1, - ADDR_MASK_HW_ACCESS = 0x0c000000, - ADDR_MASK_MEM1 = 0x20000000, + ADDR_MASK_HW_ACCESS = 0x0c000000, + ADDR_MASK_MEM1 = 0x20000000, #ifndef _M_X64 MEMVIEW32_MASK = 0x3FFFFFFF, diff --git a/Source/Core/Core/HW/MemoryInterface.cpp b/Source/Core/Core/HW/MemoryInterface.cpp index 80f451687b..975260f701 100644 --- a/Source/Core/Core/HW/MemoryInterface.cpp +++ b/Source/Core/Core/HW/MemoryInterface.cpp @@ -14,15 +14,15 @@ namespace MemoryInterface // internal hardware addresses enum { - MEM_CHANNEL0_HI = 0x000, - MEM_CHANNEL0_LO = 0x002, - MEM_CHANNEL1_HI = 0x004, - MEM_CHANNEL1_LO = 0x006, - MEM_CHANNEL2_HI = 0x008, - MEM_CHANNEL2_LO = 0x00A, - MEM_CHANNEL3_HI = 0x00C, - MEM_CHANNEL3_LO = 0x00E, - MEM_CHANNEL_CTRL = 0x010 + MEM_CHANNEL0_HI = 0x000, + MEM_CHANNEL0_LO = 0x002, + MEM_CHANNEL1_HI = 0x004, + MEM_CHANNEL1_LO = 0x006, + MEM_CHANNEL2_HI = 0x008, + MEM_CHANNEL2_LO = 0x00A, + MEM_CHANNEL3_HI = 0x00C, + MEM_CHANNEL3_LO = 0x00E, + MEM_CHANNEL_CTRL = 0x010 }; struct MIMemStruct diff --git a/Source/Core/Core/HW/ProcessorInterface.cpp b/Source/Core/Core/HW/ProcessorInterface.cpp index 68b0ce960b..4b8215f0cf 100644 --- a/Source/Core/Core/HW/ProcessorInterface.cpp +++ b/Source/Core/Core/HW/ProcessorInterface.cpp @@ -21,15 +21,15 @@ namespace ProcessorInterface // Internal hardware addresses enum { - PI_INTERRUPT_CAUSE = 0x00, - PI_INTERRUPT_MASK = 0x04, - PI_FIFO_BASE = 0x0C, - PI_FIFO_END = 0x10, - PI_FIFO_WPTR = 0x14, - PI_FIFO_RESET = 0x18, // ??? - GXAbortFrame writes to it - PI_RESET_CODE = 0x24, - PI_FLIPPER_REV = 0x2C, - PI_FLIPPER_UNK = 0x30 // BS1 writes 0x0245248A to it - prolly some bootstrap thing + PI_INTERRUPT_CAUSE = 0x00, + PI_INTERRUPT_MASK = 0x04, + PI_FIFO_BASE = 0x0C, + PI_FIFO_END = 0x10, + PI_FIFO_WPTR = 0x14, + PI_FIFO_RESET = 0x18, // ??? - GXAbortFrame writes to it + PI_RESET_CODE = 0x24, + PI_FLIPPER_REV = 0x2C, + PI_FLIPPER_UNK = 0x30 // BS1 writes 0x0245248A to it - prolly some bootstrap thing }; diff --git a/Source/Core/Core/HW/ProcessorInterface.h b/Source/Core/Core/HW/ProcessorInterface.h index 7feefa2e14..2c0a9d7012 100644 --- a/Source/Core/Core/HW/ProcessorInterface.h +++ b/Source/Core/Core/HW/ProcessorInterface.h @@ -15,12 +15,12 @@ namespace ProcessorInterface enum InterruptCause { - INT_CAUSE_PI = 0x1, // YAGCD says: GP runtime error + INT_CAUSE_PI = 0x1, // YAGCD says: GP runtime error INT_CAUSE_RSW = 0x2, // Reset Switch INT_CAUSE_DI = 0x4, // DVD interrupt INT_CAUSE_SI = 0x8, // Serial interface INT_CAUSE_EXI = 0x10, // Expansion interface - INT_CAUSE_AI = 0x20, // Audio Interface Streaming + INT_CAUSE_AI = 0x20, // Audio Interface Streaming INT_CAUSE_DSP = 0x40, // DSP interface INT_CAUSE_MEMORY = 0x80, // Memory interface INT_CAUSE_VI = 0x100, // Video interface diff --git a/Source/Core/Core/HW/SI.cpp b/Source/Core/Core/HW/SI.cpp index 39e9e216a7..8e087df6a6 100644 --- a/Source/Core/Core/HW/SI.cpp +++ b/Source/Core/Core/HW/SI.cpp @@ -27,30 +27,30 @@ void UpdateInterrupts(); // SI Interrupt Types enum SIInterruptType { - INT_RDSTINT = 0, - INT_TCINT = 1, + INT_RDSTINT = 0, + INT_TCINT = 1, }; static void GenerateSIInterrupt(SIInterruptType _SIInterrupt); // SI Internal Hardware Addresses enum { - SI_CHANNEL_0_OUT = 0x00, - SI_CHANNEL_0_IN_HI = 0x04, - SI_CHANNEL_0_IN_LO = 0x08, - SI_CHANNEL_1_OUT = 0x0C, - SI_CHANNEL_1_IN_HI = 0x10, - SI_CHANNEL_1_IN_LO = 0x14, - SI_CHANNEL_2_OUT = 0x18, - SI_CHANNEL_2_IN_HI = 0x1C, - SI_CHANNEL_2_IN_LO = 0x20, - SI_CHANNEL_3_OUT = 0x24, - SI_CHANNEL_3_IN_HI = 0x28, - SI_CHANNEL_3_IN_LO = 0x2C, - SI_POLL = 0x30, - SI_COM_CSR = 0x34, - SI_STATUS_REG = 0x38, - SI_EXI_CLOCK_COUNT = 0x3C, + SI_CHANNEL_0_OUT = 0x00, + SI_CHANNEL_0_IN_HI = 0x04, + SI_CHANNEL_0_IN_LO = 0x08, + SI_CHANNEL_1_OUT = 0x0C, + SI_CHANNEL_1_IN_HI = 0x10, + SI_CHANNEL_1_IN_LO = 0x14, + SI_CHANNEL_2_OUT = 0x18, + SI_CHANNEL_2_IN_HI = 0x1C, + SI_CHANNEL_2_IN_LO = 0x20, + SI_CHANNEL_3_OUT = 0x24, + SI_CHANNEL_3_IN_HI = 0x28, + SI_CHANNEL_3_IN_LO = 0x2C, + SI_POLL = 0x30, + SI_COM_CSR = 0x34, + SI_STATUS_REG = 0x38, + SI_EXI_CLOCK_COUNT = 0x3C, }; // SI Channel Output @@ -59,10 +59,10 @@ union USIChannelOut u32 Hex; struct { - u32 OUTPUT1 : 8; - u32 OUTPUT0 : 8; - u32 CMD : 8; - u32 : 8; + u32 OUTPUT1 : 8; + u32 OUTPUT0 : 8; + u32 CMD : 8; + u32 : 8; }; }; @@ -72,12 +72,12 @@ union USIChannelIn_Hi u32 Hex; struct { - u32 INPUT3 : 8; - u32 INPUT2 : 8; - u32 INPUT1 : 8; - u32 INPUT0 : 6; - u32 ERRLATCH : 1; // 0: no error 1: Error latched. Check SISR. - u32 ERRSTAT : 1; // 0: no error 1: error on last transfer + u32 INPUT3 : 8; + u32 INPUT2 : 8; + u32 INPUT1 : 8; + u32 INPUT0 : 6; + u32 ERRLATCH : 1; // 0: no error 1: Error latched. Check SISR. + u32 ERRSTAT : 1; // 0: no error 1: error on last transfer }; }; @@ -87,10 +87,10 @@ union USIChannelIn_Lo u32 Hex; struct { - u32 INPUT7 : 8; - u32 INPUT6 : 8; - u32 INPUT5 : 8; - u32 INPUT4 : 8; + u32 INPUT7 : 8; + u32 INPUT6 : 8; + u32 INPUT5 : 8; + u32 INPUT4 : 8; }; }; @@ -109,17 +109,17 @@ union USIPoll u32 Hex; struct { - u32 VBCPY3 : 1; // 1: write to output buffer only on vblank - u32 VBCPY2 : 1; - u32 VBCPY1 : 1; - u32 VBCPY0 : 1; - u32 EN3 : 1; // Enable polling of channel - u32 EN2 : 1; // does not affect communication RAM transfers - u32 EN1 : 1; - u32 EN0 : 1; - u32 Y : 8; // Polls per frame - u32 X : 10; // Polls per X lines. begins at vsync, min 7, max depends on video mode - u32 : 6; + u32 VBCPY3 : 1; // 1: write to output buffer only on vblank + u32 VBCPY2 : 1; + u32 VBCPY1 : 1; + u32 VBCPY0 : 1; + u32 EN3 : 1; // Enable polling of channel + u32 EN2 : 1; // does not affect communication RAM transfers + u32 EN1 : 1; + u32 EN0 : 1; + u32 Y : 8; // Polls per frame + u32 X : 10; // Polls per X lines. begins at vsync, min 7, max depends on video mode + u32 : 6; }; }; @@ -129,22 +129,22 @@ union USIComCSR u32 Hex; struct { - u32 TSTART : 1; // write: start transfer read: transfer status - u32 CHANNEL : 2; // determines which SI channel will be used on the communication interface. - u32 : 3; - u32 CALLBEN : 1; // Callback enable - u32 CMDEN : 1; // Command enable? - u32 INLNGTH : 7; - u32 : 1; - u32 OUTLNGTH : 7; // Communication Channel Output Length in bytes - u32 : 1; - u32 CHANEN : 1; // Channel enable? - u32 CHANNUM : 2; // Channel number? - u32 RDSTINTMSK : 1; // Read Status Interrupt Status Mask - u32 RDSTINT : 1; // Read Status Interrupt Status - u32 COMERR : 1; // Communication Error (set 0) - u32 TCINTMSK : 1; // Transfer Complete Interrupt Mask - u32 TCINT : 1; // Transfer Complete Interrupt + u32 TSTART : 1; // write: start transfer read: transfer status + u32 CHANNEL : 2; // determines which SI channel will be used on the communication interface. + u32 : 3; + u32 CALLBEN : 1; // Callback enable + u32 CMDEN : 1; // Command enable? + u32 INLNGTH : 7; + u32 : 1; + u32 OUTLNGTH : 7; // Communication Channel Output Length in bytes + u32 : 1; + u32 CHANEN : 1; // Channel enable? + u32 CHANNUM : 2; // Channel number? + u32 RDSTINTMSK : 1; // Read Status Interrupt Status Mask + u32 RDSTINT : 1; // Read Status Interrupt Status + u32 COMERR : 1; // Communication Error (set 0) + u32 TCINTMSK : 1; // Transfer Complete Interrupt Mask + u32 TCINT : 1; // Transfer Complete Interrupt }; USIComCSR() {Hex = 0;} USIComCSR(u32 _hex) {Hex = _hex;} @@ -156,35 +156,35 @@ union USIStatusReg u32 Hex; struct { - u32 UNRUN3 : 1; // (RWC) write 1: bit cleared read 1: main proc underrun error - u32 OVRUN3 : 1; // (RWC) write 1: bit cleared read 1: overrun error - u32 COLL3 : 1; // (RWC) write 1: bit cleared read 1: collision error - u32 NOREP3 : 1; // (RWC) write 1: bit cleared read 1: response error - u32 WRST3 : 1; // (R) 1: buffer channel0 not copied - u32 RDST3 : 1; // (R) 1: new Data available - u32 : 2; // 7:6 - u32 UNRUN2 : 1; // (RWC) write 1: bit cleared read 1: main proc underrun error - u32 OVRUN2 : 1; // (RWC) write 1: bit cleared read 1: overrun error - u32 COLL2 : 1; // (RWC) write 1: bit cleared read 1: collision error - u32 NOREP2 : 1; // (RWC) write 1: bit cleared read 1: response error - u32 WRST2 : 1; // (R) 1: buffer channel0 not copied - u32 RDST2 : 1; // (R) 1: new Data available - u32 : 2; // 15:14 - u32 UNRUN1 : 1; // (RWC) write 1: bit cleared read 1: main proc underrun error - u32 OVRUN1 : 1; // (RWC) write 1: bit cleared read 1: overrun error - u32 COLL1 : 1; // (RWC) write 1: bit cleared read 1: collision error - u32 NOREP1 : 1; // (RWC) write 1: bit cleared read 1: response error - u32 WRST1 : 1; // (R) 1: buffer channel0 not copied - u32 RDST1 : 1; // (R) 1: new Data available - u32 : 2; // 23:22 - u32 UNRUN0 : 1; // (RWC) write 1: bit cleared read 1: main proc underrun error - u32 OVRUN0 : 1; // (RWC) write 1: bit cleared read 1: overrun error - u32 COLL0 : 1; // (RWC) write 1: bit cleared read 1: collision error - u32 NOREP0 : 1; // (RWC) write 1: bit cleared read 1: response error - u32 WRST0 : 1; // (R) 1: buffer channel0 not copied - u32 RDST0 : 1; // (R) 1: new Data available - u32 : 1; - u32 WR : 1; // (RW) write 1 start copy, read 0 copy done + u32 UNRUN3 : 1; // (RWC) write 1: bit cleared read 1: main proc underrun error + u32 OVRUN3 : 1; // (RWC) write 1: bit cleared read 1: overrun error + u32 COLL3 : 1; // (RWC) write 1: bit cleared read 1: collision error + u32 NOREP3 : 1; // (RWC) write 1: bit cleared read 1: response error + u32 WRST3 : 1; // (R) 1: buffer channel0 not copied + u32 RDST3 : 1; // (R) 1: new Data available + u32 : 2; // 7:6 + u32 UNRUN2 : 1; // (RWC) write 1: bit cleared read 1: main proc underrun error + u32 OVRUN2 : 1; // (RWC) write 1: bit cleared read 1: overrun error + u32 COLL2 : 1; // (RWC) write 1: bit cleared read 1: collision error + u32 NOREP2 : 1; // (RWC) write 1: bit cleared read 1: response error + u32 WRST2 : 1; // (R) 1: buffer channel0 not copied + u32 RDST2 : 1; // (R) 1: new Data available + u32 : 2; // 15:14 + u32 UNRUN1 : 1; // (RWC) write 1: bit cleared read 1: main proc underrun error + u32 OVRUN1 : 1; // (RWC) write 1: bit cleared read 1: overrun error + u32 COLL1 : 1; // (RWC) write 1: bit cleared read 1: collision error + u32 NOREP1 : 1; // (RWC) write 1: bit cleared read 1: response error + u32 WRST1 : 1; // (R) 1: buffer channel0 not copied + u32 RDST1 : 1; // (R) 1: new Data available + u32 : 2; // 23:22 + u32 UNRUN0 : 1; // (RWC) write 1: bit cleared read 1: main proc underrun error + u32 OVRUN0 : 1; // (RWC) write 1: bit cleared read 1: overrun error + u32 COLL0 : 1; // (RWC) write 1: bit cleared read 1: collision error + u32 NOREP0 : 1; // (RWC) write 1: bit cleared read 1: response error + u32 WRST0 : 1; // (R) 1: buffer channel0 not copied + u32 RDST0 : 1; // (R) 1: new Data available + u32 : 1; + u32 WR : 1; // (RW) write 1 start copy, read 0 copy done }; USIStatusReg() {Hex = 0;} USIStatusReg(u32 _hex) {Hex = _hex;} @@ -196,18 +196,18 @@ union USIEXIClockCount u32 Hex; struct { - u32 LOCK : 1; // 1: prevents CPU from setting EXI clock to 32MHz - u32 : 0; + u32 LOCK : 1; // 1: prevents CPU from setting EXI clock to 32MHz + u32 : 0; }; }; // STATE_TO_SAVE -static SSIChannel g_Channel[MAX_SI_CHANNELS]; -static USIPoll g_Poll; -static USIComCSR g_ComCSR; -static USIStatusReg g_StatusReg; -static USIEXIClockCount g_EXIClockCount; -static u8 g_SIBuffer[128]; +static SSIChannel g_Channel[MAX_SI_CHANNELS]; +static USIPoll g_Poll; +static USIComCSR g_ComCSR; +static USIStatusReg g_StatusReg; +static USIEXIClockCount g_EXIClockCount; +static u8 g_SIBuffer[128]; void DoState(PointerWrap &p) { diff --git a/Source/Core/Core/HW/SI_Device.h b/Source/Core/Core/HW/SI_Device.h index 62614656c7..5faefa8d55 100644 --- a/Source/Core/Core/HW/SI_Device.h +++ b/Source/Core/Core/HW/SI_Device.h @@ -25,17 +25,17 @@ class PointerWrap; // SI Device IDs for emulator use enum TSIDevices { - SI_NONE = SI_ERROR_NO_RESPONSE, - SI_N64_MIC = 0x00010000, - SI_N64_KEYBOARD = 0x00020000, - SI_N64_MOUSE = 0x02000000, - SI_N64_CONTROLLER = 0x05000000, - SI_GBA = 0x00040000, - SI_GC_CONTROLLER = (SI_TYPE_GC | SI_GC_STANDARD), - SI_GC_KEYBOARD = (SI_TYPE_GC | 0x00200000), - SI_GC_STEERING = SI_TYPE_GC, // (shuffle2)I think the "chainsaw" is the same (Or else it's just standard) - SI_DANCEMAT = (SI_TYPE_GC | SI_GC_STANDARD | 0x00000300), - SI_AM_BASEBOARD = 0x10110800 // gets ORd with dipswitch state + SI_NONE = SI_ERROR_NO_RESPONSE, + SI_N64_MIC = 0x00010000, + SI_N64_KEYBOARD = 0x00020000, + SI_N64_MOUSE = 0x02000000, + SI_N64_CONTROLLER = 0x05000000, + SI_GBA = 0x00040000, + SI_GC_CONTROLLER = (SI_TYPE_GC | SI_GC_STANDARD), + SI_GC_KEYBOARD = (SI_TYPE_GC | 0x00200000), + SI_GC_STEERING = SI_TYPE_GC, // (shuffle2)I think the "chainsaw" is the same (Or else it's just standard) + SI_DANCEMAT = (SI_TYPE_GC | SI_GC_STANDARD | 0x00000300), + SI_AM_BASEBOARD = 0x10110800 // gets ORd with dipswitch state }; // For configuration use, since some devices can have the same SI Device ID diff --git a/Source/Core/Core/HW/SI_DeviceAMBaseboard.h b/Source/Core/Core/HW/SI_DeviceAMBaseboard.h index d7b31a5ede..e847568b4d 100644 --- a/Source/Core/Core/HW/SI_DeviceAMBaseboard.h +++ b/Source/Core/Core/HW/SI_DeviceAMBaseboard.h @@ -11,8 +11,8 @@ class CSIDevice_AMBaseboard : public ISIDevice private: enum EBufferCommands { - CMD_RESET = 0x00, - CMD_GCAM = 0x70, + CMD_RESET = 0x00, + CMD_GCAM = 0x70, }; public: diff --git a/Source/Core/Core/HW/SI_DeviceDanceMat.h b/Source/Core/Core/HW/SI_DeviceDanceMat.h index f2dbb2f311..14636c0b4e 100644 --- a/Source/Core/Core/HW/SI_DeviceDanceMat.h +++ b/Source/Core/Core/HW/SI_DeviceDanceMat.h @@ -17,16 +17,16 @@ private: // Commands enum EBufferCommands { - CMD_RESET = 0x00, - CMD_DIRECT = 0x40, - CMD_ORIGIN = 0x41, - CMD_RECALIBRATE = 0x42, + CMD_RESET = 0x00, + CMD_DIRECT = 0x40, + CMD_ORIGIN = 0x41, + CMD_RECALIBRATE = 0x42, }; struct SOrigin { u8 uCommand;// Maybe should be button bits? - u8 unk_1; // ..and this would be the other half + u8 unk_1; // ..and this would be the other half u8 uOriginStickX; u8 uOriginStickY; u8 uSubStickStickX; @@ -49,13 +49,13 @@ private: u32 Hex; struct { - u32 Parameter1 : 8; - u32 Parameter2 : 8; - u32 Command : 8; - u32 : 8; + u32 Parameter1 : 8; + u32 Parameter2 : 8; + u32 Command : 8; + u32 : 8; }; - UCommand() {Hex = 0;} - UCommand(u32 _iValue) {Hex = _iValue;} + UCommand() {Hex = 0;} + UCommand(u32 _iValue) {Hex = _iValue;} }; enum EButtonCombo diff --git a/Source/Core/Core/HW/SI_DeviceGBA.h b/Source/Core/Core/HW/SI_DeviceGBA.h index d2fa333096..2e9a4ae075 100644 --- a/Source/Core/Core/HW/SI_DeviceGBA.h +++ b/Source/Core/Core/HW/SI_DeviceGBA.h @@ -22,10 +22,10 @@ public: private: enum EJoybusCmds { - CMD_RESET = 0xff, - CMD_STATUS = 0x00, - CMD_READ = 0x14, - CMD_WRITE = 0x15 + CMD_RESET = 0xff, + CMD_STATUS = 0x00, + CMD_READ = 0x14, + CMD_WRITE = 0x15 }; sf::SocketTCP client; diff --git a/Source/Core/Core/HW/SI_DeviceGCController.h b/Source/Core/Core/HW/SI_DeviceGCController.h index c0278eebfd..30087ca4ed 100644 --- a/Source/Core/Core/HW/SI_DeviceGCController.h +++ b/Source/Core/Core/HW/SI_DeviceGCController.h @@ -17,16 +17,16 @@ private: // Commands enum EBufferCommands { - CMD_RESET = 0x00, - CMD_DIRECT = 0x40, - CMD_ORIGIN = 0x41, - CMD_RECALIBRATE = 0x42, + CMD_RESET = 0x00, + CMD_DIRECT = 0x40, + CMD_ORIGIN = 0x41, + CMD_RECALIBRATE = 0x42, }; struct SOrigin { u8 uCommand;// Maybe should be button bits? - u8 unk_1; // ..and this would be the other half + u8 unk_1; // ..and this would be the other half u8 uOriginStickX; u8 uOriginStickY; u8 uSubStickStickX; @@ -49,13 +49,13 @@ private: u32 Hex; struct { - u32 Parameter1 : 8; - u32 Parameter2 : 8; - u32 Command : 8; - u32 : 8; + u32 Parameter1 : 8; + u32 Parameter2 : 8; + u32 Command : 8; + u32 : 8; }; - UCommand() {Hex = 0;} - UCommand(u32 _iValue) {Hex = _iValue;} + UCommand() {Hex = 0;} + UCommand(u32 _iValue) {Hex = _iValue;} }; enum EButtonCombo diff --git a/Source/Core/Core/HW/SI_DeviceGCSteeringWheel.h b/Source/Core/Core/HW/SI_DeviceGCSteeringWheel.h index 050a1220ce..8bf9f4fe70 100644 --- a/Source/Core/Core/HW/SI_DeviceGCSteeringWheel.h +++ b/Source/Core/Core/HW/SI_DeviceGCSteeringWheel.h @@ -17,16 +17,16 @@ private: // Commands enum EBufferCommands { - CMD_RESET = 0x00, - CMD_ORIGIN = 0x41, - CMD_RECALIBRATE = 0x42, - CMD_MOTOR_OFF = 0xff, + CMD_RESET = 0x00, + CMD_ORIGIN = 0x41, + CMD_RECALIBRATE = 0x42, + CMD_MOTOR_OFF = 0xff, }; struct SOrigin { u8 uCommand;// Maybe should be button bits? - u8 unk_1; // ..and this would be the other half + u8 unk_1; // ..and this would be the other half u8 uOriginStickX; u8 uOriginStickY; u8 uSubStickStickX; @@ -50,13 +50,13 @@ private: u32 Hex; struct { - u32 Parameter1 : 8; - u32 Parameter2 : 8; - u32 Command : 8; - u32 : 8; + u32 Parameter1 : 8; + u32 Parameter2 : 8; + u32 Command : 8; + u32 : 8; }; - UCommand() {Hex = 0;} - UCommand(u32 _iValue) {Hex = _iValue;} + UCommand() {Hex = 0;} + UCommand(u32 _iValue) {Hex = _iValue;} }; enum EButtonCombo diff --git a/Source/Core/Core/HW/Sram.h b/Source/Core/Core/HW/Sram.h index 30d535a5b8..4c9b3d3c05 100644 --- a/Source/Core/Core/HW/Sram.h +++ b/Source/Core/Core/HW/Sram.h @@ -42,25 +42,25 @@ distribution. union SRAM { u8 p_SRAM[64]; - struct { // Stored configuration value from the system SRAM area - u16 checksum; // holds the block checksum. - u16 checksum_inv; // holds the inverse block checksum - u32 ead0; // unknown attribute - u32 ead1; // unknown attribute - u32 counter_bias; // bias value for the realtime clock - s8 display_offsetH; // pixel offset for the VI - u8 ntd; // unknown attribute - u8 lang; // language of system - u8 flags; // device and operations flag + struct { // Stored configuration value from the system SRAM area + u16 checksum; // Holds the block checksum. + u16 checksum_inv; // Holds the inverse block checksum + u32 ead0; // Unknown attribute + u32 ead1; // Unknown attribute + u32 counter_bias; // Bias value for the realtime clock + s8 display_offsetH; // Pixel offset for the VI + u8 ntd; // Unknown attribute + u8 lang; // Language of system + u8 flags; // Device and operations flag - // Stored configuration value from the extended SRAM area - u8 flash_id[2][12]; // flash_id[2][12] 96bit memorycard unlock flash ID - u32 wirelessKbd_id; // Device ID of last connected wireless keyboard - u16 wirelessPad_id[4]; // 16bit device ID of last connected pad. - u8 dvderr_code; // last non-recoverable error from DVD interface - u8 __padding0; // reserved - u8 flashID_chksum[2]; // 8bit checksum of unlock flash ID - u32 __padding1; // padding + // Stored configuration value from the extended SRAM area + u8 flash_id[2][12]; // flash_id[2][12] 96bit memorycard unlock flash ID + u32 wirelessKbd_id; // Device ID of last connected wireless keyboard + u16 wirelessPad_id[4]; // 16-bit device ID of last connected pad. + u8 dvderr_code; // last non-recoverable error from DVD interface + u8 __padding0; // reserved + u8 flashID_chksum[2]; // 8-bit checksum of unlock flash ID + u32 __padding1; // padding }; }; #pragma pack(pop) diff --git a/Source/Core/Core/HW/VideoInterface.h b/Source/Core/Core/HW/VideoInterface.h index aaaedf5209..6ea32d265a 100644 --- a/Source/Core/Core/HW/VideoInterface.h +++ b/Source/Core/Core/HW/VideoInterface.h @@ -35,66 +35,66 @@ namespace VideoInterface // VI Internal Hardware Addresses enum { - VI_VERTICAL_TIMING = 0x00, - VI_CONTROL_REGISTER = 0x02, - VI_HORIZONTAL_TIMING_0_HI = 0x04, - VI_HORIZONTAL_TIMING_0_LO = 0x06, - VI_HORIZONTAL_TIMING_1_HI = 0x08, - VI_HORIZONTAL_TIMING_1_LO = 0x0a, - VI_VBLANK_TIMING_ODD_HI = 0x0c, - VI_VBLANK_TIMING_ODD_LO = 0x0e, - VI_VBLANK_TIMING_EVEN_HI = 0x10, - VI_VBLANK_TIMING_EVEN_LO = 0x12, - VI_BURST_BLANKING_ODD_HI = 0x14, - VI_BURST_BLANKING_ODD_LO = 0x16, - VI_BURST_BLANKING_EVEN_HI = 0x18, - VI_BURST_BLANKING_EVEN_LO = 0x1a, - VI_FB_LEFT_TOP_HI = 0x1c, // FB_LEFT_TOP is first half of XFB info - VI_FB_LEFT_TOP_LO = 0x1e, - VI_FB_RIGHT_TOP_HI = 0x20, // FB_RIGHT_TOP is only used in 3D mode - VI_FB_RIGHT_TOP_LO = 0x22, - VI_FB_LEFT_BOTTOM_HI = 0x24, // FB_LEFT_BOTTOM is second half of XFB info - VI_FB_LEFT_BOTTOM_LO = 0x26, - VI_FB_RIGHT_BOTTOM_HI = 0x28, // FB_RIGHT_BOTTOM is only used in 3D mode - VI_FB_RIGHT_BOTTOM_LO = 0x2a, - VI_VERTICAL_BEAM_POSITION = 0x2c, - VI_HORIZONTAL_BEAM_POSITION = 0x2e, - VI_PRERETRACE_HI = 0x30, - VI_PRERETRACE_LO = 0x32, - VI_POSTRETRACE_HI = 0x34, - VI_POSTRETRACE_LO = 0x36, - VI_DISPLAY_INTERRUPT_2_HI = 0x38, - VI_DISPLAY_INTERRUPT_2_LO = 0x3a, - VI_DISPLAY_INTERRUPT_3_HI = 0x3c, - VI_DISPLAY_INTERRUPT_3_LO = 0x3e, - VI_DISPLAY_LATCH_0_HI = 0x40, - VI_DISPLAY_LATCH_0_LO = 0x42, - VI_DISPLAY_LATCH_1_HI = 0x44, - VI_DISPLAY_LATCH_1_LO = 0x46, - VI_HSCALEW = 0x48, - VI_HSCALER = 0x4a, - VI_FILTER_COEF_0_HI = 0x4c, - VI_FILTER_COEF_0_LO = 0x4e, - VI_FILTER_COEF_1_HI = 0x50, - VI_FILTER_COEF_1_LO = 0x52, - VI_FILTER_COEF_2_HI = 0x54, - VI_FILTER_COEF_2_LO = 0x56, - VI_FILTER_COEF_3_HI = 0x58, - VI_FILTER_COEF_3_LO = 0x5a, - VI_FILTER_COEF_4_HI = 0x5c, - VI_FILTER_COEF_4_LO = 0x5e, - VI_FILTER_COEF_5_HI = 0x60, - VI_FILTER_COEF_5_LO = 0x62, - VI_FILTER_COEF_6_HI = 0x64, - VI_FILTER_COEF_6_LO = 0x66, - VI_UNK_AA_REG_HI = 0x68, - VI_UNK_AA_REG_LO = 0x6a, - VI_CLOCK = 0x6c, - VI_DTV_STATUS = 0x6e, - VI_FBWIDTH = 0x70, - VI_BORDER_BLANK_END = 0x72, // Only used in debug video mode - VI_BORDER_BLANK_START = 0x74, // Only used in debug video mode - //VI_INTERLACE = 0x850, // ??? MYSTERY OLD CODE + VI_VERTICAL_TIMING = 0x00, + VI_CONTROL_REGISTER = 0x02, + VI_HORIZONTAL_TIMING_0_HI = 0x04, + VI_HORIZONTAL_TIMING_0_LO = 0x06, + VI_HORIZONTAL_TIMING_1_HI = 0x08, + VI_HORIZONTAL_TIMING_1_LO = 0x0a, + VI_VBLANK_TIMING_ODD_HI = 0x0c, + VI_VBLANK_TIMING_ODD_LO = 0x0e, + VI_VBLANK_TIMING_EVEN_HI = 0x10, + VI_VBLANK_TIMING_EVEN_LO = 0x12, + VI_BURST_BLANKING_ODD_HI = 0x14, + VI_BURST_BLANKING_ODD_LO = 0x16, + VI_BURST_BLANKING_EVEN_HI = 0x18, + VI_BURST_BLANKING_EVEN_LO = 0x1a, + VI_FB_LEFT_TOP_HI = 0x1c, // FB_LEFT_TOP is first half of XFB info + VI_FB_LEFT_TOP_LO = 0x1e, + VI_FB_RIGHT_TOP_HI = 0x20, // FB_RIGHT_TOP is only used in 3D mode + VI_FB_RIGHT_TOP_LO = 0x22, + VI_FB_LEFT_BOTTOM_HI = 0x24, // FB_LEFT_BOTTOM is second half of XFB info + VI_FB_LEFT_BOTTOM_LO = 0x26, + VI_FB_RIGHT_BOTTOM_HI = 0x28, // FB_RIGHT_BOTTOM is only used in 3D mode + VI_FB_RIGHT_BOTTOM_LO = 0x2a, + VI_VERTICAL_BEAM_POSITION = 0x2c, + VI_HORIZONTAL_BEAM_POSITION = 0x2e, + VI_PRERETRACE_HI = 0x30, + VI_PRERETRACE_LO = 0x32, + VI_POSTRETRACE_HI = 0x34, + VI_POSTRETRACE_LO = 0x36, + VI_DISPLAY_INTERRUPT_2_HI = 0x38, + VI_DISPLAY_INTERRUPT_2_LO = 0x3a, + VI_DISPLAY_INTERRUPT_3_HI = 0x3c, + VI_DISPLAY_INTERRUPT_3_LO = 0x3e, + VI_DISPLAY_LATCH_0_HI = 0x40, + VI_DISPLAY_LATCH_0_LO = 0x42, + VI_DISPLAY_LATCH_1_HI = 0x44, + VI_DISPLAY_LATCH_1_LO = 0x46, + VI_HSCALEW = 0x48, + VI_HSCALER = 0x4a, + VI_FILTER_COEF_0_HI = 0x4c, + VI_FILTER_COEF_0_LO = 0x4e, + VI_FILTER_COEF_1_HI = 0x50, + VI_FILTER_COEF_1_LO = 0x52, + VI_FILTER_COEF_2_HI = 0x54, + VI_FILTER_COEF_2_LO = 0x56, + VI_FILTER_COEF_3_HI = 0x58, + VI_FILTER_COEF_3_LO = 0x5a, + VI_FILTER_COEF_4_HI = 0x5c, + VI_FILTER_COEF_4_LO = 0x5e, + VI_FILTER_COEF_5_HI = 0x60, + VI_FILTER_COEF_5_LO = 0x62, + VI_FILTER_COEF_6_HI = 0x64, + VI_FILTER_COEF_6_LO = 0x66, + VI_UNK_AA_REG_HI = 0x68, + VI_UNK_AA_REG_LO = 0x6a, + VI_CLOCK = 0x6c, + VI_DTV_STATUS = 0x6e, + VI_FBWIDTH = 0x70, + VI_BORDER_BLANK_END = 0x72, // Only used in debug video mode + VI_BORDER_BLANK_START = 0x74, // Only used in debug video mode + //VI_INTERLACE = 0x850, // ??? MYSTERY OLD CODE }; union UVIVerticalTimingRegister @@ -102,9 +102,9 @@ union UVIVerticalTimingRegister u16 Hex; struct { - u16 EQU : 4; // Equalization pulse in half lines - u16 ACV : 10; // Active video in lines per field (seems always zero) - u16 : 2; + u16 EQU : 4; // Equalization pulse in half lines + u16 ACV : 10; // Active video in lines per field (seems always zero) + u16 : 2; }; UVIVerticalTimingRegister(u16 _hex) { Hex = _hex;} UVIVerticalTimingRegister() { Hex = 0;} @@ -115,14 +115,14 @@ union UVIDisplayControlRegister u16 Hex; struct { - u16 ENB : 1; // Enables video timing generation and data request - u16 RST : 1; // Clears all data requests and puts VI into its idle state - u16 NIN : 1; // 0: Interlaced, 1: Non-Interlaced: top field drawn at field rate and bottom field is not displayed - u16 DLR : 1; // Selects 3D Display Mode - u16 LE0 : 2; // Display Latch; 0: Off, 1: On for 1 field, 2: On for 2 fields, 3: Always on - u16 LE1 : 2; - u16 FMT : 2; // 0: NTSC, 1: PAL, 2: MPAL, 3: Debug - u16 : 6; + u16 ENB : 1; // Enables video timing generation and data request + u16 RST : 1; // Clears all data requests and puts VI into its idle state + u16 NIN : 1; // 0: Interlaced, 1: Non-Interlaced: top field drawn at field rate and bottom field is not displayed + u16 DLR : 1; // Selects 3D Display Mode + u16 LE0 : 2; // Display Latch; 0: Off, 1: On for 1 field, 2: On for 2 fields, 3: Always on + u16 LE1 : 2; + u16 FMT : 2; // 0: NTSC, 1: PAL, 2: MPAL, 3: Debug + u16 : 6; }; UVIDisplayControlRegister(u16 _hex) { Hex = _hex;} UVIDisplayControlRegister() { Hex = 0;} @@ -134,12 +134,12 @@ union UVIHorizontalTiming0 struct { u16 Lo, Hi; }; struct { - u32 HLW : 9; // Halfline Width (W*16 = Width (720)) - u32 : 7; - u32 HCE : 7; // Horizontal Sync Start to Color Burst End - u32 : 1; - u32 HCS : 7; // Horizontal Sync Start to Color Burst Start - u32 : 1; + u32 HLW : 9; // Halfline Width (W*16 = Width (720)) + u32 : 7; + u32 HCE : 7; // Horizontal Sync Start to Color Burst End + u32 : 1; + u32 HCS : 7; // Horizontal Sync Start to Color Burst Start + u32 : 1; }; }; @@ -149,11 +149,11 @@ union UVIHorizontalTiming1 struct { u16 Lo, Hi; }; struct { - u32 HSY : 7; // Horizontal Sync Width - u32 HBE640 : 9; // Horizontal Sync Start to horizontal blank end - u32 : 1; - u32 HBS640 : 9; // Half line to horizontal blanking start - u32 : 6; + u32 HSY : 7; // Horizontal Sync Width + u32 HBE640 : 9; // Horizontal Sync Start to horizontal blank end + u32 : 1; + u32 HBS640 : 9; // Half line to horizontal blanking start + u32 : 6; }; }; @@ -164,10 +164,10 @@ union UVIVBlankTimingRegister struct { u16 Lo, Hi; }; struct { - u32 PRB : 10; // Pre-blanking in half lines - u32 : 6; - u32 PSB : 10; // Post blanking in half lines - u32 : 6; + u32 PRB : 10; // Pre-blanking in half lines + u32 : 6; + u32 PSB : 10; // Post blanking in half lines + u32 : 6; }; }; @@ -178,10 +178,10 @@ union UVIBurstBlankingRegister struct { u16 Lo, Hi; }; struct { - u32 BS0 : 5; // Field x start to burst blanking start in halflines - u32 BE0 : 11; // Field x start to burst blanking end in halflines - u32 BS2 : 5; // Field x+2 start to burst blanking start in halflines - u32 BE2 : 11; // Field x+2 start to burst blanking end in halflines + u32 BS0 : 5; // Field x start to burst blanking start in halflines + u32 BE0 : 11; // Field x start to burst blanking end in halflines + u32 BS2 : 5; // Field x+2 start to burst blanking start in halflines + u32 BE2 : 11; // Field x+2 start to burst blanking end in halflines }; }; @@ -192,11 +192,11 @@ union UVIFBInfoRegister struct { // TODO: mask out lower 9bits/align to 9bits??? - u32 FBB : 24; // Base address of the framebuffer in external mem + u32 FBB : 24; // Base address of the framebuffer in external mem // POFF only seems to exist in the top reg. XOFF, unknown. - u32 XOFF : 4; // Horizontal Offset of the left-most pixel within the first word of the fetched picture - u32 POFF : 1; // Page offest: 1: fb address is (address>>5) - u32 CLRPOFF : 3; // ? setting bit 31 clears POFF + u32 XOFF : 4; // Horizontal Offset of the left-most pixel within the first word of the fetched picture + u32 POFF : 1; // Page offest: 1: fb address is (address>>5) + u32 CLRPOFF : 3; // ? setting bit 31 clears POFF }; }; @@ -207,13 +207,13 @@ union UVIInterruptRegister struct { u16 Lo, Hi; }; struct { - u32 HCT : 11; // Horizontal Position - u32 : 5; - u32 VCT : 11; // Vertical Position - u32 : 1; - u32 IR_MASK : 1; // Interrupt Mask Bit - u32 : 2; - u32 IR_INT : 1; // Interrupt Status (1=Active, 0=Clear) + u32 HCT : 11; // Horizontal Position + u32 : 5; + u32 VCT : 11; // Vertical Position + u32 : 1; + u32 IR_MASK : 1; // Interrupt Mask Bit + u32 : 2; + u32 IR_INT : 1; // Interrupt Status (1=Active, 0=Clear) }; }; @@ -223,11 +223,11 @@ union UVILatchRegister struct { u16 Lo, Hi; }; struct { - u32 HCT : 11; // Horizontal Count - u32 : 5; - u32 VCT : 11; // Vertical Count - u32 : 4; - u32 TRG : 1; // Trigger Flag + u32 HCT : 11; // Horizontal Count + u32 : 5; + u32 VCT : 11; // Vertical Count + u32 : 4; + u32 TRG : 1; // Trigger Flag }; }; @@ -236,8 +236,8 @@ union UVIHorizontalStepping u16 Hex; struct { - u16 FbSteps : 8; - u16 FieldSteps : 8; + u16 FbSteps : 8; + u16 FieldSteps : 8; }; }; @@ -246,10 +246,10 @@ union UVIHorizontalScaling u16 Hex; struct { - u16 STP : 9; // Horizontal stepping size (U1.8 Scaler Value) (0x160 Works for 320) - u16 : 3; - u16 HS_EN : 1; // Enable Horizontal Scaling - u16 : 3; + u16 STP : 9; // Horizontal stepping size (U1.8 Scaler Value) (0x160 Works for 320) + u16 : 3; + u16 HS_EN : 1; // Enable Horizontal Scaling + u16 : 3; }; UVIHorizontalScaling(u16 _hex) { Hex = _hex;} UVIHorizontalScaling() { Hex = 0;} @@ -262,10 +262,10 @@ union UVIFilterCoefTable3 struct { u16 Lo, Hi; }; struct { - u32 Tap0 : 10; - u32 Tap1 : 10; - u32 Tap2 : 10; - u32 : 2; + u32 Tap0 : 10; + u32 Tap1 : 10; + u32 Tap2 : 10; + u32 : 2; }; }; @@ -276,10 +276,10 @@ union UVIFilterCoefTable4 struct { u16 Lo, Hi; }; struct { - u32 Tap0 : 8; - u32 Tap1 : 8; - u32 Tap2 : 8; - u32 Tap3 : 8; + u32 Tap0 : 8; + u32 Tap1 : 8; + u32 Tap2 : 8; + u32 Tap3 : 8; }; }; @@ -296,10 +296,10 @@ union UVIBorderBlankRegister struct { u16 Lo, Hi; }; struct { - u32 HBE656 : 10; // Border Horizontal Blank End - u32 : 11; - u32 HBS656 : 10; // Border Horizontal Blank start - u32 BRDR_EN : 1; // Border Enable + u32 HBE656 : 10; // Border Horizontal Blank End + u32 : 11; + u32 HBS656 : 10; // Border Horizontal Blank start + u32 BRDR_EN : 1; // Border Enable }; }; @@ -309,9 +309,9 @@ union UVIDTVStatus u16 Hex; struct { - u16 component_plugged : 1; - u16 ntsc_j : 1; - u16 :14; + u16 component_plugged : 1; + u16 ntsc_j : 1; + u16 :14; }; }; diff --git a/Source/Core/Core/HW/WII_IPC.cpp b/Source/Core/Core/HW/WII_IPC.cpp index d4535d1578..912bb8a61d 100644 --- a/Source/Core/Core/HW/WII_IPC.cpp +++ b/Source/Core/Core/HW/WII_IPC.cpp @@ -32,29 +32,29 @@ namespace WII_IPCInterface enum { - IPC_PPCMSG = 0x00, - IPC_PPCCTRL = 0x04, - IPC_ARMMSG = 0x08, - IPC_ARMCTRL = 0x0c, + IPC_PPCMSG = 0x00, + IPC_PPCCTRL = 0x04, + IPC_ARMMSG = 0x08, + IPC_ARMCTRL = 0x0c, - PPC_IRQFLAG = 0x30, - PPC_IRQMASK = 0x34, - ARM_IRQFLAG = 0x38, - ARM_IRQMASK = 0x3c, + PPC_IRQFLAG = 0x30, + PPC_IRQMASK = 0x34, + ARM_IRQFLAG = 0x38, + ARM_IRQMASK = 0x3c, - GPIOB_OUT = 0xc0 // sensor bar power flag?? + GPIOB_OUT = 0xc0 // sensor bar power flag?? }; struct CtrlRegister { - u8 X1 : 1; - u8 X2 : 1; - u8 Y1 : 1; - u8 Y2 : 1; - u8 IX1 : 1; - u8 IX2 : 1; - u8 IY1 : 1; - u8 IY2 : 1; + u8 X1 : 1; + u8 X2 : 1; + u8 Y1 : 1; + u8 Y2 : 1; + u8 IX1 : 1; + u8 IX2 : 1; + u8 IY1 : 1; + u8 IY2 : 1; CtrlRegister() { X1 = X2 = Y1 = Y2 = IX1 = IX2 = IY1 = IY2 = 0; } diff --git a/Source/Core/Core/HW/WII_IPC.h b/Source/Core/Core/HW/WII_IPC.h index 3e5ec1c88d..4cc6c369b9 100644 --- a/Source/Core/Core/HW/WII_IPC.h +++ b/Source/Core/Core/HW/WII_IPC.h @@ -13,23 +13,23 @@ namespace WII_IPCInterface enum StarletInterruptCause { - INT_CAUSE_TIMER = 0x1, - INT_CAUSE_NAND = 0x2, - INT_CAUSE_AES = 0x4, - INT_CAUSE_SHA1 = 0x8, - INT_CAUSE_EHCI = 0x10, - INT_CAUSE_OHCI0 = 0x20, - INT_CAUSE_OHCI1 = 0x40, - INT_CAUSE_SD = 0x80, - INT_CAUSE_WIFI = 0x100, + INT_CAUSE_TIMER = 0x1, + INT_CAUSE_NAND = 0x2, + INT_CAUSE_AES = 0x4, + INT_CAUSE_SHA1 = 0x8, + INT_CAUSE_EHCI = 0x10, + INT_CAUSE_OHCI0 = 0x20, + INT_CAUSE_OHCI1 = 0x40, + INT_CAUSE_SD = 0x80, + INT_CAUSE_WIFI = 0x100, - INT_CAUSE_GPIO_BROADWAY = 0x400, - INT_CAUSE_GPIO_STARLET = 0x800, + INT_CAUSE_GPIO_BROADWAY = 0x400, + INT_CAUSE_GPIO_STARLET = 0x800, - INT_CAUSE_RST_BUTTON = 0x40000, + INT_CAUSE_RST_BUTTON = 0x40000, - INT_CAUSE_IPC_BROADWAY = 0x40000000, - INT_CAUSE_IPC_STARLET = 0x80000000 + INT_CAUSE_IPC_BROADWAY = 0x40000000, + INT_CAUSE_IPC_STARLET = 0x80000000 }; void Init(); diff --git a/Source/Core/Core/HW/WiimoteEmu/WiimoteHid.h b/Source/Core/Core/HW/WiimoteEmu/WiimoteHid.h index 751c177f98..11c8d0be66 100644 --- a/Source/Core/Core/HW/WiimoteEmu/WiimoteHid.h +++ b/Source/Core/Core/HW/WiimoteEmu/WiimoteHid.h @@ -382,23 +382,23 @@ struct cc_trigger struct nu_cal { - wm_accel cal_zero; // zero calibration + wm_accel cal_zero; // zero calibration u8 pad1; - wm_accel cal_g; // g size + wm_accel cal_g; // g size u8 pad2; - nu_js jx; // - nu_js jy; // + nu_js jx; + nu_js jy; u8 sum[2]; }; struct cc_cal { - nu_js Lx; // - nu_js Ly; // - nu_js Rx; // - nu_js Ry; // - cc_trigger Tl; // - cc_trigger Tr; // + nu_js Lx; + nu_js Ly; + nu_js Rx; + nu_js Ry; + cc_trigger Tl; + cc_trigger Tr; }; struct gh3_cal diff --git a/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device.h b/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device.h index 49249a2053..708063255b 100644 --- a/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device.h +++ b/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device.h @@ -11,30 +11,30 @@ #include "ChunkFile.h" -#define FS_SUCCESS (u32)0 // Success -#define FS_EACCES (u32)-1 // Permission denied -#define FS_EEXIST (u32)-2 // File exists -#define FS_EINVAL (u32)-4 // Invalid argument Invalid FD -#define FS_ENOENT (u32)-6 // File not found -#define FS_EBUSY (u32)-8 // Resource busy -#define FS_EIO (u32)-12 // Returned on ECC error -#define FS_ENOMEM (u32)-22 // Alloc failed during request -#define FS_EFATAL (u32)-101 // Fatal error -#define FS_EACCESS (u32)-102 // Permission denied -#define FS_ECORRUPT (u32)-103 // returned for "corrupted" NAND -#define FS_EEXIST2 (u32)-105 // File exists -#define FS_ENOENT2 (u32)-106 // File not found -#define FS_ENFILE (u32)-107 // Too many fds open -#define FS_EFBIG (u32)-108 // Max block count reached? -#define FS_EFDEXHAUSTED (u32)-109 // Too many fds open -#define FS_ENAMELEN (u32)-110 // Pathname is too long -#define FS_EFDOPEN (u32)-111 // FD is already open -#define FS_EIO2 (u32)-114 // Returned on ECC error -#define FS_ENOTEMPTY (u32)-115 // Directory not empty -#define FS_EDIRDEPTH (u32)-116 // Max directory depth exceeded -#define FS_EBUSY2 (u32)-118 // Resource busy -//#define FS_EFATAL (u32)-119 // Fatal error not used by IOS as fatal ERROR -#define FS_EESEXHAUSTED (u32)-1016 // Max of 2 ES handles at a time +#define FS_SUCCESS (u32)0 // Success +#define FS_EACCES (u32)-1 // Permission denied +#define FS_EEXIST (u32)-2 // File exists +#define FS_EINVAL (u32)-4 // Invalid argument Invalid FD +#define FS_ENOENT (u32)-6 // File not found +#define FS_EBUSY (u32)-8 // Resource busy +#define FS_EIO (u32)-12 // Returned on ECC error +#define FS_ENOMEM (u32)-22 // Alloc failed during request +#define FS_EFATAL (u32)-101 // Fatal error +#define FS_EACCESS (u32)-102 // Permission denied +#define FS_ECORRUPT (u32)-103 // returned for "corrupted" NAND +#define FS_EEXIST2 (u32)-105 // File exists +#define FS_ENOENT2 (u32)-106 // File not found +#define FS_ENFILE (u32)-107 // Too many fds open +#define FS_EFBIG (u32)-108 // Max block count reached? +#define FS_EFDEXHAUSTED (u32)-109 // Too many fds open +#define FS_ENAMELEN (u32)-110 // Pathname is too long +#define FS_EFDOPEN (u32)-111 // FD is already open +#define FS_EIO2 (u32)-114 // Returned on ECC error +#define FS_ENOTEMPTY (u32)-115 // Directory not empty +#define FS_EDIRDEPTH (u32)-116 // Max directory depth exceeded +#define FS_EBUSY2 (u32)-118 // Resource busy +//#define FS_EFATAL (u32)-119 // Fatal error not used by IOS as fatal ERROR +#define FS_EESEXHAUSTED (u32)-1016 // Max of 2 ES handles at a time // A struct for IOS ioctlv calls struct SIOCtlVBuffer @@ -44,10 +44,10 @@ struct SIOCtlVBuffer // These are the Ioctlv parameters in the IOS communication. The BufferVector // is a memory address offset at where the in and out buffer addresses are // stored. - Parameter = Memory::Read_U32(m_Address + 0x0C); // command 3, arg0 - NumberInBuffer = Memory::Read_U32(m_Address + 0x10); // 4, arg1 - NumberPayloadBuffer = Memory::Read_U32(m_Address + 0x14); // 5, arg2 - BufferVector = Memory::Read_U32(m_Address + 0x18); // 6, arg3 + Parameter = Memory::Read_U32(m_Address + 0x0C); // command 3, arg0 + NumberInBuffer = Memory::Read_U32(m_Address + 0x10); // 4, arg1 + NumberPayloadBuffer = Memory::Read_U32(m_Address + 0x14); // 5, arg2 + BufferVector = Memory::Read_U32(m_Address + 0x18); // 6, arg3 // The start of the out buffer u32 BufferVectorOffset = BufferVector; @@ -56,9 +56,9 @@ struct SIOCtlVBuffer for (u32 i = 0; i < NumberInBuffer; i++) { SBuffer Buffer; - Buffer.m_Address = Memory::Read_U32(BufferVectorOffset); + Buffer.m_Address = Memory::Read_U32(BufferVectorOffset); BufferVectorOffset += 4; - Buffer.m_Size = Memory::Read_U32(BufferVectorOffset); + Buffer.m_Size = Memory::Read_U32(BufferVectorOffset); BufferVectorOffset += 4; InBuffer.push_back(Buffer); DEBUG_LOG(WII_IPC_HLE, "SIOCtlVBuffer in%i: 0x%08x, 0x%x", @@ -69,9 +69,9 @@ struct SIOCtlVBuffer for (u32 i = 0; i < NumberPayloadBuffer; i++) { SBuffer Buffer; - Buffer.m_Address = Memory::Read_U32(BufferVectorOffset); + Buffer.m_Address = Memory::Read_U32(BufferVectorOffset); BufferVectorOffset += 4; - Buffer.m_Size = Memory::Read_U32(BufferVectorOffset); + Buffer.m_Size = Memory::Read_U32(BufferVectorOffset); BufferVectorOffset += 4; PayloadBuffer.push_back(Buffer); DEBUG_LOG(WII_IPC_HLE, "SIOCtlVBuffer io%i: 0x%08x, 0x%x", @@ -137,11 +137,11 @@ public: } #define UNIMPLEMENTED_CMD(cmd) WARN_LOG(WII_IPC_HLE, "%s does not support "#cmd"()", m_Name.c_str()); return true; - virtual bool Seek (u32) { UNIMPLEMENTED_CMD(Seek) } - virtual bool Read (u32) { UNIMPLEMENTED_CMD(Read) } - virtual bool Write (u32) { UNIMPLEMENTED_CMD(Write) } - virtual bool IOCtl (u32) { UNIMPLEMENTED_CMD(IOCtl) } - virtual bool IOCtlV (u32) { UNIMPLEMENTED_CMD(IOCtlV) } + virtual bool Seek (u32) { UNIMPLEMENTED_CMD(Seek) } + virtual bool Read (u32) { UNIMPLEMENTED_CMD(Read) } + virtual bool Write (u32) { UNIMPLEMENTED_CMD(Write) } + virtual bool IOCtl (u32) { UNIMPLEMENTED_CMD(IOCtl) } + virtual bool IOCtlV (u32) { UNIMPLEMENTED_CMD(IOCtlV) } #undef UNIMPLEMENTED_CMD virtual int GetCmdDelay(u32) { return 0; } diff --git a/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_FileIO.h b/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_FileIO.h index 65dd0ce50c..df059208c6 100644 --- a/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_FileIO.h +++ b/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_FileIO.h @@ -31,35 +31,35 @@ public: private: enum { - ISFS_OPEN_READ = 1, - ISFS_OPEN_WRITE, - ISFS_OPEN_RW = (ISFS_OPEN_READ | ISFS_OPEN_WRITE) + ISFS_OPEN_READ = 1, + ISFS_OPEN_WRITE = 2, + ISFS_OPEN_RW = (ISFS_OPEN_READ | ISFS_OPEN_WRITE) }; enum { - ISFS_FUNCNULL = 0, - ISFS_FUNCGETSTAT, - ISFS_FUNCREADDIR, - ISFS_FUNCGETATTR, - ISFS_FUNCGETUSAGE + ISFS_FUNCNULL = 0, + ISFS_FUNCGETSTAT = 1, + ISFS_FUNCREADDIR = 2, + ISFS_FUNCGETATTR = 3, + ISFS_FUNCGETUSAGE = 4 }; enum { - ISFS_IOCTL_FORMAT = 1, - ISFS_IOCTL_GETSTATS, - ISFS_IOCTL_CREATEDIR, - ISFS_IOCTL_READDIR, - ISFS_IOCTL_SETATTR, - ISFS_IOCTL_GETATTR, - ISFS_IOCTL_DELETE, - ISFS_IOCTL_RENAME, - ISFS_IOCTL_CREATEFILE, - ISFS_IOCTL_SETFILEVERCTRL, - ISFS_IOCTL_GETFILESTATS, - ISFS_IOCTL_GETUSAGE, - ISFS_IOCTL_SHUTDOWN + ISFS_IOCTL_FORMAT = 1, + ISFS_IOCTL_GETSTATS = 2, + ISFS_IOCTL_CREATEDIR = 3, + ISFS_IOCTL_READDIR = 4, + ISFS_IOCTL_SETATTR = 5, + ISFS_IOCTL_GETATTR = 6, + ISFS_IOCTL_DELETE = 7, + ISFS_IOCTL_RENAME = 8, + ISFS_IOCTL_CREATEFILE = 9, + ISFS_IOCTL_SETFILEVERCTRL = 10, + ISFS_IOCTL_GETFILESTATS = 11, + ISFS_IOCTL_GETUSAGE = 12, + ISFS_IOCTL_SHUTDOWN = 13 }; u32 m_Mode; diff --git a/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_es.h b/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_es.h index 5dd4bd1ceb..63b4fac225 100644 --- a/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_es.h +++ b/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_es.h @@ -37,64 +37,64 @@ public: private: enum { - IOCTL_ES_ADDTICKET = 0x01, - IOCTL_ES_ADDTITLESTART = 0x02, - IOCTL_ES_ADDCONTENTSTART = 0x03, - IOCTL_ES_ADDCONTENTDATA = 0x04, - IOCTL_ES_ADDCONTENTFINISH = 0x05, - IOCTL_ES_ADDTITLEFINISH = 0x06, - IOCTL_ES_GETDEVICEID = 0x07, - IOCTL_ES_LAUNCH = 0x08, - IOCTL_ES_OPENCONTENT = 0x09, - IOCTL_ES_READCONTENT = 0x0A, - IOCTL_ES_CLOSECONTENT = 0x0B, - IOCTL_ES_GETOWNEDTITLECNT = 0x0C, - IOCTL_ES_GETOWNEDTITLES = 0x0D, - IOCTL_ES_GETTITLECNT = 0x0E, - IOCTL_ES_GETTITLES = 0x0F, - IOCTL_ES_GETTITLECONTENTSCNT = 0x10, - IOCTL_ES_GETTITLECONTENTS = 0x11, - IOCTL_ES_GETVIEWCNT = 0x12, - IOCTL_ES_GETVIEWS = 0x13, - IOCTL_ES_GETTMDVIEWCNT = 0x14, - IOCTL_ES_GETTMDVIEWS = 0x15, - IOCTL_ES_GETCONSUMPTION = 0x16, - IOCTL_ES_DELETETITLE = 0x17, - IOCTL_ES_DELETETICKET = 0x18, - // IOCTL_ES_DIGETTMDVIEWSIZE = 0x19, - // IOCTL_ES_DIGETTMDVIEW = 0x1A, - IOCTL_ES_DIGETTICKETVIEW = 0x1B, - IOCTL_ES_DIVERIFY = 0x1C, - IOCTL_ES_GETTITLEDIR = 0x1D, - IOCTL_ES_GETDEVICECERT = 0x1E, - IOCTL_ES_IMPORTBOOT = 0x1F, - IOCTL_ES_GETTITLEID = 0x20, - IOCTL_ES_SETUID = 0x21, - IOCTL_ES_DELETETITLECONTENT = 0x22, - IOCTL_ES_SEEKCONTENT = 0x23, - IOCTL_ES_OPENTITLECONTENT = 0x24, - // IOCTL_ES_LAUNCHBC = 0x25, - // IOCTL_ES_EXPORTTITLEINIT = 0x26, - // IOCTL_ES_EXPORTCONTENTBEGIN = 0x27, - // IOCTL_ES_EXPORTCONTENTDATA = 0x28, - // IOCTL_ES_EXPORTCONTENTEND = 0x29, - // IOCTL_ES_EXPORTTITLEDONE = 0x2A, - IOCTL_ES_ADDTMD = 0x2B, - IOCTL_ES_ENCRYPT = 0x2C, - IOCTL_ES_DECRYPT = 0x2D, - IOCTL_ES_GETBOOT2VERSION = 0x2E, - IOCTL_ES_ADDTITLECANCEL = 0x2F, - IOCTL_ES_SIGN = 0x30, - // IOCTL_ES_VERIFYSIGN = 0x31, - IOCTL_ES_GETSTOREDCONTENTCNT = 0x32, - IOCTL_ES_GETSTOREDCONTENTS = 0x33, - IOCTL_ES_GETSTOREDTMDSIZE = 0x34, - IOCTL_ES_GETSTOREDTMD = 0x35, - IOCTL_ES_GETSHAREDCONTENTCNT = 0x36, - IOCTL_ES_GETSHAREDCONTENTS = 0x37, - IOCTL_ES_DELETESHAREDCONTENT = 0x38, + IOCTL_ES_ADDTICKET = 0x01, + IOCTL_ES_ADDTITLESTART = 0x02, + IOCTL_ES_ADDCONTENTSTART = 0x03, + IOCTL_ES_ADDCONTENTDATA = 0x04, + IOCTL_ES_ADDCONTENTFINISH = 0x05, + IOCTL_ES_ADDTITLEFINISH = 0x06, + IOCTL_ES_GETDEVICEID = 0x07, + IOCTL_ES_LAUNCH = 0x08, + IOCTL_ES_OPENCONTENT = 0x09, + IOCTL_ES_READCONTENT = 0x0A, + IOCTL_ES_CLOSECONTENT = 0x0B, + IOCTL_ES_GETOWNEDTITLECNT = 0x0C, + IOCTL_ES_GETOWNEDTITLES = 0x0D, + IOCTL_ES_GETTITLECNT = 0x0E, + IOCTL_ES_GETTITLES = 0x0F, + IOCTL_ES_GETTITLECONTENTSCNT = 0x10, + IOCTL_ES_GETTITLECONTENTS = 0x11, + IOCTL_ES_GETVIEWCNT = 0x12, + IOCTL_ES_GETVIEWS = 0x13, + IOCTL_ES_GETTMDVIEWCNT = 0x14, + IOCTL_ES_GETTMDVIEWS = 0x15, + IOCTL_ES_GETCONSUMPTION = 0x16, + IOCTL_ES_DELETETITLE = 0x17, + IOCTL_ES_DELETETICKET = 0x18, + // IOCTL_ES_DIGETTMDVIEWSIZE = 0x19, + // IOCTL_ES_DIGETTMDVIEW = 0x1A, + IOCTL_ES_DIGETTICKETVIEW = 0x1B, + IOCTL_ES_DIVERIFY = 0x1C, + IOCTL_ES_GETTITLEDIR = 0x1D, + IOCTL_ES_GETDEVICECERT = 0x1E, + IOCTL_ES_IMPORTBOOT = 0x1F, + IOCTL_ES_GETTITLEID = 0x20, + IOCTL_ES_SETUID = 0x21, + IOCTL_ES_DELETETITLECONTENT = 0x22, + IOCTL_ES_SEEKCONTENT = 0x23, + IOCTL_ES_OPENTITLECONTENT = 0x24, + // IOCTL_ES_LAUNCHBC = 0x25, + // IOCTL_ES_EXPORTTITLEINIT = 0x26, + // IOCTL_ES_EXPORTCONTENTBEGIN = 0x27, + // IOCTL_ES_EXPORTCONTENTDATA = 0x28, + // IOCTL_ES_EXPORTCONTENTEND = 0x29, + // IOCTL_ES_EXPORTTITLEDONE = 0x2A, + IOCTL_ES_ADDTMD = 0x2B, + IOCTL_ES_ENCRYPT = 0x2C, + IOCTL_ES_DECRYPT = 0x2D, + IOCTL_ES_GETBOOT2VERSION = 0x2E, + IOCTL_ES_ADDTITLECANCEL = 0x2F, + IOCTL_ES_SIGN = 0x30, + // IOCTL_ES_VERIFYSIGN = 0x31, + IOCTL_ES_GETSTOREDCONTENTCNT = 0x32, + IOCTL_ES_GETSTOREDCONTENTS = 0x33, + IOCTL_ES_GETSTOREDTMDSIZE = 0x34, + IOCTL_ES_GETSTOREDTMD = 0x35, + IOCTL_ES_GETSHAREDCONTENTCNT = 0x36, + IOCTL_ES_GETSHAREDCONTENTS = 0x37, + IOCTL_ES_DELETESHAREDCONTENT = 0x38, // - IOCTL_ES_CHECKKOREAREGION = 0x45, + IOCTL_ES_CHECKKOREAREGION = 0x45, }; enum EErrorCodes diff --git a/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_fs.h b/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_fs.h index e02b187fee..7604afed8d 100644 --- a/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_fs.h +++ b/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_fs.h @@ -18,15 +18,16 @@ struct NANDStat u32 Used_Inodes; }; -enum { - FS_RESULT_OK = 0, - FS_INVALID = -4, - FS_DIRFILE_NOT_FOUND = -6, - FS_RESULT_FATAL = -101, - FS_NO_ACCESS = -102, - FS_FILE_EXIST = -105, - FS_FILE_NOT_EXIST = -106, - FS_NO_HANDLE = -106, +enum +{ + FS_RESULT_OK = 0, + FS_INVALID = -4, + FS_DIRFILE_NOT_FOUND = -6, + FS_RESULT_FATAL = -101, + FS_NO_ACCESS = -102, + FS_FILE_EXIST = -105, + FS_FILE_NOT_EXIST = -106, + FS_NO_HANDLE = -106, }; class CWII_IPC_HLE_Device_fs : public IWII_IPC_HLE_Device @@ -50,16 +51,16 @@ private: enum { - IOCTL_GET_STATS = 0x02, - IOCTL_CREATE_DIR = 0x03, - IOCTLV_READ_DIR = 0x04, - IOCTL_SET_ATTR = 0x05, - IOCTL_GET_ATTR = 0x06, - IOCTL_DELETE_FILE = 0x07, - IOCTL_RENAME_FILE = 0x08, - IOCTL_CREATE_FILE = 0x09, - IOCTLV_GETUSAGE = 0x0C, - IOCTL_SHUTDOWN = 0x0D + IOCTL_GET_STATS = 0x02, + IOCTL_CREATE_DIR = 0x03, + IOCTLV_READ_DIR = 0x04, + IOCTL_SET_ATTR = 0x05, + IOCTL_GET_ATTR = 0x06, + IOCTL_DELETE_FILE = 0x07, + IOCTL_RENAME_FILE = 0x08, + IOCTL_CREATE_FILE = 0x09, + IOCTLV_GETUSAGE = 0x0C, + IOCTL_SHUTDOWN = 0x0D }; s32 ExecuteCommand(u32 Parameter, u32 _BufferIn, u32 _BufferInSize, u32 _BufferOut, u32 _BufferOutSize); diff --git a/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_hid.h b/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_hid.h index c57e4ee84d..0b4551d530 100644 --- a/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_hid.h +++ b/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_hid.h @@ -50,60 +50,60 @@ private: typedef struct { u8 bLength; - u8 bDescriptorType; + u8 bDescriptorType; u16 bcdUSB; - u8 bDeviceClass; - u8 bDeviceSubClass; - u8 bDeviceProtocol; - u8 bMaxPacketSize0; + u8 bDeviceClass; + u8 bDeviceSubClass; + u8 bDeviceProtocol; + u8 bMaxPacketSize0; u16 idVendor; u16 idProduct; u16 bcdDevice; - u8 iManufacturer; - u8 iProduct; - u8 iSerialNumber; - u8 bNumConfigurations; - u8 pad[2]; + u8 iManufacturer; + u8 iProduct; + u8 iSerialNumber; + u8 bNumConfigurations; + u8 pad[2]; } WiiHIDDeviceDescriptor; typedef struct { - u8 bLength; - u8 bDescriptorType; + u8 bLength; + u8 bDescriptorType; u16 wTotalLength; - u8 bNumInterfaces; - u8 bConfigurationValue; - u8 iConfiguration; - u8 bmAttributes; - u8 MaxPower; - u8 pad[3]; + u8 bNumInterfaces; + u8 bConfigurationValue; + u8 iConfiguration; + u8 bmAttributes; + u8 MaxPower; + u8 pad[3]; } WiiHIDConfigDescriptor; typedef struct { - u8 bLength; - u8 bDescriptorType; - u8 bInterfaceNumber; - u8 bAlternateSetting; - u8 bNumEndpoints; - u8 bInterfaceClass; - u8 bInterfaceSubClass; - u8 bInterfaceProtocol; - u8 iInterface; - u8 pad[3]; + u8 bLength; + u8 bDescriptorType; + u8 bInterfaceNumber; + u8 bAlternateSetting; + u8 bNumEndpoints; + u8 bInterfaceClass; + u8 bInterfaceSubClass; + u8 bInterfaceProtocol; + u8 iInterface; + u8 pad[3]; } WiiHIDInterfaceDescriptor; typedef struct { - u8 bLength; - u8 bDescriptorType; - u8 bEndpointAddress; - u8 bmAttributes; + u8 bLength; + u8 bDescriptorType; + u8 bEndpointAddress; + u8 bmAttributes; u16 wMaxPacketSize; - u8 bInterval; - u8 bRefresh; - u8 bSynchAddress; - u8 pad[1]; + u8 bInterval; + u8 bRefresh; + u8 bSynchAddress; + u8 pad[1]; } WiiHIDEndpointDescriptor; u32 deviceCommandAddress; diff --git a/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_net.h b/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_net.h index a1efc278d6..10446f299d 100644 --- a/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_net.h +++ b/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_net.h @@ -33,40 +33,40 @@ struct netcfg_connection_t { enum { - WIRED_IF = 1, // 0: wifi 1: wired - DNS_DHCP = 2, // 0: manual 1: DHCP - IP_DHCP = 4, // 0: manual 1: DHCP - USE_PROXY = 16, - CONNECTION_TEST_OK = 32, - CONNECTION_SELECTED = 128 + WIRED_IF = 1, // 0: wifi 1: wired + DNS_DHCP = 2, // 0: manual 1: DHCP + IP_DHCP = 4, // 0: manual 1: DHCP + USE_PROXY = 16, + CONNECTION_TEST_OK = 32, + CONNECTION_SELECTED = 128 }; enum { - OPEN = 0, - WEP64 = 1, - WEP128 = 2, - WPA_TKIP = 4, - WPA2_AES = 5, - WPA_AES = 6 + OPEN = 0, + WEP64 = 1, + WEP128 = 2, + WPA_TKIP = 4, + WPA2_AES = 5, + WPA_AES = 6 }; enum status { - LINK_BUSY = 1, - LINK_NONE, - LINK_WIRED, - LINK_WIFI_DOWN, - LINK_WIFI_UP + LINK_BUSY = 1, + LINK_NONE = 2, + LINK_WIRED = 3, + LINK_WIFI_DOWN = 4, + LINK_WIFI_UP = 5 }; enum { - PERM_NONE = 0, - PERM_SEND_MAIL = 1, - PERM_RECV_MAIL = 2, - PERM_DOWNLOAD = 4, - PERM_ALL = PERM_SEND_MAIL | PERM_RECV_MAIL | PERM_DOWNLOAD + PERM_NONE = 0, + PERM_SEND_MAIL = 1, + PERM_RECV_MAIL = 2, + PERM_DOWNLOAD = 4, + PERM_ALL = PERM_SEND_MAIL | PERM_RECV_MAIL | PERM_DOWNLOAD }; // settings common to both wired and wireless connections @@ -119,28 +119,28 @@ struct network_config_t enum nwc24_err_t { - WC24_OK = 0, - WC24_ERR_FATAL = -1, - WC24_ERR_ID_NONEXISTANCE = -34, - WC24_ERR_ID_GENERATED = -35, - WC24_ERR_ID_REGISTERED = -36, - WC24_ERR_ID_NOT_REGISTERED = -44, + WC24_OK = 0, + WC24_ERR_FATAL = -1, + WC24_ERR_ID_NONEXISTANCE = -34, + WC24_ERR_ID_GENERATED = -35, + WC24_ERR_ID_REGISTERED = -36, + WC24_ERR_ID_NOT_REGISTERED = -44, }; struct nwc24_config_t { enum { - NWC24_IDCS_INITIAL = 0, - NWC24_IDCS_GENERATED = 1, + NWC24_IDCS_INITIAL = 0, + NWC24_IDCS_GENERATED = 1, NWC24_IDCS_REGISTERED = 2 }; enum { - URL_COUNT = 0x05, - MAX_URL_LENGTH = 0x80, - MAX_EMAIL_LENGTH = 0x40, + URL_COUNT = 0x05, + MAX_URL_LENGTH = 0x80, + MAX_EMAIL_LENGTH = 0x40, MAX_PASSWORD_LENGTH = 0x20, }; @@ -521,11 +521,11 @@ public: private: enum { - IOCTL_NW24_GET_UNIVERSAL_TIME = 0x14, - IOCTL_NW24_SET_UNIVERSAL_TIME = 0x15, - IOCTL_NW24_UNIMPLEMENTED = 0x16, - IOCTL_NW24_SET_RTC_COUNTER = 0x17, - IOCTL_NW24_GET_TIME_DIFF = 0x18, + IOCTL_NW24_GET_UNIVERSAL_TIME = 0x14, + IOCTL_NW24_SET_UNIVERSAL_TIME = 0x15, + IOCTL_NW24_UNIMPLEMENTED = 0x16, + IOCTL_NW24_SET_RTC_COUNTER = 0x17, + IOCTL_NW24_GET_TIME_DIFF = 0x18, }; u64 rtc; @@ -627,14 +627,14 @@ public: private: enum { - IOCTLV_NCD_LOCKWIRELESSDRIVER = 0x1, // NCDLockWirelessDriver - IOCTLV_NCD_UNLOCKWIRELESSDRIVER = 0x2, // NCDUnlockWirelessDriver - IOCTLV_NCD_GETCONFIG = 0x3, // NCDiGetConfig - IOCTLV_NCD_SETCONFIG = 0x4, // NCDiSetConfig - IOCTLV_NCD_READCONFIG = 0x5, - IOCTLV_NCD_WRITECONFIG = 0x6, - IOCTLV_NCD_GETLINKSTATUS = 0x7, // NCDGetLinkStatus - IOCTLV_NCD_GETWIRELESSMACADDRESS = 0x8, // NCDGetWirelessMacAddress + IOCTLV_NCD_LOCKWIRELESSDRIVER = 0x1, // NCDLockWirelessDriver + IOCTLV_NCD_UNLOCKWIRELESSDRIVER = 0x2, // NCDUnlockWirelessDriver + IOCTLV_NCD_GETCONFIG = 0x3, // NCDiGetConfig + IOCTLV_NCD_SETCONFIG = 0x4, // NCDiSetConfig + IOCTLV_NCD_READCONFIG = 0x5, + IOCTLV_NCD_WRITECONFIG = 0x6, + IOCTLV_NCD_GETLINKSTATUS = 0x7, // NCDGetLinkStatus + IOCTLV_NCD_GETWIRELESSMACADDRESS = 0x8, // NCDGetWirelessMacAddress }; WiiNetConfig config; @@ -655,24 +655,24 @@ public: private: enum { - IOCTLV_WD_GET_MODE = 0x1001, // WD_GetMode - IOCTLV_WD_SET_LINKSTATE = 0x1002, // WD_SetLinkState - IOCTLV_WD_GET_LINKSTATE = 0x1003, // WD_GetLinkState - IOCTLV_WD_SET_CONFIG = 0x1004, // WD_SetConfig - IOCTLV_WD_GET_CONFIG = 0x1005, // WD_GetConfig - IOCTLV_WD_CHANGE_BEACON = 0x1006, // WD_ChangeBeacon - IOCTLV_WD_DISASSOC = 0x1007, // WD_DisAssoc - IOCTLV_WD_MP_SEND_FRAME = 0x1008, // WD_MpSendFrame - IOCTLV_WD_SEND_FRAME = 0x1009, // WD_SendFrame - IOCTLV_WD_SCAN = 0x100a, // WD_Scan - IOCTLV_WD_CALL_WL = 0x100c, // WD_CallWL - IOCTLV_WD_MEASURE_CHANNEL = 0x100b, // WD_MeasureChannel - IOCTLV_WD_GET_LASTERROR = 0x100d, // WD_GetLastError - IOCTLV_WD_GET_INFO = 0x100e, // WD_GetInfo - IOCTLV_WD_CHANGE_GAMEINFO = 0x100f, // WD_ChangeGameInfo - IOCTLV_WD_CHANGE_VTSF = 0x1010, // WD_ChangeVTSF - IOCTLV_WD_RECV_FRAME = 0x8000, // WD_ReceiveFrame - IOCTLV_WD_RECV_NOTIFICATION = 0x8001 // WD_ReceiveNotification + IOCTLV_WD_GET_MODE = 0x1001, // WD_GetMode + IOCTLV_WD_SET_LINKSTATE = 0x1002, // WD_SetLinkState + IOCTLV_WD_GET_LINKSTATE = 0x1003, // WD_GetLinkState + IOCTLV_WD_SET_CONFIG = 0x1004, // WD_SetConfig + IOCTLV_WD_GET_CONFIG = 0x1005, // WD_GetConfig + IOCTLV_WD_CHANGE_BEACON = 0x1006, // WD_ChangeBeacon + IOCTLV_WD_DISASSOC = 0x1007, // WD_DisAssoc + IOCTLV_WD_MP_SEND_FRAME = 0x1008, // WD_MpSendFrame + IOCTLV_WD_SEND_FRAME = 0x1009, // WD_SendFrame + IOCTLV_WD_SCAN = 0x100a, // WD_Scan + IOCTLV_WD_CALL_WL = 0x100c, // WD_CallWL + IOCTLV_WD_MEASURE_CHANNEL = 0x100b, // WD_MeasureChannel + IOCTLV_WD_GET_LASTERROR = 0x100d, // WD_GetLastError + IOCTLV_WD_GET_INFO = 0x100e, // WD_GetInfo + IOCTLV_WD_CHANGE_GAMEINFO = 0x100f, // WD_ChangeGameInfo + IOCTLV_WD_CHANGE_VTSF = 0x1010, // WD_ChangeVTSF + IOCTLV_WD_RECV_FRAME = 0x8000, // WD_ReceiveFrame + IOCTLV_WD_RECV_NOTIFICATION = 0x8001 // WD_ReceiveNotification }; enum diff --git a/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_net_ssl.h b/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_net_ssl.h index b8494d43d0..d8901f987d 100644 --- a/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_net_ssl.h +++ b/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_net_ssl.h @@ -18,40 +18,40 @@ enum ssl_err_t { - SSL_OK = 0, - SSL_ERR_FAILED = -1, - SSL_ERR_RAGAIN = -2, - SSL_ERR_WAGAIN = -3, - SSL_ERR_SYSCALL = -5, - SSL_ERR_ZERO = -6, // read or write returned 0 - SSL_ERR_CAGAIN = -7, // BIO not connected - SSL_ERR_ID = -8, // invalid SSL id - SSL_ERR_VCOMMONNAME = -9, // verify failed: common name - SSL_ERR_VROOTCA = -10, // verify failed: root ca - SSL_ERR_VCHAIN = -11, // verify failed: certificate chain - SSL_ERR_VDATE = -12, // verify failed: date invalid - SSL_ERR_SERVER_CERT = -13, // certificate cert invalid + SSL_OK = 0, + SSL_ERR_FAILED = -1, + SSL_ERR_RAGAIN = -2, + SSL_ERR_WAGAIN = -3, + SSL_ERR_SYSCALL = -5, + SSL_ERR_ZERO = -6, // read or write returned 0 + SSL_ERR_CAGAIN = -7, // BIO not connected + SSL_ERR_ID = -8, // invalid SSL id + SSL_ERR_VCOMMONNAME = -9, // verify failed: common name + SSL_ERR_VROOTCA = -10, // verify failed: root ca + SSL_ERR_VCHAIN = -11, // verify failed: certificate chain + SSL_ERR_VDATE = -12, // verify failed: date invalid + SSL_ERR_SERVER_CERT = -13, // certificate cert invalid }; enum SSL_IOCTL { - IOCTLV_NET_SSL_NEW = 0x01, - IOCTLV_NET_SSL_CONNECT = 0x02, - IOCTLV_NET_SSL_DOHANDSHAKE = 0x03, - IOCTLV_NET_SSL_READ = 0x04, - IOCTLV_NET_SSL_WRITE = 0x05, - IOCTLV_NET_SSL_SHUTDOWN = 0x06, - IOCTLV_NET_SSL_SETCLIENTCERT = 0x07, - IOCTLV_NET_SSL_SETCLIENTCERTDEFAULT = 0x08, - IOCTLV_NET_SSL_REMOVECLIENTCERT = 0x09, - IOCTLV_NET_SSL_SETROOTCA = 0x0A, - IOCTLV_NET_SSL_SETROOTCADEFAULT = 0x0B, - IOCTLV_NET_SSL_DOHANDSHAKEEX = 0x0C, - IOCTLV_NET_SSL_SETBUILTINROOTCA = 0x0D, - IOCTLV_NET_SSL_SETBUILTINCLIENTCERT = 0x0E, - IOCTLV_NET_SSL_DISABLEVERIFYOPTIONFORDEBUG = 0x0F, - IOCTLV_NET_SSL_DEBUGGETVERSION = 0x14, - IOCTLV_NET_SSL_DEBUGGETTIME = 0x15, + IOCTLV_NET_SSL_NEW = 0x01, + IOCTLV_NET_SSL_CONNECT = 0x02, + IOCTLV_NET_SSL_DOHANDSHAKE = 0x03, + IOCTLV_NET_SSL_READ = 0x04, + IOCTLV_NET_SSL_WRITE = 0x05, + IOCTLV_NET_SSL_SHUTDOWN = 0x06, + IOCTLV_NET_SSL_SETCLIENTCERT = 0x07, + IOCTLV_NET_SSL_SETCLIENTCERTDEFAULT = 0x08, + IOCTLV_NET_SSL_REMOVECLIENTCERT = 0x09, + IOCTLV_NET_SSL_SETROOTCA = 0x0A, + IOCTLV_NET_SSL_SETROOTCADEFAULT = 0x0B, + IOCTLV_NET_SSL_DOHANDSHAKEEX = 0x0C, + IOCTLV_NET_SSL_SETBUILTINROOTCA = 0x0D, + IOCTLV_NET_SSL_SETBUILTINCLIENTCERT = 0x0E, + IOCTLV_NET_SSL_DISABLEVERIFYOPTIONFORDEBUG = 0x0F, + IOCTLV_NET_SSL_DEBUGGETVERSION = 0x14, + IOCTLV_NET_SSL_DEBUGGETTIME = 0x15, }; typedef struct { diff --git a/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_sdio_slot0.h b/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_sdio_slot0.h index d59f7e0a0a..fb56eef715 100644 --- a/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_sdio_slot0.h +++ b/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_sdio_slot0.h @@ -29,26 +29,26 @@ private: // SD Host Controller Registers enum { - HCR_CLOCKCONTROL = 0x2C, - HCR_SOFTWARERESET = 0x2F, + HCR_CLOCKCONTROL = 0x2C, + HCR_SOFTWARERESET = 0x2F, }; // IOCtl enum { - IOCTL_WRITEHCR = 0x01, - IOCTL_READHCR = 0x02, - IOCTL_RESETCARD = 0x04, - IOCTL_SETCLK = 0x06, - IOCTL_SENDCMD = 0x07, - IOCTL_GETSTATUS = 0x0B, - IOCTL_GETOCR = 0x0C, + IOCTL_WRITEHCR = 0x01, + IOCTL_READHCR = 0x02, + IOCTL_RESETCARD = 0x04, + IOCTL_SETCLK = 0x06, + IOCTL_SENDCMD = 0x07, + IOCTL_GETSTATUS = 0x0B, + IOCTL_GETOCR = 0x0C, }; // IOCtlV enum { - IOCTLV_SENDCMD = 0x07, + IOCTLV_SENDCMD = 0x07, }; // ExecuteCommand @@ -63,33 +63,33 @@ private: // Status enum { - CARD_NOT_EXIST = 0, - CARD_INSERTED = 1, - CARD_INITIALIZED = 0x10000, + CARD_NOT_EXIST = 0, + CARD_INSERTED = 1, + CARD_INITIALIZED = 0x10000, }; // Commands enum { - GO_IDLE_STATE = 0x00, - ALL_SEND_CID = 0x02, - SEND_RELATIVE_ADDR = 0x03, - SELECT_CARD = 0x07, - SEND_IF_COND = 0x08, - SEND_CSD = 0x09, - SEND_CID = 0x0A, - SEND_STATUS = 0x0D, - SET_BLOCKLEN = 0x10, - READ_MULTIPLE_BLOCK = 0x12, - WRITE_MULTIPLE_BLOCK= 0x19, - APP_CMD_NEXT = 0x37, + GO_IDLE_STATE = 0x00, + ALL_SEND_CID = 0x02, + SEND_RELATIVE_ADDR = 0x03, + SELECT_CARD = 0x07, + SEND_IF_COND = 0x08, + SEND_CSD = 0x09, + SEND_CID = 0x0A, + SEND_STATUS = 0x0D, + SET_BLOCKLEN = 0x10, + READ_MULTIPLE_BLOCK = 0x12, + WRITE_MULTIPLE_BLOCK = 0x19, + APP_CMD_NEXT = 0x37, - ACMD_SETBUSWIDTH = 0x06, - ACMD_SENDOPCOND = 0x29, - ACMD_SENDSCR = 0x33, + ACMD_SETBUSWIDTH = 0x06, + ACMD_SENDOPCOND = 0x29, + ACMD_SENDSCR = 0x33, - EVENT_REGISTER = 0x40, - EVENT_UNREGISTER = 0x41, + EVENT_REGISTER = 0x40, + EVENT_UNREGISTER = 0x41, }; enum EventType diff --git a/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_usb.h b/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_usb.h index 75da4492e9..396d5db079 100644 --- a/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_usb.h +++ b/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_usb.h @@ -76,17 +76,17 @@ public: private: enum USBIOCtl { - USBV0_IOCTL_CTRLMSG = 0, - USBV0_IOCTL_BLKMSG = 1, - USBV0_IOCTL_INTRMSG = 2, + USBV0_IOCTL_CTRLMSG = 0, + USBV0_IOCTL_BLKMSG = 1, + USBV0_IOCTL_INTRMSG = 2, }; enum USBEndpoint { - HCI_CTRL = 0x00, - HCI_EVENT = 0x81, - ACL_DATA_IN = 0x82, - ACL_DATA_OUT = 0x02 + HCI_CTRL = 0x00, + HCI_EVENT = 0x81, + ACL_DATA_IN = 0x82, + ACL_DATA_OUT = 0x02 }; struct SHCICommandMessage diff --git a/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_usb_kbd.h b/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_usb_kbd.h index 28844fac78..6f7e496e85 100644 --- a/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_usb_kbd.h +++ b/Source/Core/Core/IPC_HLE/WII_IPC_HLE_Device_usb_kbd.h @@ -20,9 +20,9 @@ public: private: enum { - MSG_KBD_CONNECT = 0, - MSG_KBD_DISCONNECT, - MSG_EVENT + MSG_KBD_CONNECT = 0, + MSG_KBD_DISCONNECT = 1, + MSG_EVENT = 2 }; #pragma pack(push, 1) @@ -58,7 +58,7 @@ private: enum { KBD_LAYOUT_QWERTY = 0, - KBD_LAYOUT_AZERTY + KBD_LAYOUT_AZERTY = 1 }; int m_KeyboardLayout; static u8 m_KeyCodesQWERTY[256]; diff --git a/Source/Core/Core/IPC_HLE/WII_Socket.h b/Source/Core/Core/IPC_HLE/WII_Socket.h index cc2eb7fef8..07d05d02e1 100644 --- a/Source/Core/Core/IPC_HLE/WII_Socket.h +++ b/Source/Core/Core/IPC_HLE/WII_Socket.h @@ -53,8 +53,8 @@ typedef struct pollfd pollfd_t; #include "WII_IPC_HLE_Device_net_ssl.h" enum { - SO_MSG_OOB = 0x01, - SO_MSG_PEEK = 0x02, + SO_MSG_OOB = 0x01, + SO_MSG_PEEK = 0x02, SO_MSG_NONBLOCK = 0x04, }; enum { @@ -147,17 +147,17 @@ struct WiiInAddr struct WiiSockAddr { - u8 len; - u8 family; - u8 data[6]; + u8 len; + u8 family; + u8 data[6]; }; struct WiiSockAddrIn { - u8 len; - u8 family; - u16 port; - WiiInAddr addr; + u8 len; + u8 family; + u16 port; + WiiInAddr addr; }; #pragma pack(pop) diff --git a/Source/Core/Core/Movie.h b/Source/Core/Core/Movie.h index c2e52a739d..346c2682a3 100644 --- a/Source/Core/Core/Movie.h +++ b/Source/Core/Core/Movie.h @@ -31,16 +31,16 @@ enum PlayMode { // Gamecube Controller State #pragma pack(push,1) struct ControllerState { - bool Start:1, A:1, B:1, X:1, Y:1, Z:1; // Binary buttons, 6 bits - bool DPadUp:1, DPadDown:1, // Binary D-Pad buttons, 4 bits - DPadLeft:1, DPadRight:1; - bool L:1, R:1; // Binary triggers, 2 bits - bool disc:1; // Checks for disc being changed - bool reserved:3; // Reserved bits used for padding, 4 bits + bool Start:1, A:1, B:1, X:1, Y:1, Z:1; // Binary buttons, 6 bits + bool DPadUp:1, DPadDown:1, // Binary D-Pad buttons, 4 bits + DPadLeft:1, DPadRight:1; + bool L:1, R:1; // Binary triggers, 2 bits + bool disc:1; // Checks for disc being changed + bool reserved:3; // Reserved bits used for padding, 4 bits - u8 TriggerL, TriggerR; // Triggers, 16 bits - u8 AnalogStickX, AnalogStickY; // Main Stick, 16 bits - u8 CStickX, CStickY; // Sub-Stick, 16 bits + u8 TriggerL, TriggerR; // Triggers, 16 bits + u8 AnalogStickX, AnalogStickY; // Main Stick, 16 bits + u8 CStickX, CStickY; // Sub-Stick, 16 bits }; // Total: 60 + 4 = 64 bits per frame static_assert(sizeof(ControllerState) == 8, "ControllerState should be 8 bytes"); @@ -68,34 +68,34 @@ extern u32 g_rerecords; #pragma pack(push,1) struct DTMHeader { - u8 filetype[4]; // Unique Identifier (always "DTM"0x1A) + u8 filetype[4]; // Unique Identifier (always "DTM"0x1A) - u8 gameID[6]; // The Game ID - bool bWii; // Wii game + u8 gameID[6]; // The Game ID + bool bWii; // Wii game - u8 numControllers; // The number of connected controllers (1-4) + u8 numControllers; // The number of connected controllers (1-4) - bool bFromSaveState; // false indicates that the recording started from bootup, true for savestate - u64 frameCount; // Number of frames in the recording - u64 inputCount; // Number of input frames in recording - u64 lagCount; // Number of lag frames in the recording - u64 uniqueID; // (not implemented) A Unique ID comprised of: md5(time + Game ID) - u32 numRerecords; // Number of rerecords/'cuts' of this TAS - u8 author[32]; // Author's name (encoded in UTF-8) + bool bFromSaveState; // false indicates that the recording started from bootup, true for savestate + u64 frameCount; // Number of frames in the recording + u64 inputCount; // Number of input frames in recording + u64 lagCount; // Number of lag frames in the recording + u64 uniqueID; // (not implemented) A Unique ID comprised of: md5(time + Game ID) + u32 numRerecords; // Number of rerecords/'cuts' of this TAS + u8 author[32]; // Author's name (encoded in UTF-8) - u8 videoBackend[16]; // UTF-8 representation of the video backend - u8 audioEmulator[16]; // UTF-8 representation of the audio emulator - unsigned char md5[16]; // MD5 of game iso + u8 videoBackend[16]; // UTF-8 representation of the video backend + u8 audioEmulator[16]; // UTF-8 representation of the audio emulator + unsigned char md5[16]; // MD5 of game iso u64 recordingStartTime; // seconds since 1970 that recording started (used for RTC) - bool bSaveConfig; // Loads the settings below on startup if true + bool bSaveConfig; // Loads the settings below on startup if true bool bSkipIdle; bool bDualCore; bool bProgressive; bool bDSPHLE; bool bFastDiscSpeed; - u8 CPUCore; // 0 = interpreter, 1 = JIT, 2 = JITIL + u8 CPUCore; // 0 = interpreter, 1 = JIT, 2 = JITIL bool bEFBAccessEnable; bool bEFBCopyEnable; bool bCopyEFBToTexture; @@ -104,14 +104,14 @@ struct DTMHeader { bool bUseXFB; bool bUseRealXFB; bool bMemcard; - bool bClearSave; // Create a new memory card when playing back a movie if true + bool bClearSave; // Create a new memory card when playing back a movie if true u8 bongos; bool bSyncGPU; bool bNetPlay; - u8 reserved[13]; // Padding for any new config options - u8 discChange[40]; // Name of iso file to switch to, for two disc games. - u8 revision[20]; // Git hash - u8 reserved2[27]; // Make heading 256 bytes, just because we can + u8 reserved[13]; // Padding for any new config options + u8 discChange[40]; // Name of iso file to switch to, for two disc games. + u8 revision[20]; // Git hash + u8 reserved2[27]; // Make heading 256 bytes, just because we can }; static_assert(sizeof(DTMHeader) == 256, "DTMHeader should be 256 bytes"); diff --git a/Source/Core/Core/NetPlayClient.h b/Source/Core/Core/NetPlayClient.h index 18509cf8c0..1a3ec64df8 100644 --- a/Source/Core/Core/NetPlayClient.h +++ b/Source/Core/Core/NetPlayClient.h @@ -96,26 +96,26 @@ protected: std::recursive_mutex players, send; } m_crit; - Common::FifoQueue m_pad_buffer[4]; - Common::FifoQueue m_wiimote_buffer[4]; + Common::FifoQueue m_pad_buffer[4]; + Common::FifoQueue m_wiimote_buffer[4]; - NetPlayUI* m_dialog; - sf::SocketTCP m_socket; - std::thread m_thread; - sf::Selector m_selector; + NetPlayUI* m_dialog; + sf::SocketTCP m_socket; + std::thread m_thread; + sf::Selector m_selector; - std::string m_selected_game; - volatile bool m_is_running; - volatile bool m_do_loop; + std::string m_selected_game; + volatile bool m_is_running; + volatile bool m_do_loop; - unsigned int m_target_buffer_size; + unsigned int m_target_buffer_size; - Player* m_local_player; + Player* m_local_player; - u32 m_current_game; + u32 m_current_game; - PadMapping m_pad_map[4]; - PadMapping m_wiimote_map[4]; + PadMapping m_pad_map[4]; + PadMapping m_wiimote_map[4]; bool m_is_recording; @@ -125,8 +125,8 @@ private: void SendWiimoteState(const PadMapping in_game_pad, const NetWiimote& nw); unsigned int OnData(sf::Packet& packet); - PlayerId m_pid; - std::map m_players; + PlayerId m_pid; + std::map m_players; }; void NetPlay_Enable(NetPlayClient* const np); diff --git a/Source/Core/Core/NetPlayProto.h b/Source/Core/Core/NetPlayProto.h index 33771c3eae..e887dc482a 100644 --- a/Source/Core/Core/NetPlayProto.h +++ b/Source/Core/Core/NetPlayProto.h @@ -23,12 +23,12 @@ extern NetSettings g_NetPlaySettings; struct Rpt : public std::vector { - u16 channel; + u16 channel; }; typedef std::vector NetWiimote; -#define NETPLAY_VERSION "Dolphin NetPlay 2014-01-08" +#define NETPLAY_VERSION "Dolphin NetPlay 2014-01-08" const int NETPLAY_INITIAL_GCTIME = 1272737767; @@ -36,29 +36,29 @@ const int NETPLAY_INITIAL_GCTIME = 1272737767; // messages enum { - NP_MSG_PLAYER_JOIN = 0x10, - NP_MSG_PLAYER_LEAVE = 0x11, + NP_MSG_PLAYER_JOIN = 0x10, + NP_MSG_PLAYER_LEAVE = 0x11, - NP_MSG_CHAT_MESSAGE = 0x30, + NP_MSG_CHAT_MESSAGE = 0x30, - NP_MSG_PAD_DATA = 0x60, - NP_MSG_PAD_MAPPING = 0x61, - NP_MSG_PAD_BUFFER = 0x62, + NP_MSG_PAD_DATA = 0x60, + NP_MSG_PAD_MAPPING = 0x61, + NP_MSG_PAD_BUFFER = 0x62, - NP_MSG_WIIMOTE_DATA = 0x70, - NP_MSG_WIIMOTE_MAPPING = 0x71, + NP_MSG_WIIMOTE_DATA = 0x70, + NP_MSG_WIIMOTE_MAPPING = 0x71, - NP_MSG_START_GAME = 0xA0, - NP_MSG_CHANGE_GAME = 0xA1, - NP_MSG_STOP_GAME = 0xA2, - NP_MSG_DISABLE_GAME = 0xA3, + NP_MSG_START_GAME = 0xA0, + NP_MSG_CHANGE_GAME = 0xA1, + NP_MSG_STOP_GAME = 0xA2, + NP_MSG_DISABLE_GAME = 0xA3, - NP_MSG_READY = 0xD0, - NP_MSG_NOT_READY = 0xD1, + NP_MSG_READY = 0xD0, + NP_MSG_NOT_READY = 0xD1, - NP_MSG_PING = 0xE0, - NP_MSG_PONG = 0xE1, - NP_MSG_PLAYER_PING_DATA = 0xE2, + NP_MSG_PING = 0xE0, + NP_MSG_PONG = 0xE1, + NP_MSG_PLAYER_PING_DATA = 0xE2, }; typedef u8 MessageId; @@ -68,9 +68,9 @@ typedef u32 FrameNum; enum { - CON_ERR_SERVER_FULL = 1, - CON_ERR_GAME_RUNNING, - CON_ERR_VERSION_MISMATCH + CON_ERR_SERVER_FULL = 1, + CON_ERR_GAME_RUNNING = 2, + CON_ERR_VERSION_MISMATCH = 3 }; namespace NetPlay { diff --git a/Source/Core/Core/NetPlayServer.h b/Source/Core/Core/NetPlayServer.h index 13acbcfb2b..12f4dbc372 100644 --- a/Source/Core/Core/NetPlayServer.h +++ b/Source/Core/Core/NetPlayServer.h @@ -72,11 +72,11 @@ private: bool m_is_running; bool m_do_loop; - Common::Timer m_ping_timer; - u32 m_ping_key; + Common::Timer m_ping_timer; + u32 m_ping_key; bool m_update_pings; - u32 m_current_game; - unsigned int m_target_buffer_size; + u32 m_current_game; + unsigned int m_target_buffer_size; PadMapping m_pad_map[4]; PadMapping m_wiimote_map[4]; diff --git a/Source/Core/Core/PowerPC/Gekko.h b/Source/Core/Core/PowerPC/Gekko.h index d4e6f8e4cb..5c631a5b28 100644 --- a/Source/Core/Core/PowerPC/Gekko.h +++ b/Source/Core/Core/PowerPC/Gekko.h @@ -18,244 +18,245 @@ union UGeckoInstruction { u32 hex; - UGeckoInstruction(u32 _hex) { hex = _hex;} - UGeckoInstruction() { hex = 0;} + UGeckoInstruction(u32 _hex) { hex = _hex;} + UGeckoInstruction() { hex = 0;} struct { // Record bit // 1, if the condition register should be updated by this instruction - u32 Rc : 1; - u32 SUBOP10 : 10; + u32 Rc : 1; + u32 SUBOP10 : 10; // Source GPR - u32 RB : 5; + u32 RB : 5; // Source or destination GPR - u32 RA : 5; + u32 RA : 5; // Destination GPR - u32 RD : 5; + u32 RD : 5; // Primary opcode - u32 OPCD : 6; + u32 OPCD : 6; }; struct { // Immediate, signed 16-bit - signed SIMM_16 : 16; - u32 : 5; + signed SIMM_16 : 16; + u32 : 5; // Conditions on which to trap - u32 TO : 5; - u32 OPCD_2 : 6; + u32 TO : 5; + u32 OPCD_2 : 6; }; struct { - u32 Rc_2 : 1; - u32 : 10; - u32 : 5; - u32 : 5; + u32 Rc_2 : 1; + u32 : 10; + u32 : 5; + u32 : 5; // Source GPR - u32 RS : 5; - u32 OPCD_3 : 6; + u32 RS : 5; + u32 OPCD_3 : 6; }; struct { // Immediate, unsigned 16-bit - u32 UIMM : 16; - u32 : 5; - u32 : 5; - u32 OPCD_4 : 6; + u32 UIMM : 16; + u32 : 5; + u32 : 5; + u32 OPCD_4 : 6; }; struct { // Link bit // 1, if branch instructions should put the address of the next instruction into the link register - u32 LK : 1; + u32 LK : 1; // Absolute address bit // 1, if the immediate field represents an absolute address - u32 AA : 1; + u32 AA : 1; // Immediate, signed 24-bit - u32 LI : 24; - u32 OPCD_5 : 6; + u32 LI : 24; + u32 OPCD_5 : 6; }; struct { - u32 LK_2 : 1; - u32 AA_2 : 1; + u32 LK_2 : 1; + u32 AA_2 : 1; // Branch displacement, signed 14-bit (right-extended by 0b00) - u32 BD : 14; + u32 BD : 14; // Branch condition - u32 BI : 5; + u32 BI : 5; // Conditional branch control - u32 BO : 5; - u32 OPCD_6 : 6; + u32 BO : 5; + u32 OPCD_6 : 6; }; struct { - u32 LK_3 : 1; - u32 : 10; - u32 : 5; - u32 BI_2 : 5; - u32 BO_2 : 5; - u32 OPCD_7 : 6; + u32 LK_3 : 1; + u32 : 10; + u32 : 5; + u32 BI_2 : 5; + u32 BO_2 : 5; + u32 OPCD_7 : 6; }; struct { - u32 : 11; - u32 RB_2 : 5; - u32 RA_2 : 5; + u32 : 11; + u32 RB_2 : 5; + u32 RA_2 : 5; // ? - u32 L : 1; - u32 : 1; + u32 L : 1; + u32 : 1; // Destination field in CR or FPSCR - u32 CRFD : 3; - u32 OPCD_8 : 6; + u32 CRFD : 3; + u32 OPCD_8 : 6; }; struct { - signed SIMM_16_2 : 16; - u32 RA_3 : 5; - u32 L_2 : 1; - u32 : 1; - u32 CRFD_2 : 3; - u32 OPCD_9 : 6; + signed SIMM_16_2 : 16; + u32 RA_3 : 5; + u32 L_2 : 1; + u32 : 1; + u32 CRFD_2 : 3; + u32 OPCD_9 : 6; }; struct { - u32 UIMM_2 : 16; - u32 RA_4 : 5; - u32 L_3 : 1; - u32 : 1; - u32 CRFD_3 : 3; - u32 OPCD_A : 6; + u32 UIMM_2 : 16; + u32 RA_4 : 5; + u32 L_3 : 1; + u32 : 1; + u32 CRFD_3 : 3; + u32 OPCD_A : 6; }; struct { - u32 : 1; - u32 SUBOP10_2: 10; - u32 RB_5 : 5; - u32 RA_5 : 5; - u32 L_4 : 1; - u32 : 1; - u32 CRFD_4 : 3; - u32 OPCD_B : 6; + u32 : 1; + u32 SUBOP10_2: 10; + u32 RB_5 : 5; + u32 RA_5 : 5; + u32 L_4 : 1; + u32 : 1; + u32 CRFD_4 : 3; + u32 OPCD_B : 6; }; struct { - u32 : 16; + u32 : 16; // Segment register - u32 SR : 4; - u32 : 1; - u32 RS_2 : 5; - u32 OPCD_C : 6; + u32 SR : 4; + u32 : 1; + u32 RS_2 : 5; + u32 OPCD_C : 6; }; // Table 59 struct { - u32 Rc_4 : 1; - u32 SUBOP5 : 5; + u32 Rc_4 : 1; + u32 SUBOP5 : 5; // ? - u32 RC : 5; - u32 : 5; - u32 RA_6 : 5; - u32 RD_2 : 5; - u32 OPCD_D : 6; + u32 RC : 5; + u32 : 5; + u32 RA_6 : 5; + u32 RD_2 : 5; + u32 OPCD_D : 6; }; struct - { u32 : 10; + { + u32 : 10; // Overflow enable - u32 OE : 1; + u32 OE : 1; // Special-purpose register - u32 SPR : 10; - u32 : 11; + u32 SPR : 10; + u32 : 11; }; struct { - u32 : 10; - u32 OE_3 : 1; + u32 : 10; + u32 OE_3 : 1; // Upper special-purpose register - u32 SPRU : 5; + u32 SPRU : 5; // Lower special-purpose register - u32 SPRL : 5; - u32 : 11; + u32 SPRL : 5; + u32 : 11; }; // rlwinmx struct { - u32 Rc_3 : 1; + u32 Rc_3 : 1; // Mask end - u32 ME : 5; + u32 ME : 5; // Mask begin - u32 MB : 5; + u32 MB : 5; // Shift amount - u32 SH : 5; - u32 : 16; + u32 SH : 5; + u32 : 16; }; // crxor struct { - u32 : 11; + u32 : 11; // Source bit in the CR - u32 CRBB : 5; + u32 CRBB : 5; // Source bit in the CR - u32 CRBA : 5; + u32 CRBA : 5; // Destination bit in the CR - u32 CRBD : 5; - u32 : 6; + u32 CRBD : 5; + u32 : 6; }; // mftb struct { - u32 : 11; + u32 : 11; // Time base register - u32 TBR : 10; - u32 : 11; + u32 TBR : 10; + u32 : 11; }; struct { - u32 : 11; + u32 : 11; // Upper time base register - u32 TBRU : 5; + u32 TBRU : 5; // Lower time base register - u32 TBRL : 5; - u32 : 11; + u32 TBRL : 5; + u32 : 11; }; struct { - u32 : 18; + u32 : 18; // Source field in the CR or FPSCR - u32 CRFS : 3; - u32 : 2; - u32 CRFD_5 : 3; - u32 : 6; + u32 CRFS : 3; + u32 : 2; + u32 CRFD_5 : 3; + u32 : 6; }; struct { - u32 : 12; + u32 : 12; // Field mask, identifies the CR fields to be updated by mtcrf - u32 CRM : 8; - u32 : 1; + u32 CRM : 8; + u32 : 1; // Destination FPR - u32 FD : 5; - u32 : 6; + u32 FD : 5; + u32 : 6; }; struct { - u32 : 6; + u32 : 6; // Source FPR - u32 FC : 5; + u32 FC : 5; // Source FPR - u32 FB : 5; + u32 FB : 5; // Source FPR - u32 FA : 5; + u32 FA : 5; // Source FPR - u32 FS : 5; - u32 : 6; + u32 FS : 5; + u32 : 6; }; struct { @@ -268,30 +269,30 @@ union UGeckoInstruction // paired single quantized load/store struct { - u32 : 7; + u32 : 7; // Graphics quantization register to use - u32 Ix : 3; + u32 Ix : 3; // 0: paired single, 1: scalar - u32 Wx : 1; - u32 : 1; + u32 Wx : 1; + u32 : 1; // Graphics quantization register to use - u32 I : 3; + u32 I : 3; // 0: paired single, 1: scalar - u32 W : 1; - u32 : 16; + u32 W : 1; + u32 : 16; }; struct { - signed SIMM_12 : 12; - u32 : 20; + signed SIMM_12 : 12; + u32 : 20; }; struct { - u32 : 11; + u32 : 11; // Number of bytes to use in lswi/stswi (0 means 32 bytes) - u32 NB : 5; + u32 NB : 5; }; }; @@ -307,29 +308,29 @@ union UGQR u32 Hex; struct { - u32 ST_TYPE : 3; - u32 : 5; - u32 ST_SCALE : 6; - u32 : 2; - u32 LD_TYPE : 3; - u32 : 5; - u32 LD_SCALE : 6; - u32 : 2; + u32 ST_TYPE : 3; + u32 : 5; + u32 ST_SCALE : 6; + u32 : 2; + u32 LD_TYPE : 3; + u32 : 5; + u32 LD_SCALE : 6; + u32 : 2; }; UGQR(u32 _hex) { Hex = _hex; } - UGQR() {Hex = 0; } + UGQR() {Hex = 0; } }; // FPU Register union UFPR { - u64 as_u64; - s64 as_s64; - double d; - u32 as_u32[2]; - s32 as_s32[2]; - float f[2]; + u64 as_u64; + s64 as_s64; + double d; + u32 as_u32[2]; + s32 as_s32[2]; + float f[2]; }; #define XER_CA_MASK 0x20000000 @@ -340,16 +341,16 @@ union UReg_XER { struct { - u32 BYTE_COUNT : 7; - u32 : 22; - u32 CA : 1; - u32 OV : 1; - u32 SO : 1; + u32 BYTE_COUNT : 7; + u32 : 22; + u32 CA : 1; + u32 OV : 1; + u32 SO : 1; }; u32 Hex; UReg_XER(u32 _hex) { Hex = _hex; } - UReg_XER() { Hex = 0; } + UReg_XER() { Hex = 0; } }; // Machine State Register @@ -357,31 +358,31 @@ union UReg_MSR { struct { - u32 LE : 1; - u32 RI : 1; - u32 PM : 1; - u32 : 1; // res28 - u32 DR : 1; - u32 IR : 1; - u32 IP : 1; - u32 : 1; // res24 - u32 FE1 : 1; - u32 BE : 1; - u32 SE : 1; - u32 FE0 : 1; - u32 MCHECK : 1; - u32 FP : 1; - u32 PR : 1; - u32 EE : 1; - u32 ILE : 1; - u32 : 1; // res14 - u32 POW : 1; - u32 res : 13; + u32 LE : 1; + u32 RI : 1; + u32 PM : 1; + u32 : 1; // res28 + u32 DR : 1; + u32 IR : 1; + u32 IP : 1; + u32 : 1; // res24 + u32 FE1 : 1; + u32 BE : 1; + u32 SE : 1; + u32 FE0 : 1; + u32 MCHECK : 1; + u32 FP : 1; + u32 PR : 1; + u32 EE : 1; + u32 ILE : 1; + u32 : 1; // res14 + u32 POW : 1; + u32 res : 13; }; u32 Hex; UReg_MSR(u32 _hex) { Hex = _hex; } - UReg_MSR() { Hex = 0; } + UReg_MSR() { Hex = 0; } }; // Floating Point Status and Control Register @@ -390,64 +391,64 @@ union UReg_FPSCR struct { // Rounding mode (towards: nearest, zero, +inf, -inf) - u32 RN : 2; + u32 RN : 2; // Non-IEEE mode enable (aka flush-to-zero) - u32 NI : 1; + u32 NI : 1; // Inexact exception enable - u32 XE : 1; + u32 XE : 1; // IEEE division by zero exception enable - u32 ZE : 1; + u32 ZE : 1; // IEEE underflow exception enable - u32 UE : 1; + u32 UE : 1; // IEEE overflow exception enable - u32 OE : 1; + u32 OE : 1; // Invalid operation exception enable - u32 VE : 1; + u32 VE : 1; // Invalid operation exception for integer conversion (sticky) - u32 VXCVI : 1; + u32 VXCVI : 1; // Invalid operation exception for square root (sticky) - u32 VXSQRT : 1; + u32 VXSQRT : 1; // Invalid operation exception for software request (sticky) - u32 VXSOFT : 1; + u32 VXSOFT : 1; // reserved - u32 : 1; + u32 : 1; // Floating point result flags (not sticky) - u32 FPRF : 5; + u32 FPRF : 5; // Fraction inexact (not sticky) - u32 FI : 1; + u32 FI : 1; // Fraction rounded (not sticky) - u32 FR : 1; + u32 FR : 1; // Invalid operation exception for invalid comparison (sticky) - u32 VXVC : 1; + u32 VXVC : 1; // Invalid operation exception for inf * 0 (sticky) - u32 VXIMZ : 1; + u32 VXIMZ : 1; // Invalid operation exception for 0 / 0 (sticky) - u32 VXZDZ : 1; + u32 VXZDZ : 1; // Invalid operation exception for int / inf (sticky) - u32 VXIDI : 1; + u32 VXIDI : 1; // Invalid operation exception for inf - inf (sticky) - u32 VXISI : 1; + u32 VXISI : 1; // Invalid operation exception for SNaN (sticky) - u32 VXSNAN : 1; + u32 VXSNAN : 1; // Inexact exception (sticky) - u32 XX : 1; + u32 XX : 1; // Division by zero exception (sticky) - u32 ZX : 1; + u32 ZX : 1; // Underflow exception (sticky) - u32 UX : 1; + u32 UX : 1; // Overflow exception (sticky) - u32 OX : 1; + u32 OX : 1; // Invalid operation exception summary (not sticky) - u32 VX : 1; + u32 VX : 1; // Enabled exception summary (not sticky) - u32 FEX : 1; + u32 FEX : 1; // Exception summary (sticky) - u32 FX : 1; + u32 FX : 1; }; u32 Hex; - UReg_FPSCR(u32 _hex) { Hex = _hex; } - UReg_FPSCR() { Hex = 0;} + UReg_FPSCR(u32 _hex) { Hex = _hex; } + UReg_FPSCR() { Hex = 0;} }; // Hardware Implementation-Dependent Register 0 @@ -455,36 +456,36 @@ union UReg_HID0 { struct { - u32 NOOPTI : 1; - u32 : 1; - u32 BHT : 1; - u32 ABE : 1; - u32 : 1; - u32 BTIC : 1; - u32 DCFA : 1; - u32 SGE : 1; - u32 IFEM : 1; - u32 SPD : 1; - u32 DCFI : 1; - u32 ICFI : 1; - u32 DLOCK : 1; - u32 ILOCK : 1; - u32 DCE : 1; - u32 ICE : 1; - u32 NHR : 1; - u32 : 3; - u32 DPM : 1; - u32 SLEEP : 1; - u32 NAP : 1; - u32 DOZE : 1; - u32 PAR : 1; - u32 ECLK : 1; - u32 : 1; - u32 BCLK : 1; - u32 EBD : 1; - u32 EBA : 1; - u32 DBP : 1; - u32 EMCP : 1; + u32 NOOPTI : 1; + u32 : 1; + u32 BHT : 1; + u32 ABE : 1; + u32 : 1; + u32 BTIC : 1; + u32 DCFA : 1; + u32 SGE : 1; + u32 IFEM : 1; + u32 SPD : 1; + u32 DCFI : 1; + u32 ICFI : 1; + u32 DLOCK : 1; + u32 ILOCK : 1; + u32 DCE : 1; + u32 ICE : 1; + u32 NHR : 1; + u32 : 3; + u32 DPM : 1; + u32 SLEEP : 1; + u32 NAP : 1; + u32 DOZE : 1; + u32 PAR : 1; + u32 ECLK : 1; + u32 : 1; + u32 BCLK : 1; + u32 EBD : 1; + u32 EBA : 1; + u32 DBP : 1; + u32 EMCP : 1; }; u32 Hex; }; @@ -494,25 +495,25 @@ union UReg_HID2 { struct { - u32 : 16; - u32 DQOMEE : 1; - u32 DCMEE : 1; - u32 DNCEE : 1; - u32 DCHEE : 1; - u32 DQOERR : 1; - u32 DCEMERR : 1; - u32 DNCERR : 1; - u32 DCHERR : 1; - u32 DMAQL : 4; - u32 LCE : 1; - u32 PSE : 1; - u32 WPE : 1; - u32 LSQE : 1; + u32 : 16; + u32 DQOMEE : 1; + u32 DCMEE : 1; + u32 DNCEE : 1; + u32 DCHEE : 1; + u32 DQOERR : 1; + u32 DCEMERR : 1; + u32 DNCERR : 1; + u32 DCHERR : 1; + u32 DMAQL : 4; + u32 LCE : 1; + u32 PSE : 1; + u32 WPE : 1; + u32 LSQE : 1; }; u32 Hex; - UReg_HID2(u32 _hex) { Hex = _hex; } - UReg_HID2() { Hex = 0; } + UReg_HID2(u32 _hex) { Hex = _hex; } + UReg_HID2() { Hex = 0; } }; // Hardware Implementation-Dependent Register 4 @@ -520,22 +521,22 @@ union UReg_HID4 { struct { - u32 : 20; - u32 L2CFI : 1; - u32 L2MUM : 1; - u32 DBP : 1; - u32 LPE : 1; - u32 ST0 : 1; - u32 SBE : 1; - u32 : 1; - u32 BPD : 2; - u32 L2FM : 2; - u32 : 1; + u32 : 20; + u32 L2CFI : 1; + u32 L2MUM : 1; + u32 DBP : 1; + u32 LPE : 1; + u32 ST0 : 1; + u32 SBE : 1; + u32 : 1; + u32 BPD : 2; + u32 L2FM : 2; + u32 : 1; }; u32 Hex; - UReg_HID4(u32 _hex) { Hex = _hex; } - UReg_HID4() { Hex = 0; } + UReg_HID4(u32 _hex) { Hex = _hex; } + UReg_HID4() { Hex = 0; } }; // SPR1 - Page Table format @@ -544,9 +545,9 @@ union UReg_SPR1 u32 Hex; struct { - u32 htaborg : 16; - u32 : 7; - u32 htabmask : 9; + u32 htaborg : 16; + u32 : 7; + u32 htabmask : 9; }; }; @@ -556,21 +557,21 @@ union UReg_MMCR0 u32 Hex; struct { - u32 PMC2SELECT : 6; - u32 PMC1SELECT : 7; - u32 PMCTRIGGER : 1; - u32 PMCINTCONTROL : 1; - u32 PMC1INTCONTROL : 1; - u32 THRESHOLD : 6; - u32 INTONBITTRANS : 1; - u32 RTCSELECT : 2; - u32 DISCOUNT : 1; - u32 ENINT : 1; - u32 DMR : 1; - u32 DMS : 1; - u32 DU : 1; - u32 DP : 1; - u32 DIS : 1; + u32 PMC2SELECT : 6; + u32 PMC1SELECT : 7; + u32 PMCTRIGGER : 1; + u32 PMCINTCONTROL : 1; + u32 PMC1INTCONTROL : 1; + u32 THRESHOLD : 6; + u32 INTONBITTRANS : 1; + u32 RTCSELECT : 2; + u32 DISCOUNT : 1; + u32 ENINT : 1; + u32 DMR : 1; + u32 DMS : 1; + u32 DU : 1; + u32 DP : 1; + u32 DIS : 1; }; }; @@ -580,9 +581,9 @@ union UReg_MMCR1 u32 Hex; struct { - u32 : 22; - u32 PMC4SELECT : 5; - u32 PMC3SELECT : 5; + u32 : 22; + u32 PMC4SELECT : 5; + u32 PMC3SELECT : 5; }; }; @@ -591,14 +592,14 @@ union UReg_WPAR { struct { - u32 BNE : 1; - u32 : 4; - u32 GB_ADDR : 27; + u32 BNE : 1; + u32 : 4; + u32 GB_ADDR : 27; }; u32 Hex; - UReg_WPAR(u32 _hex) { Hex = _hex; } - UReg_WPAR() { Hex = 0; } + UReg_WPAR(u32 _hex) { Hex = _hex; } + UReg_WPAR() { Hex = 0; } }; // Direct Memory Access Upper register @@ -606,13 +607,13 @@ union UReg_DMAU { struct { - u32 DMA_LEN_U : 5; - u32 MEM_ADDR : 27; + u32 DMA_LEN_U : 5; + u32 MEM_ADDR : 27; }; u32 Hex; - UReg_DMAU(u32 _hex) { Hex = _hex; } - UReg_DMAU() { Hex = 0; } + UReg_DMAU(u32 _hex) { Hex = _hex; } + UReg_DMAU() { Hex = 0; } }; // Direct Memory Access Lower (DMAL) register @@ -620,65 +621,65 @@ union UReg_DMAL { struct { - u32 DMA_F : 1; - u32 DMA_T : 1; - u32 DMA_LEN_L : 2; - u32 DMA_LD : 1; - u32 LC_ADDR : 27; + u32 DMA_F : 1; + u32 DMA_T : 1; + u32 DMA_LEN_L : 2; + u32 DMA_LD : 1; + u32 LC_ADDR : 27; }; u32 Hex; - UReg_DMAL(u32 _hex) { Hex = _hex; } - UReg_DMAL() { Hex = 0; } + UReg_DMAL(u32 _hex) { Hex = _hex; } + UReg_DMAL() { Hex = 0; } }; union UReg_BAT_Up { struct { - u32 VP : 1; - u32 VS : 1; - u32 BL : 11; // Block length (aka block size mask) - u32 : 4; - u32 BEPI : 15; + u32 VP : 1; + u32 VS : 1; + u32 BL : 11; // Block length (aka block size mask) + u32 : 4; + u32 BEPI : 15; }; u32 Hex; - UReg_BAT_Up(u32 _hex) { Hex = _hex; } - UReg_BAT_Up() { Hex = 0; } + UReg_BAT_Up(u32 _hex) { Hex = _hex; } + UReg_BAT_Up() { Hex = 0; } }; union UReg_BAT_Lo { struct { - u32 PP : 2; - u32 : 1; - u32 WIMG : 4; - u32 : 10; - u32 BRPN : 15; // Physical Block Number + u32 PP : 2; + u32 : 1; + u32 WIMG : 4; + u32 : 10; + u32 BRPN : 15; // Physical Block Number }; u32 Hex; - UReg_BAT_Lo(u32 _hex) { Hex = _hex; } - UReg_BAT_Lo() { Hex = 0; } + UReg_BAT_Lo(u32 _hex) { Hex = _hex; } + UReg_BAT_Lo() { Hex = 0; } }; union UReg_PTE { struct { - u64 API : 6; - u64 H : 1; - u64 VSID : 24; - u64 V : 1; - u64 PP : 2; - u64 : 1; - u64 WIMG : 4; - u64 C : 1; - u64 R : 1; - u64 : 3; - u64 RPN : 20; + u64 API : 6; + u64 H : 1; + u64 VSID : 24; + u64 V : 1; + u64 PP : 2; + u64 : 1; + u64 WIMG : 4; + u64 C : 1; + u64 R : 1; + u64 : 3; + u64 RPN : 20; }; @@ -695,20 +696,20 @@ union UReg_PTE // quantize types enum EQuantizeType { - QUANTIZE_FLOAT = 0, - QUANTIZE_U8 = 4, - QUANTIZE_U16 = 5, - QUANTIZE_S8 = 6, - QUANTIZE_S16 = 7, + QUANTIZE_FLOAT = 0, + QUANTIZE_U8 = 4, + QUANTIZE_U16 = 5, + QUANTIZE_S8 = 6, + QUANTIZE_S16 = 7, }; // branches enum { - BO_BRANCH_IF_CTR_0 = 2, // 3 - BO_DONT_DECREMENT_FLAG = 4, // 2 - BO_BRANCH_IF_TRUE = 8, // 1 - BO_DONT_CHECK_CONDITION = 16, // 0 + BO_BRANCH_IF_CTR_0 = 2, // 3 + BO_DONT_DECREMENT_FLAG = 4, // 2 + BO_BRANCH_IF_TRUE = 8, // 1 + BO_DONT_CHECK_CONDITION = 16, // 0 }; // Special purpose register indices diff --git a/Source/Core/Core/PowerPC/Interpreter/Interpreter_Tables.cpp b/Source/Core/Core/PowerPC/Interpreter/Interpreter_Tables.cpp index 882b9d01da..4b29b1680a 100644 --- a/Source/Core/Core/PowerPC/Interpreter/Interpreter_Tables.cpp +++ b/Source/Core/Core/PowerPC/Interpreter/Interpreter_Tables.cpp @@ -63,7 +63,7 @@ static GekkoOPTemplate primarytable[] = {45, Interpreter::sthu, {"sthu", OPTYPE_STORE, FL_OUT_A | FL_IN_A | FL_IN_S | FL_LOADSTORE, 0, 0, 0, 0}}, {36, Interpreter::stw, {"stw", OPTYPE_STORE, FL_IN_A | FL_IN_S | FL_LOADSTORE, 0, 0, 0, 0}}, {37, Interpreter::stwu, {"stwu", OPTYPE_STORE, FL_OUT_A | FL_IN_A | FL_IN_S | FL_LOADSTORE, 0, 0, 0, 0}}, - {38, Interpreter::stb, {"stb", OPTYPE_STORE, FL_IN_A | FL_IN_S | FL_LOADSTORE, 0, 0, 0, 0}}, + {38, Interpreter::stb, {"stb", OPTYPE_STORE, FL_IN_A | FL_IN_S | FL_LOADSTORE, 0, 0, 0, 0}}, {39, Interpreter::stbu, {"stbu", OPTYPE_STORE, FL_OUT_A | FL_IN_A | FL_IN_S | FL_LOADSTORE, 0, 0, 0, 0}}, {46, Interpreter::lmw, {"lmw", OPTYPE_SYSTEM, FL_EVIL | FL_LOADSTORE, 10, 0, 0, 0}}, diff --git a/Source/Core/Core/PowerPC/PPCTables.h b/Source/Core/Core/PowerPC/PPCTables.h index 6da82a953e..4cdf2e113f 100644 --- a/Source/Core/Core/PowerPC/PPCTables.h +++ b/Source/Core/Core/PowerPC/PPCTables.h @@ -10,33 +10,33 @@ enum { - FL_SET_CR0 = (1<<0), // - FL_SET_CR1 = (1<<1), // - FL_SET_CRn = (1<<2), // - FL_SET_CRx = FL_SET_CR0 | FL_SET_CR1 | FL_SET_CRn, // - FL_SET_CA = (1<<3), // carry - FL_READ_CA = (1<<4), // carry - FL_RC_BIT = (1<<5), - FL_RC_BIT_F = (1<<6), - FL_ENDBLOCK = (1<<7), - FL_IN_A = (1<<8), - FL_IN_A0 = (1<<9), - FL_IN_B = (1<<10), - FL_IN_C = (1<<11), - FL_IN_S = (1<<12), - FL_IN_AB = FL_IN_A | FL_IN_B, - FL_IN_SB = FL_IN_S | FL_IN_B, - FL_IN_A0B = FL_IN_A0 | FL_IN_B, - FL_IN_A0BC = FL_IN_A0 | FL_IN_B | FL_IN_C, - FL_OUT_D = (1<<13), - FL_OUT_S = FL_OUT_D, - FL_OUT_A = (1<<14), - FL_OUT_AD = FL_OUT_A | FL_OUT_D, - FL_TIMER = (1<<15), + FL_SET_CR0 = (1<<0), // + FL_SET_CR1 = (1<<1), // + FL_SET_CRn = (1<<2), // + FL_SET_CRx = FL_SET_CR0 | FL_SET_CR1 | FL_SET_CRn, // + FL_SET_CA = (1<<3), // carry + FL_READ_CA = (1<<4), // carry + FL_RC_BIT = (1<<5), + FL_RC_BIT_F = (1<<6), + FL_ENDBLOCK = (1<<7), + FL_IN_A = (1<<8), + FL_IN_A0 = (1<<9), + FL_IN_B = (1<<10), + FL_IN_C = (1<<11), + FL_IN_S = (1<<12), + FL_IN_AB = FL_IN_A | FL_IN_B, + FL_IN_SB = FL_IN_S | FL_IN_B, + FL_IN_A0B = FL_IN_A0 | FL_IN_B, + FL_IN_A0BC = FL_IN_A0 | FL_IN_B | FL_IN_C, + FL_OUT_D = (1<<13), + FL_OUT_S = FL_OUT_D, + FL_OUT_A = (1<<14), + FL_OUT_AD = FL_OUT_A | FL_OUT_D, + FL_TIMER = (1<<15), FL_CHECKEXCEPTIONS = (1<<16), - FL_EVIL = (1<<17), - FL_USE_FPU = (1<<18), - FL_LOADSTORE = (1<<19), + FL_EVIL = (1<<17), + FL_USE_FPU = (1<<18), + FL_LOADSTORE = (1<<19), }; enum @@ -60,17 +60,20 @@ enum OPTYPE_UNKNOWN , }; -enum { - OPCD_HLEFUNCTION = 1, +enum +{ + OPCD_HLEFUNCTION = 1, OPCD_COMPILEDBLOCK = 2, - OPCD_BCx = 16, - OPCD_SC = 17, - OPCD_Bx = 18, + OPCD_BCx = 16, + OPCD_SC = 17, + OPCD_Bx = 18, }; -enum { +enum +{ OP_BLR = 0x4e800020, }; + struct GekkoOPInfo { const char *opname; diff --git a/Source/Core/Core/ec_wii.h b/Source/Core/Core/ec_wii.h index 969b3b53df..0cf73d7d82 100644 --- a/Source/Core/Core/ec_wii.h +++ b/Source/Core/Core/ec_wii.h @@ -41,10 +41,10 @@ public: EcWii(); ~EcWii(); static EcWii& GetInstance(); - u32 getNgId() {return Common::swap32(BootMiiKeysBin.ng_id);} - u32 getNgKeyId() {return Common::swap32(BootMiiKeysBin.ng_key_id);} - const u8* getNgPriv() {return BootMiiKeysBin.ng_priv;} - const u8* getNgSig() {return BootMiiKeysBin.ng_sig;}; + u32 getNgId() {return Common::swap32(BootMiiKeysBin.ng_id);} + u32 getNgKeyId() {return Common::swap32(BootMiiKeysBin.ng_key_id);} + const u8* getNgPriv() {return BootMiiKeysBin.ng_priv;} + const u8* getNgSig() {return BootMiiKeysBin.ng_sig;}; private: void InitDefaults(); @@ -65,38 +65,38 @@ private: struct { - u8 creator [0x100]; // 0x000 - u8 boot1_hash [ 0x14]; // 0x100 - u8 common_key [ 0x10]; // 0x114 - u32 ng_id; // 0x124 + u8 creator [0x100]; // 0x000 + u8 boot1_hash [ 0x14]; // 0x100 + u8 common_key [ 0x10]; // 0x114 + u32 ng_id; // 0x124 union { struct { - u8 ng_priv [ 0x1e]; // 0x128 - u8 pad1 [ 0x12]; + u8 ng_priv [ 0x1e]; // 0x128 + u8 pad1 [ 0x12]; }; struct { - u8 pad2 [ 0x1c]; - u8 nand_hmac [ 0x14]; //0x144 + u8 pad2 [ 0x1c]; + u8 nand_hmac [ 0x14]; //0x144 }; }; - u8 nand_key [ 0x10]; //0x158 - u8 rng_key [ 0x10]; //0x168 - u32 unk1; //0x178 - u32 unk2; //0x17C - u8 eeprom_pad [ 0x80]; //0x180 + u8 nand_key [ 0x10]; //0x158 + u8 rng_key [ 0x10]; //0x168 + u32 unk1; //0x178 + u32 unk2; //0x17C + u8 eeprom_pad [ 0x80]; //0x180 - u32 ms_id; //0x200 - u32 ca_id; //0x204 - u32 ng_key_id; //0x208 - u8 ng_sig [ 0x3c]; //0x20c - eep_ctr_t counters [ 0x02]; //0x248 - u8 fill [ 0x18]; //0x25c - u8 korean_key [ 0x10]; //0x274 - u8 pad3 [ 0x74]; //0x284 - u16 prng_seed [ 0x02]; //0x2F8 - u8 pad4 [ 0x04]; //0x2FC + u32 ms_id; //0x200 + u32 ca_id; //0x204 + u32 ng_key_id; //0x208 + u8 ng_sig [ 0x3c]; //0x20c + eep_ctr_t counters [ 0x02]; //0x248 + u8 fill [ 0x18]; //0x25c + u8 korean_key [ 0x10]; //0x274 + u8 pad3 [ 0x74]; //0x284 + u16 prng_seed [ 0x02]; //0x2F8 + u8 pad4 [ 0x04]; //0x2FC - u8 crack_pad [0x100]; //0x300 + u8 crack_pad [0x100]; //0x300 } diff --git a/Source/Core/DiscIO/BannerLoaderWii.h b/Source/Core/DiscIO/BannerLoaderWii.h index 2d7d0e6e90..a6732e9bfa 100644 --- a/Source/Core/DiscIO/BannerLoaderWii.h +++ b/Source/Core/DiscIO/BannerLoaderWii.h @@ -31,7 +31,7 @@ class CBannerLoaderWii enum { TEXTURE_SIZE = 192 * 64 * 2, - ICON_SIZE = 48 * 48 * 2, + ICON_SIZE = 48 * 48 * 2, COMMENT_SIZE = 32 }; diff --git a/Source/Core/DiscIO/NANDContentLoader.h b/Source/Core/DiscIO/NANDContentLoader.h index 9172c85338..0312faacaa 100644 --- a/Source/Core/DiscIO/NANDContentLoader.h +++ b/Source/Core/DiscIO/NANDContentLoader.h @@ -59,10 +59,10 @@ public: enum { - TMD_VIEW_SIZE = 0x58, - TMD_HEADER_SIZE = 0x1e4, + TMD_VIEW_SIZE = 0x58, + TMD_HEADER_SIZE = 0x1E4, CONTENT_HEADER_SIZE = 0x24, - TICKET_SIZE = 0x2A4 + TICKET_SIZE = 0x2A4 }; }; diff --git a/Source/Core/DolphinWX/MemoryCards/WiiSaveCrypted.h b/Source/Core/DolphinWX/MemoryCards/WiiSaveCrypted.h index 68afad43cf..9132adf2f9 100644 --- a/Source/Core/DolphinWX/MemoryCards/WiiSaveCrypted.h +++ b/Source/Core/DolphinWX/MemoryCards/WiiSaveCrypted.h @@ -56,21 +56,21 @@ private: enum { - BLOCK_SZ = 0x40, - HDR_SZ = 0x20, - ICON_SZ = 0x1200, - BNR_SZ = 0x60a0, - FULL_BNR_MIN = 0x72a0, // BNR_SZ + 1*ICON_SZ - FULL_BNR_MAX = 0xF0A0, // BNR_SZ + 8*ICON_SZ - HEADER_SZ = 0xF0C0, // HDR_SZ + FULL_BNR_MAX - BK_LISTED_SZ = 0x70, // Size before rounding to nearest block - BK_SZ = 0x80, - FILE_HDR_SZ = 0x80, + BLOCK_SZ = 0x40, + HDR_SZ = 0x20, + ICON_SZ = 0x1200, + BNR_SZ = 0x60a0, + FULL_BNR_MIN = 0x72a0, // BNR_SZ + 1*ICON_SZ + FULL_BNR_MAX = 0xF0A0, // BNR_SZ + 8*ICON_SZ + HEADER_SZ = 0xF0C0, // HDR_SZ + FULL_BNR_MAX + BK_LISTED_SZ = 0x70, // Size before rounding to nearest block + BK_SZ = 0x80, + FILE_HDR_SZ = 0x80, - SIG_SZ = 0x40, - NG_CERT_SZ = 0x180, - AP_CERT_SZ = 0x180, - FULL_CERT_SZ = 0x3C0, // SIG_SZ + NG_CERT_SZ + AP_CERT_SZ + 0x80? + SIG_SZ = 0x40, + NG_CERT_SZ = 0x180, + AP_CERT_SZ = 0x180, + FULL_CERT_SZ = 0x3C0, // SIG_SZ + NG_CERT_SZ + AP_CERT_SZ + 0x80? BK_HDR_MAGIC = 0x426B0001, FILE_HDR_MAGIC = 0x03adf17e diff --git a/Source/Core/InputCommon/ControllerInterface/ForceFeedback/ForceFeedbackDevice.cpp b/Source/Core/InputCommon/ControllerInterface/ForceFeedback/ForceFeedbackDevice.cpp index 04f2bb505f..0c4f026a9e 100644 --- a/Source/Core/InputCommon/ControllerInterface/ForceFeedback/ForceFeedbackDevice.cpp +++ b/Source/Core/InputCommon/ControllerInterface/ForceFeedback/ForceFeedbackDevice.cpp @@ -22,14 +22,14 @@ typedef struct static const ForceType force_type_names[] = { - {GUID_ConstantForce, "Constant"}, // DICONSTANTFORCE - {GUID_RampForce, "Ramp"}, // DIRAMPFORCE - {GUID_Square, "Square"}, // DIPERIODIC ... + {GUID_ConstantForce, "Constant"}, // DICONSTANTFORCE + {GUID_RampForce, "Ramp"}, // DIRAMPFORCE + {GUID_Square, "Square"}, // DIPERIODIC ... {GUID_Sine, "Sine"}, {GUID_Triangle, "Triangle"}, {GUID_SawtoothUp, "Sawtooth Up"}, {GUID_SawtoothDown, "Sawtooth Down"}, - //{GUID_Spring, "Spring"}, // DICUSTOMFORCE ... < I think + //{GUID_Spring, "Spring"}, // DICUSTOMFORCE ... < I think //{GUID_Damper, "Damper"}, //{GUID_Inertia, "Inertia"}, //{GUID_Friction, "Friction"}, diff --git a/Source/Core/InputCommon/ControllerInterface/SDL/SDL.h b/Source/Core/InputCommon/ControllerInterface/SDL/SDL.h index f1714b253e..02c7e6d5d0 100644 --- a/Source/Core/InputCommon/ControllerInterface/SDL/SDL.h +++ b/Source/Core/InputCommon/ControllerInterface/SDL/SDL.h @@ -34,9 +34,9 @@ private: { EffectIDState() : effect(SDL_HapticEffect()), id(-1), changed(false) {} - SDL_HapticEffect effect; - int id; - bool changed; + SDL_HapticEffect effect; + int id; + bool changed; }; #endif @@ -141,13 +141,13 @@ public: std::string GetSource() const override; private: - SDL_Joystick* const m_joystick; - const int m_sdl_index; - const unsigned int m_index; + SDL_Joystick* const m_joystick; + const int m_sdl_index; + const unsigned int m_index; #ifdef USE_SDL_HAPTIC - std::list m_state_out; - SDL_Haptic* m_haptic; + std::list m_state_out; + SDL_Haptic* m_haptic; #endif }; diff --git a/Source/Core/VideoBackends/Software/RasterFont.h b/Source/Core/VideoBackends/Software/RasterFont.h index b30d99152d..00cf9eb3fb 100644 --- a/Source/Core/VideoBackends/Software/RasterFont.h +++ b/Source/Core/VideoBackends/Software/RasterFont.h @@ -13,8 +13,8 @@ public: static int debug; // some useful constants - enum {char_width = 10}; - enum {char_height = 15}; + enum {char_width = 10}; + enum {char_height = 15}; // and the happy helper functions void printString(const char *s, double x, double y, double z=0.0); diff --git a/Source/Core/VideoBackends/Software/SWCommandProcessor.h b/Source/Core/VideoBackends/Software/SWCommandProcessor.h index c2381a2d36..8273af2f31 100644 --- a/Source/Core/VideoBackends/Software/SWCommandProcessor.h +++ b/Source/Core/VideoBackends/Software/SWCommandProcessor.h @@ -17,30 +17,30 @@ namespace SWCommandProcessor // internal hardware addresses enum { - STATUS_REGISTER = 0x00, - CTRL_REGISTER = 0x02, - CLEAR_REGISTER = 0x04, - FIFO_TOKEN_REGISTER = 0x0E, - FIFO_BOUNDING_BOX_LEFT = 0x10, - FIFO_BOUNDING_BOX_RIGHT = 0x12, - FIFO_BOUNDING_BOX_TOP = 0x14, - FIFO_BOUNDING_BOX_BOTTOM = 0x16, - FIFO_BASE_LO = 0x20, - FIFO_BASE_HI = 0x22, - FIFO_END_LO = 0x24, - FIFO_END_HI = 0x26, - FIFO_HI_WATERMARK_LO = 0x28, - FIFO_HI_WATERMARK_HI = 0x2a, - FIFO_LO_WATERMARK_LO = 0x2c, - FIFO_LO_WATERMARK_HI = 0x2e, - FIFO_RW_DISTANCE_LO = 0x30, - FIFO_RW_DISTANCE_HI = 0x32, - FIFO_WRITE_POINTER_LO = 0x34, - FIFO_WRITE_POINTER_HI = 0x36, - FIFO_READ_POINTER_LO = 0x38, - FIFO_READ_POINTER_HI = 0x3A, - FIFO_BP_LO = 0x3C, - FIFO_BP_HI = 0x3E + STATUS_REGISTER = 0x00, + CTRL_REGISTER = 0x02, + CLEAR_REGISTER = 0x04, + FIFO_TOKEN_REGISTER = 0x0E, + FIFO_BOUNDING_BOX_LEFT = 0x10, + FIFO_BOUNDING_BOX_RIGHT = 0x12, + FIFO_BOUNDING_BOX_TOP = 0x14, + FIFO_BOUNDING_BOX_BOTTOM = 0x16, + FIFO_BASE_LO = 0x20, + FIFO_BASE_HI = 0x22, + FIFO_END_LO = 0x24, + FIFO_END_HI = 0x26, + FIFO_HI_WATERMARK_LO = 0x28, + FIFO_HI_WATERMARK_HI = 0x2a, + FIFO_LO_WATERMARK_LO = 0x2c, + FIFO_LO_WATERMARK_HI = 0x2e, + FIFO_RW_DISTANCE_LO = 0x30, + FIFO_RW_DISTANCE_HI = 0x32, + FIFO_WRITE_POINTER_LO = 0x34, + FIFO_WRITE_POINTER_HI = 0x36, + FIFO_READ_POINTER_LO = 0x38, + FIFO_READ_POINTER_HI = 0x3A, + FIFO_BP_LO = 0x3C, + FIFO_BP_HI = 0x3E }; // Fifo Status Register @@ -48,12 +48,12 @@ namespace SWCommandProcessor { struct { - u16 OverflowHiWatermark : 1; - u16 UnderflowLoWatermark: 1; - u16 ReadIdle : 1; // done reading - u16 CommandIdle : 1; // done processing commands - u16 Breakpoint : 1; - u16 : 11; + u16 OverflowHiWatermark : 1; + u16 UnderflowLoWatermark : 1; + u16 ReadIdle : 1; // done reading + u16 CommandIdle : 1; // done processing commands + u16 Breakpoint : 1; + u16 : 11; }; u16 Hex; UCPStatusReg() {Hex = 0; } @@ -65,13 +65,13 @@ namespace SWCommandProcessor { struct { - u16 GPReadEnable : 1; - u16 BPEnable : 1; - u16 FifoOverflowIntEnable : 1; - u16 FifoUnderflowIntEnable : 1; - u16 GPLinkEnable : 1; - u16 BreakPointIntEnable : 1; - u16 : 10; + u16 GPReadEnable : 1; + u16 BPEnable : 1; + u16 FifoOverflowIntEnable : 1; + u16 FifoUnderflowIntEnable : 1; + u16 GPLinkEnable : 1; + u16 BreakPointIntEnable : 1; + u16 : 10; }; u16 Hex; UCPCtrlReg() {Hex = 0; } @@ -83,10 +83,10 @@ namespace SWCommandProcessor { struct { - u16 ClearFifoOverflow : 1; - u16 ClearFifoUnderflow : 1; - u16 ClearMetrices : 1; - u16 : 13; + u16 ClearFifoOverflow : 1; + u16 ClearFifoUnderflow : 1; + u16 ClearMetrices : 1; + u16 : 13; }; u16 Hex; UCPClearReg() {Hex = 0; } diff --git a/Source/Core/VideoBackends/Software/SWPixelEngine.cpp b/Source/Core/VideoBackends/Software/SWPixelEngine.cpp index a747a669ed..4d2f44f96f 100644 --- a/Source/Core/VideoBackends/Software/SWPixelEngine.cpp +++ b/Source/Core/VideoBackends/Software/SWPixelEngine.cpp @@ -22,8 +22,8 @@ namespace SWPixelEngine enum { - INT_CAUSE_PE_TOKEN = 0x200, // GP Token - INT_CAUSE_PE_FINISH = 0x400, // GP Finished + INT_CAUSE_PE_TOKEN = 0x200, // GP Token + INT_CAUSE_PE_FINISH = 0x400, // GP Finished }; // STATE_TO_SAVE diff --git a/Source/Core/VideoBackends/Software/SWPixelEngine.h b/Source/Core/VideoBackends/Software/SWPixelEngine.h index 01fb49685b..4a6c6ec2aa 100644 --- a/Source/Core/VideoBackends/Software/SWPixelEngine.h +++ b/Source/Core/VideoBackends/Software/SWPixelEngine.h @@ -15,17 +15,17 @@ namespace SWPixelEngine // internal hardware addresses enum { - PE_ZCONF = 0x000, // Z Config - PE_ALPHACONF = 0x002, // Alpha Config + PE_ZCONF = 0x000, // Z Config + PE_ALPHACONF = 0x002, // Alpha Config PE_DSTALPHACONF = 0x004, // Destination Alpha Config - PE_ALPHAMODE = 0x006, // Alpha Mode Config - PE_ALPHAREAD = 0x008, // Alpha Read + PE_ALPHAMODE = 0x006, // Alpha Mode Config + PE_ALPHAREAD = 0x008, // Alpha Read PE_CTRL_REGISTER = 0x00a, // Control - PE_TOKEN_REG = 0x00e, // Token - PE_BBOX_LEFT = 0x010, // Flip Left - PE_BBOX_RIGHT = 0x012, // Flip Right - PE_BBOX_TOP = 0x014, // Flip Top - PE_BBOX_BOTTOM = 0x016, // Flip Bottom + PE_TOKEN_REG = 0x00e, // Token + PE_BBOX_LEFT = 0x010, // Flip Left + PE_BBOX_RIGHT = 0x012, // Flip Right + PE_BBOX_TOP = 0x014, // Flip Top + PE_BBOX_BOTTOM = 0x016, // Flip Bottom // NOTE: Order not verified // These indicate the number of quads that are being used as input/output for each particular stage @@ -48,10 +48,10 @@ namespace SWPixelEngine u16 Hex; struct { - u16 ZCompEnable : 1; // Z Comparator Enable - u16 Function : 3; - u16 ZUpdEnable : 1; - u16 : 11; + u16 ZCompEnable : 1; // Z Comparator Enable + u16 Function : 3; + u16 ZUpdEnable : 1; + u16 : 11; }; }; @@ -60,15 +60,15 @@ namespace SWPixelEngine u16 Hex; struct { - u16 BMMath : 1; // GX_BM_BLEND || GX_BM_SUBSTRACT - u16 BMLogic : 1; // GX_BM_LOGIC - u16 Dither : 1; - u16 ColorUpdEnable : 1; - u16 AlphaUpdEnable : 1; - u16 DstFactor : 3; - u16 SrcFactor : 3; - u16 Substract : 1; // Additive mode by default - u16 BlendOperator : 4; + u16 BMMath : 1; // GX_BM_BLEND || GX_BM_SUBSTRACT + u16 BMLogic : 1; // GX_BM_LOGIC + u16 Dither : 1; + u16 ColorUpdEnable : 1; + u16 AlphaUpdEnable : 1; + u16 DstFactor : 3; + u16 SrcFactor : 3; + u16 Substract : 1; // Additive mode by default + u16 BlendOperator : 4; }; }; @@ -77,9 +77,9 @@ namespace SWPixelEngine u16 Hex; struct { - u16 DstAlpha : 8; - u16 Enable : 1; - u16 : 7; + u16 DstAlpha : 8; + u16 Enable : 1; + u16 : 7; }; }; @@ -88,8 +88,8 @@ namespace SWPixelEngine u16 Hex; struct { - u16 Threshold : 8; - u16 CompareMode : 8; + u16 Threshold : 8; + u16 CompareMode : 8; }; }; @@ -98,8 +98,8 @@ namespace SWPixelEngine u16 Hex; struct { - u16 ReadMode : 3; - u16 : 13; + u16 ReadMode : 3; + u16 : 13; }; }; @@ -107,11 +107,11 @@ namespace SWPixelEngine { struct { - u16 PETokenEnable : 1; - u16 PEFinishEnable : 1; - u16 PEToken : 1; // write only - u16 PEFinish : 1; // write only - u16 : 12; + u16 PETokenEnable : 1; + u16 PEFinishEnable : 1; + u16 PEToken : 1; // write only + u16 PEFinish : 1; // write only + u16 : 12; }; u16 Hex; UPECtrlReg() {Hex = 0; } diff --git a/Source/Core/VideoBackends/Software/SWmain.cpp b/Source/Core/VideoBackends/Software/SWmain.cpp index 2182fdcb8f..4f60f9d4f6 100644 --- a/Source/Core/VideoBackends/Software/SWmain.cpp +++ b/Source/Core/VideoBackends/Software/SWmain.cpp @@ -41,9 +41,9 @@ static volatile u32 s_swapRequested = false; static volatile struct { - u32 xfbAddr; - u32 fbWidth; - u32 fbHeight; + u32 xfbAddr; + u32 fbWidth; + u32 fbHeight; } s_beginFieldArgs; namespace SW diff --git a/Source/Core/VideoCommon/BPMemory.h b/Source/Core/VideoCommon/BPMemory.h index ff8650bd4a..0670b49dbc 100644 --- a/Source/Core/VideoCommon/BPMemory.h +++ b/Source/Core/VideoCommon/BPMemory.h @@ -353,17 +353,17 @@ struct TevStageCombiner // if mid, sw, tw, and addprev are 0, then no indirect stage is used, mask = 0x17fe00 struct { - u32 bt : 2; // indirect tex stage ID - u32 fmt : 2; // format: ITF_X - u32 bias : 3; // ITB_X - u32 bs : 2; // ITBA_X, indicates which coordinate will become the 'bump alpha' - u32 mid : 4; // matrix id to multiply offsets with - u32 sw : 3; // ITW_X, wrapping factor for S of regular coord - u32 tw : 3; // ITW_X, wrapping factor for T of regular coord - u32 lb_utclod : 1; // use modified or unmodified texture coordinates for LOD computation - u32 fb_addprev : 1; // 1 if the texture coordinate results from the previous TEV stage should be added - u32 pad0 : 3; - u32 rid : 8; + u32 bt : 2; // Indirect tex stage ID + u32 fmt : 2; // Format: ITF_X + u32 bias : 3; // ITB_X + u32 bs : 2; // ITBA_X, indicates which coordinate will become the 'bump alpha' + u32 mid : 4; // Matrix ID to multiply offsets with + u32 sw : 3; // ITW_X, wrapping factor for S of regular coord + u32 tw : 3; // ITW_X, wrapping factor for T of regular coord + u32 lb_utclod : 1; // Use modified or unmodified texture coordinates for LOD computation + u32 fb_addprev : 1; // 1 if the texture coordinate results from the previous TEV stage should be added + u32 pad0 : 3; + u32 rid : 8; }; struct { @@ -378,7 +378,7 @@ struct TevStageCombiner { struct { - u32 texmap0 : 3; // indirect tex stage texmap + u32 texmap0 : 3; // Indirect tex stage texmap u32 texcoord0 : 3; u32 enable0 : 1; // 1 if should read from texture u32 colorchan0 : 3; // RAS1_CC_X @@ -404,10 +404,10 @@ union TEXSCALE { struct { - u32 ss0 : 4; // indirect tex stage 0, 2^(-ss0) - u32 ts0 : 4; // indirect tex stage 0 - u32 ss1 : 4; // indirect tex stage 1 - u32 ts1 : 4; // indirect tex stage 1 + u32 ss0 : 4; // Indirect tex stage 0, 2^(-ss0) + u32 ts0 : 4; // Indirect tex stage 0 + u32 ss1 : 4; // Indirect tex stage 1 + u32 ts1 : 4; // Indirect tex stage 1 u32 pad : 8; u32 rid : 8; }; @@ -421,8 +421,8 @@ union RAS1_IREF { struct { - u32 bi0 : 3; // indirect tex stage 0 ntexmap - u32 bc0 : 3; // indirect tex stage 0 ntexcoord + u32 bi0 : 3; // Indirect tex stage 0 ntexmap + u32 bc0 : 3; // Indirect tex stage 0 ntexcoord u32 bi1 : 3; u32 bc1 : 3; u32 bi2 : 3; @@ -444,15 +444,15 @@ union TexMode0 { struct { - u32 wrap_s : 2; - u32 wrap_t : 2; + u32 wrap_s : 2; + u32 wrap_t : 2; u32 mag_filter : 1; u32 min_filter : 3; - u32 diag_lod : 1; - s32 lod_bias : 8; - u32 pad0 : 2; - u32 max_aniso : 2; - u32 lod_clamp : 1; + u32 diag_lod : 1; + s32 lod_bias : 8; + u32 pad0 : 2; + u32 max_aniso : 2; + u32 lod_clamp : 1; }; u32 hex; }; @@ -469,8 +469,8 @@ union TexImage0 { struct { - u32 width : 10; //actually w-1 - u32 height : 10; //actually h-1 + u32 width : 10; // Actually w-1 + u32 height : 10; // Actually h-1 u32 format : 4; }; u32 hex; @@ -479,10 +479,10 @@ union TexImage1 { struct { - u32 tmem_even : 15; // tmem line index for even LODs - u32 cache_width : 3; + u32 tmem_even : 15; // TMEM line index for even LODs + u32 cache_width : 3; u32 cache_height : 3; - u32 image_type : 1; // 1 if this texture is managed manually (0 means we'll autofetch the texture data whenever it changes) + u32 image_type : 1; // 1 if this texture is managed manually (0 means we'll autofetch the texture data whenever it changes) }; u32 hex; }; @@ -491,8 +491,8 @@ union TexImage2 { struct { - u32 tmem_odd : 15; // tmem line index for odd LODs - u32 cache_width : 3; + u32 tmem_odd : 15; // tmem line index for odd LODs + u32 cache_width : 3; u32 cache_height : 3; }; u32 hex; @@ -536,9 +536,9 @@ union ZTex2 }; // Z-texture types (formats) -#define TEV_ZTEX_TYPE_U8 0 -#define TEV_ZTEX_TYPE_U16 1 -#define TEV_ZTEX_TYPE_U24 2 +#define TEV_ZTEX_TYPE_U8 0 +#define TEV_ZTEX_TYPE_U16 1 +#define TEV_ZTEX_TYPE_U24 2 #define TEV_ZTEX_DISABLE 0 #define TEV_ZTEX_ADD 1 @@ -565,13 +565,13 @@ union GenMode { struct { - u32 numtexgens : 4; // 0xF - u32 numcolchans : 5; // 0x1E0 + u32 numtexgens : 4; // 0xF + u32 numcolchans : 5; // 0x1E0 u32 multisampling : 1; // 0x200 - u32 numtevstages : 4; // 0x3C00 - u32 cullmode : 2; // 0xC000 - u32 numindstages : 3; // 0x30000 - u32 zfreeze : 5; //0x3C0000 + u32 numtevstages : 4; // 0x3C00 + u32 cullmode : 2; // 0xC000 + u32 numindstages : 3; // 0x30000 + u32 zfreeze : 5; //0x3C0000 }; u32 hex; }; @@ -580,12 +580,12 @@ union LPSize { struct { - u32 linesize : 8; // in 1/6th pixels - u32 pointsize : 8; // in 1/6th pixels - u32 lineoff : 3; - u32 pointoff : 3; + u32 linesize : 8; // in 1/6th pixels + u32 pointsize : 8; // in 1/6th pixels + u32 lineoff : 3; + u32 pointoff : 3; u32 lineaspect : 1; // interlacing: adjust for pixels having AR of 1/2 - u32 padding : 1; + u32 padding : 1; }; u32 hex; }; @@ -630,13 +630,13 @@ union BlendMode { u32 blendenable : 1; u32 logicopenable : 1; - u32 dither : 1; - u32 colorupdate : 1; - u32 alphaupdate : 1; - u32 dstfactor : 3; //BLEND_ONE, BLEND_INV_SRc etc - u32 srcfactor : 3; - u32 subtract : 1; - u32 logicmode : 4; + u32 dither : 1; + u32 colorupdate : 1; + u32 alphaupdate : 1; + u32 dstfactor : 3; //BLEND_ONE, BLEND_INV_SRc etc + u32 srcfactor : 3; + u32 subtract : 1; + u32 logicmode : 4; }; u32 hex; }; @@ -666,10 +666,10 @@ union FogParam3 struct { u32 c_mant : 11; - u32 c_exp : 8; + u32 c_exp : 8; u32 c_sign : 1; - u32 proj : 1; // 0 - perspective, 1 - orthographic - u32 fsel : 3; // 0 - off, 2 - linear, 4 - exp, 5 - exp2, 6 - backward exp, 7 - backward exp2 + u32 proj : 1; // 0 - perspective, 1 - orthographic + u32 fsel : 3; // 0 - off, 2 - linear, 4 - exp, 5 - exp2, 6 - backward exp, 7 - backward exp2 }; // amount to subtract from eyespacez after range adjustment @@ -703,10 +703,10 @@ struct FogRangeParams { struct { - u32 Center : 10; // viewport center + 342 + u32 Center : 10; // viewport center + 342 u32 Enabled : 1; - u32 unused : 13; - u32 regid : 8; + u32 unused : 13; + u32 regid : 8; }; u32 hex; }; @@ -739,9 +739,9 @@ union ZMode { struct { - u32 testenable : 1; - u32 func : 3; - u32 updateenable : 1; //size? + u32 testenable : 1; + u32 func : 3; + u32 updateenable : 1; //size? }; u32 hex; }; @@ -776,34 +776,34 @@ union FieldMask u32 hex; }; -#define PIXELFMT_RGB8_Z24 0 -#define PIXELFMT_RGBA6_Z24 1 +#define PIXELFMT_RGB8_Z24 0 +#define PIXELFMT_RGBA6_Z24 1 #define PIXELFMT_RGB565_Z16 2 -#define PIXELFMT_Z24 3 -#define PIXELFMT_Y8 4 -#define PIXELFMT_U8 5 -#define PIXELFMT_V8 6 -#define PIXELFMT_YUV420 7 +#define PIXELFMT_Z24 3 +#define PIXELFMT_Y8 4 +#define PIXELFMT_U8 5 +#define PIXELFMT_V8 6 +#define PIXELFMT_YUV420 7 -#define ZC_LINEAR 0 -#define ZC_NEAR 1 -#define ZC_MID 2 -#define ZC_FAR 3 +#define ZC_LINEAR 0 +#define ZC_NEAR 1 +#define ZC_MID 2 +#define ZC_FAR 3 // It seems these Z formats aren't supported/were removed ? #define ZC_INV_LINEAR 4 -#define ZC_INV_NEAR 5 -#define ZC_INV_MID 6 -#define ZC_INV_FAR 7 +#define ZC_INV_NEAR 5 +#define ZC_INV_MID 6 +#define ZC_INV_FAR 7 union PE_CONTROL { struct { - u32 pixel_format : 3; // PIXELFMT_X - u32 zformat : 3; // Z Compression for 16bit Z format - u32 early_ztest : 1; // 1: before tex stage - u32 unused : 17; - u32 rid : 8; + u32 pixel_format : 3; // PIXELFMT_X + u32 zformat : 3; // Z Compression for 16bit Z format + u32 early_ztest : 1; // 1: before tex stage + u32 unused : 17; + u32 rid : 8; }; u32 hex; @@ -816,12 +816,12 @@ union TCInfo { struct { - u32 scale_minus_1 : 16; - u32 range_bias : 1; + u32 scale_minus_1 : 16; + u32 range_bias : 1; u32 cylindric_wrap : 1; // These bits only have effect in the s field of TCoordInfo - u32 line_offset : 1; - u32 point_offset : 1; + u32 line_offset : 1; + u32 point_offset : 1; }; u32 hex; }; @@ -837,9 +837,9 @@ union ColReg u32 hex; struct { - s32 a : 11; - u32 : 1; - s32 b : 11; + s32 a : 11; + u32 : 1; + s32 b : 11; u32 type : 1; }; }; @@ -926,18 +926,18 @@ union UPE_Copy u32 Hex; struct { - u32 clamp0 : 1; // if set clamp top - u32 clamp1 : 1; // if set clamp bottom - u32 yuv : 1; // if set, color conversion from RGB to YUV - u32 target_pixel_format : 4; // realformat is (fmt/2)+((fmt&1)*8).... for some reason the msb is the lsb (pattern: cycling right shift) - u32 gamma : 2; // gamma correction.. 0 = 1.0 ; 1 = 1.7 ; 2 = 2.2 ; 3 is reserved - u32 half_scale : 1; // "mipmap" filter... 0 = no filter (scale 1:1) ; 1 = box filter (scale 2:1) - u32 scale_invert : 1; // if set vertical scaling is on - u32 clear : 1; - u32 frame_to_field : 2; // 0 progressive ; 1 is reserved ; 2 = interlaced (even lines) ; 3 = interlaced 1 (odd lines) - u32 copy_to_xfb : 1; - u32 intensity_fmt : 1; // if set, is an intensity format (I4,I8,IA4,IA8) - u32 auto_conv : 1; // if 0 automatic color conversion by texture format and pixel type + u32 clamp0 : 1; // if set clamp top + u32 clamp1 : 1; // if set clamp bottom + u32 yuv : 1; // if set, color conversion from RGB to YUV + u32 target_pixel_format : 4; // realformat is (fmt/2)+((fmt&1)*8).... for some reason the msb is the lsb (pattern: cycling right shift) + u32 gamma : 2; // gamma correction.. 0 = 1.0 ; 1 = 1.7 ; 2 = 2.2 ; 3 is reserved + u32 half_scale : 1; // "mipmap" filter... 0 = no filter (scale 1:1) ; 1 = box filter (scale 2:1) + u32 scale_invert : 1; // if set vertical scaling is on + u32 clear : 1; + u32 frame_to_field : 2; // 0 progressive ; 1 is reserved ; 2 = interlaced (even lines) ; 3 = interlaced 1 (odd lines) + u32 copy_to_xfb : 1; + u32 intensity_fmt : 1; // if set, is an intensity format (I4,I8,IA4,IA8) + u32 auto_conv : 1; // if 0 automatic color conversion by texture format and pixel type }; u32 tp_realFormat() { return target_pixel_format / 2 + (target_pixel_format & 1) * 8; @@ -1011,7 +1011,7 @@ struct BPMemory u32 copyTexDest; //4b// 4b == CopyAddress (GXDispCopy and GXTexCopy use it) u32 unknown6; //4c u32 copyMipMapStrideChannels; // 4d usually set to 4 when dest is single channel, 8 when dest is 2 channel, 16 when dest is RGBA - // also, doubles whenever mipmap box filter option is set (excent on RGBA). Probably to do with number of bytes to look at when smoothing + // also, doubles whenever mipmap box filter option is set (excent on RGBA). Probably to do with number of bytes to look at when smoothing u32 dispcopyyscale; //4e u32 clearcolorAR; //4f u32 clearcolorGB; //50 diff --git a/Source/Core/VideoCommon/CPMemory.h b/Source/Core/VideoCommon/CPMemory.h index 0647c2ae39..87c6918c80 100644 --- a/Source/Core/VideoCommon/CPMemory.h +++ b/Source/Core/VideoCommon/CPMemory.h @@ -10,39 +10,39 @@ // Vertex array numbers enum { - ARRAY_POSITION = 0, - ARRAY_NORMAL = 1, - ARRAY_COLOR = 2, - ARRAY_COLOR2 = 3, - ARRAY_TEXCOORD0 = 4, + ARRAY_POSITION = 0, + ARRAY_NORMAL = 1, + ARRAY_COLOR = 2, + ARRAY_COLOR2 = 3, + ARRAY_TEXCOORD0 = 4, }; // Vertex components enum { NOT_PRESENT = 0, - DIRECT = 1, - INDEX8 = 2, - INDEX16 = 3, + DIRECT = 1, + INDEX8 = 2, + INDEX16 = 3, }; enum { - FORMAT_UBYTE = 0, // 2 Cmp - FORMAT_BYTE = 1, // 3 Cmp - FORMAT_USHORT = 2, - FORMAT_SHORT = 3, - FORMAT_FLOAT = 4, + FORMAT_UBYTE = 0, // 2 Cmp + FORMAT_BYTE = 1, // 3 Cmp + FORMAT_USHORT = 2, + FORMAT_SHORT = 3, + FORMAT_FLOAT = 4, }; enum { - FORMAT_16B_565 = 0, // NA - FORMAT_24B_888 = 1, - FORMAT_32B_888x = 2, - FORMAT_16B_4444 = 3, - FORMAT_24B_6666 = 4, - FORMAT_32B_8888 = 5, + FORMAT_16B_565 = 0, // NA + FORMAT_24B_888 = 1, + FORMAT_32B_888x = 2, + FORMAT_16B_4444 = 3, + FORMAT_24B_6666 = 4, + FORMAT_32B_8888 = 5, }; enum @@ -60,33 +60,33 @@ union TVtxDesc { // 0: not present // 1: present - u32 PosMatIdx : 1; - u32 Tex0MatIdx : 1; - u32 Tex1MatIdx : 1; - u32 Tex2MatIdx : 1; - u32 Tex3MatIdx : 1; - u32 Tex4MatIdx : 1; - u32 Tex5MatIdx : 1; - u32 Tex6MatIdx : 1; - u32 Tex7MatIdx : 1; + u32 PosMatIdx : 1; + u32 Tex0MatIdx : 1; + u32 Tex1MatIdx : 1; + u32 Tex2MatIdx : 1; + u32 Tex3MatIdx : 1; + u32 Tex4MatIdx : 1; + u32 Tex5MatIdx : 1; + u32 Tex6MatIdx : 1; + u32 Tex7MatIdx : 1; // 00: not present // 01: direct // 10: 8 bit index // 11: 16 bit index - u32 Position : 2; - u32 Normal : 2; - u32 Color0 : 2; - u32 Color1 : 2; - u32 Tex0Coord : 2; - u32 Tex1Coord : 2; - u32 Tex2Coord : 2; - u32 Tex3Coord : 2; - u32 Tex4Coord : 2; - u32 Tex5Coord : 2; - u32 Tex6Coord : 2; - u32 Tex7Coord : 2; - u32 :31; + u32 Position : 2; + u32 Normal : 2; + u32 Color0 : 2; + u32 Color1 : 2; + u32 Tex0Coord : 2; + u32 Tex1Coord : 2; + u32 Tex2Coord : 2; + u32 Tex3Coord : 2; + u32 Tex4Coord : 2; + u32 Tex5Coord : 2; + u32 Tex6Coord : 2; + u32 Tex7Coord : 2; + u32 :31; }; struct @@ -101,25 +101,25 @@ union UVAT_group0 struct { // 0:8 - u32 PosElements : 1; - u32 PosFormat : 3; - u32 PosFrac : 5; + u32 PosElements : 1; + u32 PosFormat : 3; + u32 PosFrac : 5; // 9:12 - u32 NormalElements : 1; - u32 NormalFormat : 3; + u32 NormalElements : 1; + u32 NormalFormat : 3; // 13:16 - u32 Color0Elements : 1; - u32 Color0Comp : 3; + u32 Color0Elements : 1; + u32 Color0Comp : 3; // 17:20 - u32 Color1Elements : 1; - u32 Color1Comp : 3; + u32 Color1Elements : 1; + u32 Color1Comp : 3; // 21:29 - u32 Tex0CoordElements : 1; - u32 Tex0CoordFormat : 3; - u32 Tex0Frac : 5; + u32 Tex0CoordElements : 1; + u32 Tex0CoordFormat : 3; + u32 Tex0Frac : 5; // 30:31 - u32 ByteDequant : 1; - u32 NormalIndex3 : 1; + u32 ByteDequant : 1; + u32 NormalIndex3 : 1; }; }; @@ -129,22 +129,22 @@ union UVAT_group1 struct { // 0:8 - u32 Tex1CoordElements : 1; - u32 Tex1CoordFormat : 3; - u32 Tex1Frac : 5; + u32 Tex1CoordElements : 1; + u32 Tex1CoordFormat : 3; + u32 Tex1Frac : 5; // 9:17 - u32 Tex2CoordElements : 1; - u32 Tex2CoordFormat : 3; - u32 Tex2Frac : 5; + u32 Tex2CoordElements : 1; + u32 Tex2CoordFormat : 3; + u32 Tex2Frac : 5; // 18:26 - u32 Tex3CoordElements : 1; - u32 Tex3CoordFormat : 3; - u32 Tex3Frac : 5; + u32 Tex3CoordElements : 1; + u32 Tex3CoordFormat : 3; + u32 Tex3Frac : 5; // 27:30 - u32 Tex4CoordElements : 1; - u32 Tex4CoordFormat : 3; + u32 Tex4CoordElements : 1; + u32 Tex4CoordFormat : 3; // - u32 : 1; + u32 : 1; }; }; @@ -154,19 +154,19 @@ union UVAT_group2 struct { // 0:4 - u32 Tex4Frac : 5; + u32 Tex4Frac : 5; // 5:13 - u32 Tex5CoordElements : 1; - u32 Tex5CoordFormat : 3; - u32 Tex5Frac : 5; + u32 Tex5CoordElements : 1; + u32 Tex5CoordFormat : 3; + u32 Tex5Frac : 5; // 14:22 - u32 Tex6CoordElements : 1; - u32 Tex6CoordFormat : 3; - u32 Tex6Frac : 5; + u32 Tex6CoordElements : 1; + u32 Tex6CoordFormat : 3; + u32 Tex6Frac : 5; // 23:31 - u32 Tex7CoordElements : 1; - u32 Tex7CoordFormat : 3; - u32 Tex7Frac : 5; + u32 Tex7CoordElements : 1; + u32 Tex7CoordFormat : 3; + u32 Tex7Frac : 5; }; }; diff --git a/Source/Core/VideoCommon/CommandProcessor.h b/Source/Core/VideoCommon/CommandProcessor.h index 6d480ef0bc..e9fe9fedbe 100644 --- a/Source/Core/VideoCommon/CommandProcessor.h +++ b/Source/Core/VideoCommon/CommandProcessor.h @@ -27,48 +27,48 @@ extern volatile bool interruptFinishWaiting; // internal hardware addresses enum { - STATUS_REGISTER = 0x00, - CTRL_REGISTER = 0x02, - CLEAR_REGISTER = 0x04, - PERF_SELECT = 0x06, - FIFO_TOKEN_REGISTER = 0x0E, - FIFO_BOUNDING_BOX_LEFT = 0x10, - FIFO_BOUNDING_BOX_RIGHT = 0x12, - FIFO_BOUNDING_BOX_TOP = 0x14, - FIFO_BOUNDING_BOX_BOTTOM = 0x16, - FIFO_BASE_LO = 0x20, - FIFO_BASE_HI = 0x22, - FIFO_END_LO = 0x24, - FIFO_END_HI = 0x26, - FIFO_HI_WATERMARK_LO = 0x28, - FIFO_HI_WATERMARK_HI = 0x2a, - FIFO_LO_WATERMARK_LO = 0x2c, - FIFO_LO_WATERMARK_HI = 0x2e, - FIFO_RW_DISTANCE_LO = 0x30, - FIFO_RW_DISTANCE_HI = 0x32, - FIFO_WRITE_POINTER_LO = 0x34, - FIFO_WRITE_POINTER_HI = 0x36, - FIFO_READ_POINTER_LO = 0x38, - FIFO_READ_POINTER_HI = 0x3A, - FIFO_BP_LO = 0x3C, - FIFO_BP_HI = 0x3E, - XF_RASBUSY_L = 0x40, - XF_RASBUSY_H = 0x42, - XF_CLKS_L = 0x44, - XF_CLKS_H = 0x46, - XF_WAIT_IN_L = 0x48, - XF_WAIT_IN_H = 0x4a, - XF_WAIT_OUT_L = 0x4c, - XF_WAIT_OUT_H = 0x4e, - VCACHE_METRIC_CHECK_L = 0x50, - VCACHE_METRIC_CHECK_H = 0x52, - VCACHE_METRIC_MISS_L = 0x54, - VCACHE_METRIC_MISS_H = 0x56, - VCACHE_METRIC_STALL_L = 0x58, - VCACHE_METRIC_STALL_H = 0x5A, - CLKS_PER_VTX_IN_L = 0x60, - CLKS_PER_VTX_IN_H = 0x62, - CLKS_PER_VTX_OUT = 0x64, + STATUS_REGISTER = 0x00, + CTRL_REGISTER = 0x02, + CLEAR_REGISTER = 0x04, + PERF_SELECT = 0x06, + FIFO_TOKEN_REGISTER = 0x0E, + FIFO_BOUNDING_BOX_LEFT = 0x10, + FIFO_BOUNDING_BOX_RIGHT = 0x12, + FIFO_BOUNDING_BOX_TOP = 0x14, + FIFO_BOUNDING_BOX_BOTTOM = 0x16, + FIFO_BASE_LO = 0x20, + FIFO_BASE_HI = 0x22, + FIFO_END_LO = 0x24, + FIFO_END_HI = 0x26, + FIFO_HI_WATERMARK_LO = 0x28, + FIFO_HI_WATERMARK_HI = 0x2a, + FIFO_LO_WATERMARK_LO = 0x2c, + FIFO_LO_WATERMARK_HI = 0x2e, + FIFO_RW_DISTANCE_LO = 0x30, + FIFO_RW_DISTANCE_HI = 0x32, + FIFO_WRITE_POINTER_LO = 0x34, + FIFO_WRITE_POINTER_HI = 0x36, + FIFO_READ_POINTER_LO = 0x38, + FIFO_READ_POINTER_HI = 0x3A, + FIFO_BP_LO = 0x3C, + FIFO_BP_HI = 0x3E, + XF_RASBUSY_L = 0x40, + XF_RASBUSY_H = 0x42, + XF_CLKS_L = 0x44, + XF_CLKS_H = 0x46, + XF_WAIT_IN_L = 0x48, + XF_WAIT_IN_H = 0x4a, + XF_WAIT_OUT_L = 0x4c, + XF_WAIT_OUT_H = 0x4e, + VCACHE_METRIC_CHECK_L = 0x50, + VCACHE_METRIC_CHECK_H = 0x52, + VCACHE_METRIC_MISS_L = 0x54, + VCACHE_METRIC_MISS_H = 0x56, + VCACHE_METRIC_STALL_L = 0x58, + VCACHE_METRIC_STALL_H = 0x5A, + CLKS_PER_VTX_IN_L = 0x60, + CLKS_PER_VTX_IN_H = 0x62, + CLKS_PER_VTX_OUT = 0x64, }; enum @@ -82,12 +82,12 @@ union UCPStatusReg { struct { - u16 OverflowHiWatermark : 1; - u16 UnderflowLoWatermark: 1; - u16 ReadIdle : 1; - u16 CommandIdle : 1; - u16 Breakpoint : 1; - u16 : 11; + u16 OverflowHiWatermark : 1; + u16 UnderflowLoWatermark : 1; + u16 ReadIdle : 1; + u16 CommandIdle : 1; + u16 Breakpoint : 1; + u16 : 11; }; u16 Hex; UCPStatusReg() {Hex = 0; } @@ -99,13 +99,13 @@ union UCPCtrlReg { struct { - u16 GPReadEnable : 1; - u16 BPEnable : 1; - u16 FifoOverflowIntEnable : 1; - u16 FifoUnderflowIntEnable : 1; - u16 GPLinkEnable : 1; - u16 BPInt : 1; - u16 : 10; + u16 GPReadEnable : 1; + u16 BPEnable : 1; + u16 FifoOverflowIntEnable : 1; + u16 FifoUnderflowIntEnable : 1; + u16 GPLinkEnable : 1; + u16 BPInt : 1; + u16 : 10; }; u16 Hex; UCPCtrlReg() {Hex = 0; } @@ -117,10 +117,10 @@ union UCPClearReg { struct { - u16 ClearFifoOverflow : 1; - u16 ClearFifoUnderflow : 1; - u16 ClearMetrices : 1; - u16 : 13; + u16 ClearFifoOverflow : 1; + u16 ClearFifoUnderflow : 1; + u16 ClearMetrices : 1; + u16 : 13; }; u16 Hex; UCPClearReg() {Hex = 0; } diff --git a/Source/Core/VideoCommon/Debugger.h b/Source/Core/VideoCommon/Debugger.h index f8eb6105a1..645043e84c 100644 --- a/Source/Core/VideoCommon/Debugger.h +++ b/Source/Core/VideoCommon/Debugger.h @@ -27,27 +27,27 @@ public: }; enum PauseEvent { - NOT_PAUSE = 0, - NEXT_FRAME = 1<<0, - NEXT_FLUSH = 1<<1, + NOT_PAUSE = 0, + NEXT_FRAME = 1<<0, + NEXT_FLUSH = 1<<1, - NEXT_PIXEL_SHADER_CHANGE = 1<<2, - NEXT_VERTEX_SHADER_CHANGE = 1<<3, - NEXT_TEXTURE_CHANGE = 1<<4, - NEXT_NEW_TEXTURE = 1<<5, + NEXT_PIXEL_SHADER_CHANGE = 1<<2, + NEXT_VERTEX_SHADER_CHANGE = 1<<3, + NEXT_TEXTURE_CHANGE = 1<<4, + NEXT_NEW_TEXTURE = 1<<5, - NEXT_XFB_CMD = 1<<6, // TODO - NEXT_EFB_CMD = 1<<7, // TODO + NEXT_XFB_CMD = 1<<6, // TODO + NEXT_EFB_CMD = 1<<7, // TODO - NEXT_MATRIX_CMD = 1<<8, // TODO - NEXT_VERTEX_CMD = 1<<9, // TODO - NEXT_TEXTURE_CMD = 1<<10, // TODO - NEXT_LIGHT_CMD = 1<<11, // TODO - NEXT_FOG_CMD = 1<<12, // TODO + NEXT_MATRIX_CMD = 1<<8, // TODO + NEXT_VERTEX_CMD = 1<<9, // TODO + NEXT_TEXTURE_CMD = 1<<10, // TODO + NEXT_LIGHT_CMD = 1<<11, // TODO + NEXT_FOG_CMD = 1<<12, // TODO - NEXT_SET_TLUT = 1<<13, // TODO + NEXT_SET_TLUT = 1<<13, // TODO - NEXT_ERROR = 1<<14, // TODO + NEXT_ERROR = 1<<14, // TODO }; extern GFXDebuggerBase *g_pdebugger; diff --git a/Source/Core/VideoCommon/DriverDetails.h b/Source/Core/VideoCommon/DriverDetails.h index 9f95744db9..b9707b3062 100644 --- a/Source/Core/VideoCommon/DriverDetails.h +++ b/Source/Core/VideoCommon/DriverDetails.h @@ -9,10 +9,10 @@ namespace DriverDetails // Enum of supported operating systems enum OS { - OS_ALL = (1 << 0), + OS_ALL = (1 << 0), OS_WINDOWS = (1 << 1), - OS_LINUX = (1 << 2), - OS_OSX = (1 << 3), + OS_LINUX = (1 << 2), + OS_OSX = (1 << 3), OS_ANDROID = (1 << 4), }; // Enum of known vendors @@ -36,21 +36,21 @@ namespace DriverDetails enum Driver { DRIVER_ALL = 0, - DRIVER_NVIDIA, // Official Nvidia, including mobile GPU - DRIVER_NOUVEAU, // OSS nouveau - DRIVER_ATI, // Official ATI - DRIVER_R600, // OSS Radeon - DRIVER_INTEL, // Official Intel - DRIVER_I965, // OSS Intel - DRIVER_ARM_4XX, // Official Mali driver - DRIVER_ARM_T6XX, // Official Mali driver - DRIVER_LIMA, // OSS Mali driver + DRIVER_NVIDIA, // Official Nvidia, including mobile GPU + DRIVER_NOUVEAU, // OSS nouveau + DRIVER_ATI, // Official ATI + DRIVER_R600, // OSS Radeon + DRIVER_INTEL, // Official Intel + DRIVER_I965, // OSS Intel + DRIVER_ARM_4XX, // Official Mali driver + DRIVER_ARM_T6XX, // Official Mali driver + DRIVER_LIMA, // OSS Mali driver DRIVER_QUALCOMM_3XX, // Official Adreno driver 3xx DRIVER_QUALCOMM_2XX, // Official Adreno driver 2xx - DRIVER_FREEDRENO, // OSS Adreno driver - DRIVER_IMGTEC, // OSS PowerVR driver - DRIVER_VIVANTE, // Official vivante driver - DRIVER_UNKNOWN // Unknown driver, default to official hardware driver + DRIVER_FREEDRENO, // OSS Adreno driver + DRIVER_IMGTEC, // OSS PowerVR driver + DRIVER_VIVANTE, // Official vivante driver + DRIVER_UNKNOWN // Unknown driver, default to official hardware driver }; // Enum of known bugs diff --git a/Source/Core/VideoCommon/LightingShaderGen.h b/Source/Core/VideoCommon/LightingShaderGen.h index d50716cfcd..10c38dae91 100644 --- a/Source/Core/VideoCommon/LightingShaderGen.h +++ b/Source/Core/VideoCommon/LightingShaderGen.h @@ -30,12 +30,12 @@ */ struct LightingUidData { - u32 matsource : 4; // 4x1 bit - u32 enablelighting : 4; // 4x1 bit - u32 ambsource : 4; // 4x1 bit - u32 diffusefunc : 8; // 4x2 bits - u32 attnfunc : 8; // 4x2 bits - u32 light_mask : 32; // 4x8 bits + u32 matsource : 4; // 4x1 bit + u32 enablelighting : 4; // 4x1 bit + u32 ambsource : 4; // 4x1 bit + u32 diffusefunc : 8; // 4x2 bits + u32 attnfunc : 8; // 4x2 bits + u32 light_mask : 32; // 4x8 bits }; diff --git a/Source/Core/VideoCommon/OnScreenDisplay.cpp b/Source/Core/VideoCommon/OnScreenDisplay.cpp index 90e5c008ef..9f14a90526 100644 --- a/Source/Core/VideoCommon/OnScreenDisplay.cpp +++ b/Source/Core/VideoCommon/OnScreenDisplay.cpp @@ -19,8 +19,8 @@ namespace OSD struct Message { - Message() {} - Message(const std::string& s, u32 ts) : str(s), timestamp(ts) {} + Message() {} + Message(const std::string& s, u32 ts) : str(s), timestamp(ts) {} std::string str; u32 timestamp; diff --git a/Source/Core/VideoCommon/PixelEngine.cpp b/Source/Core/VideoCommon/PixelEngine.cpp index 32d91f4310..b075a296d9 100644 --- a/Source/Core/VideoCommon/PixelEngine.cpp +++ b/Source/Core/VideoCommon/PixelEngine.cpp @@ -27,10 +27,10 @@ union UPEZConfReg u16 Hex; struct { - u16 ZCompEnable : 1; // Z Comparator Enable - u16 Function : 3; - u16 ZUpdEnable : 1; - u16 : 11; + u16 ZCompEnable : 1; // Z Comparator Enable + u16 Function : 3; + u16 ZUpdEnable : 1; + u16 : 11; }; }; @@ -39,15 +39,15 @@ union UPEAlphaConfReg u16 Hex; struct { - u16 BMMath : 1; // GX_BM_BLEND || GX_BM_SUBSTRACT - u16 BMLogic : 1; // GX_BM_LOGIC - u16 Dither : 1; - u16 ColorUpdEnable : 1; - u16 AlphaUpdEnable : 1; - u16 DstFactor : 3; - u16 SrcFactor : 3; - u16 Substract : 1; // Additive mode by default - u16 BlendOperator : 4; + u16 BMMath : 1; // GX_BM_BLEND || GX_BM_SUBSTRACT + u16 BMLogic : 1; // GX_BM_LOGIC + u16 Dither : 1; + u16 ColorUpdEnable : 1; + u16 AlphaUpdEnable : 1; + u16 DstFactor : 3; + u16 SrcFactor : 3; + u16 Substract : 1; // Additive mode by default + u16 BlendOperator : 4; }; }; @@ -56,9 +56,9 @@ union UPEDstAlphaConfReg u16 Hex; struct { - u16 DstAlpha : 8; - u16 Enable : 1; - u16 : 7; + u16 DstAlpha : 8; + u16 Enable : 1; + u16 : 7; }; }; @@ -67,8 +67,8 @@ union UPEAlphaModeConfReg u16 Hex; struct { - u16 Threshold : 8; - u16 CompareMode : 8; + u16 Threshold : 8; + u16 CompareMode : 8; }; }; @@ -77,11 +77,11 @@ union UPECtrlReg { struct { - u16 PETokenEnable : 1; - u16 PEFinishEnable : 1; - u16 PEToken : 1; // write only - u16 PEFinish : 1; // write only - u16 : 12; + u16 PETokenEnable : 1; + u16 PEFinishEnable : 1; + u16 PEToken : 1; // write only + u16 PEFinish : 1; // write only + u16 : 12; }; u16 Hex; UPECtrlReg() {Hex = 0; } @@ -89,13 +89,13 @@ union UPECtrlReg }; // STATE_TO_SAVE -static UPEZConfReg m_ZConf; -static UPEAlphaConfReg m_AlphaConf; -static UPEDstAlphaConfReg m_DstAlphaConf; -static UPEAlphaModeConfReg m_AlphaModeConf; -static UPEAlphaReadReg m_AlphaRead; -static UPECtrlReg m_Control; -//static u16 m_Token; // token value most recently encountered +static UPEZConfReg m_ZConf; +static UPEAlphaConfReg m_AlphaConf; +static UPEDstAlphaConfReg m_DstAlphaConf; +static UPEAlphaModeConfReg m_AlphaModeConf; +static UPEAlphaReadReg m_AlphaRead; +static UPECtrlReg m_Control; +//static u16 m_Token; // token value most recently encountered volatile u32 g_bSignalTokenInterrupt; volatile u32 g_bSignalFinishInterrupt; @@ -111,8 +111,8 @@ bool bbox_active; enum { - INT_CAUSE_PE_TOKEN = 0x200, // GP Token - INT_CAUSE_PE_FINISH = 0x400, // GP Finished + INT_CAUSE_PE_TOKEN = 0x200, // GP Token + INT_CAUSE_PE_FINISH = 0x400, // GP Finished }; void DoState(PointerWrap &p) diff --git a/Source/Core/VideoCommon/PixelEngine.h b/Source/Core/VideoCommon/PixelEngine.h index c420dbe9f1..e05aa8cfe7 100644 --- a/Source/Core/VideoCommon/PixelEngine.h +++ b/Source/Core/VideoCommon/PixelEngine.h @@ -11,32 +11,32 @@ class PointerWrap; // internal hardware addresses enum { - PE_ZCONF = 0x00, // Z Config - PE_ALPHACONF = 0x02, // Alpha Config - PE_DSTALPHACONF = 0x04, // Destination Alpha Config - PE_ALPHAMODE = 0x06, // Alpha Mode Config - PE_ALPHAREAD = 0x08, // Alpha Read + PE_ZCONF = 0x00, // Z Config + PE_ALPHACONF = 0x02, // Alpha Config + PE_DSTALPHACONF = 0x04, // Destination Alpha Config + PE_ALPHAMODE = 0x06, // Alpha Mode Config + PE_ALPHAREAD = 0x08, // Alpha Read PE_CTRL_REGISTER = 0x0a, // Control - PE_TOKEN_REG = 0x0e, // Token - PE_BBOX_LEFT = 0x10, // Flip Left - PE_BBOX_RIGHT = 0x12, // Flip Right - PE_BBOX_TOP = 0x14, // Flip Top - PE_BBOX_BOTTOM = 0x16, // Flip Bottom + PE_TOKEN_REG = 0x0e, // Token + PE_BBOX_LEFT = 0x10, // Flip Left + PE_BBOX_RIGHT = 0x12, // Flip Right + PE_BBOX_TOP = 0x14, // Flip Top + PE_BBOX_BOTTOM = 0x16, // Flip Bottom // NOTE: Order not verified // These indicate the number of quads that are being used as input/output for each particular stage - PE_PERF_ZCOMP_INPUT_ZCOMPLOC_L = 0x18, - PE_PERF_ZCOMP_INPUT_ZCOMPLOC_H = 0x1a, - PE_PERF_ZCOMP_OUTPUT_ZCOMPLOC_L = 0x1c, - PE_PERF_ZCOMP_OUTPUT_ZCOMPLOC_H = 0x1e, - PE_PERF_ZCOMP_INPUT_L = 0x20, - PE_PERF_ZCOMP_INPUT_H = 0x22, - PE_PERF_ZCOMP_OUTPUT_L = 0x24, - PE_PERF_ZCOMP_OUTPUT_H = 0x26, - PE_PERF_BLEND_INPUT_L = 0x28, - PE_PERF_BLEND_INPUT_H = 0x2a, - PE_PERF_EFB_COPY_CLOCKS_L = 0x2c, - PE_PERF_EFB_COPY_CLOCKS_H = 0x2e, + PE_PERF_ZCOMP_INPUT_ZCOMPLOC_L = 0x18, + PE_PERF_ZCOMP_INPUT_ZCOMPLOC_H = 0x1a, + PE_PERF_ZCOMP_OUTPUT_ZCOMPLOC_L = 0x1c, + PE_PERF_ZCOMP_OUTPUT_ZCOMPLOC_H = 0x1e, + PE_PERF_ZCOMP_INPUT_L = 0x20, + PE_PERF_ZCOMP_INPUT_H = 0x22, + PE_PERF_ZCOMP_OUTPUT_L = 0x24, + PE_PERF_ZCOMP_OUTPUT_H = 0x26, + PE_PERF_BLEND_INPUT_L = 0x28, + PE_PERF_BLEND_INPUT_H = 0x2a, + PE_PERF_EFB_COPY_CLOCKS_L = 0x2c, + PE_PERF_EFB_COPY_CLOCKS_H = 0x2e, }; namespace PixelEngine diff --git a/Source/Core/VideoCommon/VertexLoader.h b/Source/Core/VideoCommon/VertexLoader.h index 59f94774b8..afe9ddd36b 100644 --- a/Source/Core/VideoCommon/VertexLoader.h +++ b/Source/Core/VideoCommon/VertexLoader.h @@ -105,8 +105,8 @@ public: private: enum { - NRM_ZERO = 0, - NRM_ONE = 1, + NRM_ZERO = 0, + NRM_ONE = 1, NRM_THREE = 3, }; diff --git a/Source/Core/VideoCommon/VertexShaderGen.h b/Source/Core/VideoCommon/VertexShaderGen.h index 0bc4d8d832..f48d1c69fb 100644 --- a/Source/Core/VideoCommon/VertexShaderGen.h +++ b/Source/Core/VideoCommon/VertexShaderGen.h @@ -59,26 +59,26 @@ struct vertex_shader_uid_data { u32 NumValues() const { return sizeof(vertex_shader_uid_data); } - u32 components : 23; - u32 numTexGens : 4; - u32 numColorChans : 2; + u32 components : 23; + u32 numTexGens : 4; + u32 numColorChans : 2; u32 dualTexTrans_enabled : 1; - u32 pixel_lighting : 1; - u32 pad0 : 1; + u32 pixel_lighting : 1; + u32 pad0 : 1; u32 texMtxInfo_n_projection : 16; // Stored separately to guarantee that the texMtxInfo struct is 8 bits wide struct { - u32 inputform : 2; - u32 texgentype : 3; - u32 sourcerow : 5; + u32 inputform : 2; + u32 texgentype : 3; + u32 sourcerow : 5; u32 embosssourceshift : 3; - u32 embosslightshift : 3; + u32 embosslightshift : 3; } texMtxInfo[8]; struct { - u32 index : 6; + u32 index : 6; u32 normalize : 1; - u32 pad : 1; + u32 pad : 1; } postMtxInfo[8]; LightingUidData lighting; diff --git a/Source/Core/VideoCommon/VideoCommon.h b/Source/Core/VideoCommon/VideoCommon.h index ef36b1fed6..a9a0d443cb 100644 --- a/Source/Core/VideoCommon/VideoCommon.h +++ b/Source/Core/VideoCommon/VideoCommon.h @@ -85,8 +85,8 @@ struct TargetRectangle : public MathUtil::Rectangle typedef enum { API_OPENGL = 1, - API_D3D = 2, - API_NONE = 3 + API_D3D = 2, + API_NONE = 3 } API_TYPE; inline u32 RGBA8ToRGBA6ToRGBA8(u32 src) diff --git a/Source/Core/VideoCommon/VideoConfig.h b/Source/Core/VideoCommon/VideoConfig.h index 08702e84ca..b626c4e926 100644 --- a/Source/Core/VideoCommon/VideoConfig.h +++ b/Source/Core/VideoCommon/VideoConfig.h @@ -24,14 +24,16 @@ #define CONF_SAVETARGETS 8 #define CONF_SAVESHADERS 16 -enum AspectMode { - ASPECT_AUTO = 0, +enum AspectMode +{ + ASPECT_AUTO = 0, ASPECT_FORCE_16_9 = 1, - ASPECT_FORCE_4_3 = 2, - ASPECT_STRETCH = 3, + ASPECT_FORCE_4_3 = 2, + ASPECT_STRETCH = 3, }; -enum EFBScale { +enum EFBScale +{ SCALE_FORCE_INTEGRAL = -1, SCALE_AUTO, SCALE_AUTO_INTEGRAL,