Merge pull request #5174 from lioncash/vi

VideoInterface: Minor changes

Source/Core/Core/HW/VideoInterface.cpp

@@ -42,8 +42,8 @@ static UVIFBInfoRegister m_XFBInfoTop;
 static UVIFBInfoRegister m_XFBInfoBottom;
 static UVIFBInfoRegister m_3DFBInfoTop;  // Start making your stereoscopic demos! :p
 static UVIFBInfoRegister m_3DFBInfoBottom;
-static UVIInterruptRegister m_InterruptRegister[4];
+static std::array<UVIInterruptRegister, 4> m_InterruptRegister;
-static UVILatchRegister m_LatchRegister[2];
+static std::array<UVILatchRegister, 2> m_LatchRegister;
 static PictureConfigurationRegister m_PictureConfiguration;
 static UVIHorizontalScaling m_HorizontalScaling;
 static SVIFilterCoefTables m_FilterCoefTables;
@@ -57,9 +57,9 @@ static UVIBorderBlankRegister m_BorderHBlank;
 
 static u32 s_target_refresh_rate = 0;
 
-static u32 s_clock_freqs[2] = {
+static constexpr std::array<u32, 2> s_clock_freqs{{
-    27000000UL, 54000000UL,
+    27000000, 54000000,
-};
+}};
 
 static u64 s_ticks_last_line_start;  // number of ticks when the current full scanline started
 static u32 s_half_line_count;        // number of halflines that have occurred for this full frame
@@ -164,8 +164,7 @@ void Preset(bool _bNTSC)
   m_InterruptRegister[2].Hex = 0;
   m_InterruptRegister[3].Hex = 0;
 
-  m_LatchRegister[0].Hex = 0;
+  m_LatchRegister = {};
-  m_LatchRegister[1].Hex = 0;
 
   m_PictureConfiguration.STD = 40;
   m_PictureConfiguration.WPL = 40;
@@ -201,11 +200,13 @@ void Init()
 
 void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
 {
-  struct
+  struct MappedVar
   {
     u32 addr;
     u16* ptr;
-  } directly_mapped_vars[] = {
+  };
+
+  std::array<MappedVar, 46> directly_mapped_vars{{
       {VI_VERTICAL_TIMING, &m_VerticalTimingRegister.Hex},
       {VI_HORIZONTAL_TIMING_0_HI, &m_HTiming0.Hi},
       {VI_HORIZONTAL_TIMING_0_LO, &m_HTiming0.Lo},
@@ -252,7 +253,7 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
       {VI_FBWIDTH, &m_FBWidth.Hex},
       {VI_BORDER_BLANK_END, &m_BorderHBlank.Lo},
       {VI_BORDER_BLANK_START, &m_BorderHBlank.Hi},
-  };
+  }};
 
   // Declare all the boilerplate direct MMIOs.
   for (auto& mapped_var : directly_mapped_vars)
@@ -261,11 +262,7 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
                    MMIO::DirectWrite<u16>(mapped_var.ptr));
   }
 
-  struct
+  std::array<MappedVar, 8> update_params_on_read_vars{{
-  {
-    u32 addr;
-    u16* ptr;
-  } update_params_on_read_vars[] = {
       {VI_VERTICAL_TIMING, &m_VerticalTimingRegister.Hex},
       {VI_HORIZONTAL_TIMING_0_HI, &m_HTiming0.Hi},
       {VI_HORIZONTAL_TIMING_0_LO, &m_HTiming0.Lo},
@@ -274,7 +271,7 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
       {VI_VBLANK_TIMING_EVEN_HI, &m_VBlankTimingEven.Hi},
       {VI_VBLANK_TIMING_EVEN_LO, &m_VBlankTimingEven.Lo},
       {VI_CLOCK, &m_Clock},
-  };
+  }};
 
   // Declare all the MMIOs that update timing params.
   for (auto& mapped_var : update_params_on_read_vars)
@@ -391,10 +388,7 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
                    {
                      // shuffle2 clear all data, reset to default vals, and enter idle mode
                      m_DisplayControlRegister.RST = 0;
-                     for (UVIInterruptRegister& reg : m_InterruptRegister)
+                     m_InterruptRegister = {};
-                     {
-                       reg.Hex = 0;
-                     }
                      UpdateInterrupts();
                    }
 

Source/Core/Core/HW/VideoInterface.h

@@ -81,20 +81,21 @@ enum
 
 union UVIVerticalTimingRegister
 {
-  u16 Hex;
+  u16 Hex = 0;
   struct
   {
     u16 EQU : 4;   // Equalization pulse in half lines
     u16 ACV : 10;  // Active video in lines per field (seems always zero)
     u16 : 2;
   };
-  UVIVerticalTimingRegister(u16 _hex) { Hex = _hex; }
+
-  UVIVerticalTimingRegister() { Hex = 0; }
+  UVIVerticalTimingRegister() = default;
+  explicit UVIVerticalTimingRegister(u16 hex) : Hex{hex} {}
 };
 
 union UVIDisplayControlRegister
 {
-  u16 Hex;
+  u16 Hex = 0;
   struct
   {
     u16 ENB : 1;  // Enables video timing generation and data request
@@ -107,8 +108,9 @@ union UVIDisplayControlRegister
     u16 FMT : 2;  // 0: NTSC, 1: PAL, 2: MPAL, 3: Debug
     u16 : 6;
   };
-  UVIDisplayControlRegister(u16 _hex) { Hex = _hex; }
+
-  UVIDisplayControlRegister() { Hex = 0; }
+  UVIDisplayControlRegister() = default;
+  explicit UVIDisplayControlRegister(u16 hex) : Hex{hex} {}
 };
 
 union UVIHorizontalTiming0
@@ -248,7 +250,7 @@ union PictureConfigurationRegister
 
 union UVIHorizontalScaling
 {
-  u16 Hex;
+  u16 Hex = 0;
   struct
   {
     u16 STP : 9;  // Horizontal stepping size (U1.8 Scaler Value) (0x160 Works for 320)
@@ -256,8 +258,9 @@ union UVIHorizontalScaling
     u16 HS_EN : 1;  // Enable Horizontal Scaling
     u16 : 3;
   };
-  UVIHorizontalScaling(u16 _hex) { Hex = _hex; }
+
-  UVIHorizontalScaling() { Hex = 0; }
+  UVIHorizontalScaling() = default;
+  explicit UVIHorizontalScaling(u16 hex) : Hex{hex} {}
 };
 
 // Used for tables 0-2