x64EmitterTest: Fix linting issues
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58a0d0f117
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@ -35,7 +35,10 @@ const std::vector<NamedReg> reg8names{
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};
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};
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const std::vector<NamedReg> reg8hnames{
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const std::vector<NamedReg> reg8hnames{
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{AH, "ah"}, {BH, "bh"}, {CH, "ch"}, {DH, "dh"},
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{AH, "ah"},
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{BH, "bh"},
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{CH, "ch"},
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{DH, "dh"},
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};
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};
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const std::vector<NamedReg> reg16names{
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const std::vector<NamedReg> reg16names{
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@ -306,9 +309,11 @@ TEST_F(x64EmitterTest, CMOVcc_Register)
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emitter->CMOVcc(32, RAX, R(R12), cc.cc);
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emitter->CMOVcc(32, RAX, R(R12), cc.cc);
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emitter->CMOVcc(16, RAX, R(R12), cc.cc);
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emitter->CMOVcc(16, RAX, R(R12), cc.cc);
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ExpectDisassembly("cmov" + cc.name + " rax, r12 "
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ExpectDisassembly("cmov" + cc.name +
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" rax, r12 "
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"cmov" +
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"cmov" +
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cc.name + " eax, r12d "
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cc.name +
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" eax, r12d "
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"cmov" +
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"cmov" +
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cc.name + " ax, r12w");
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cc.name + " ax, r12w");
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}
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}
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@ -379,9 +384,11 @@ TEST_F(x64EmitterTest, MOVNT_DQ_PS_PD)
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emitter->MOVNTDQ(MatR(RAX), r.reg);
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emitter->MOVNTDQ(MatR(RAX), r.reg);
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emitter->MOVNTPS(MatR(RAX), r.reg);
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emitter->MOVNTPS(MatR(RAX), r.reg);
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emitter->MOVNTPD(MatR(RAX), r.reg);
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emitter->MOVNTPD(MatR(RAX), r.reg);
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ExpectDisassembly("movntdq dqword ptr ds:[rax], " + r.name + " "
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ExpectDisassembly("movntdq dqword ptr ds:[rax], " + r.name +
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" "
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"movntps dqword ptr ds:[rax], " +
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"movntps dqword ptr ds:[rax], " +
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r.name + " "
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r.name +
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" "
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"movntpd dqword ptr ds:[rax], " +
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"movntpd dqword ptr ds:[rax], " +
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r.name);
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r.name);
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}
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}
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@ -576,7 +583,8 @@ TEST_F(x64EmitterTest, BSWAP)
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int bits;
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int bits;
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std::vector<NamedReg> regs;
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std::vector<NamedReg> regs;
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} regsets[] = {
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} regsets[] = {
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{32, reg32names}, {64, reg64names},
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{32, reg32names},
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{64, reg64names},
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};
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};
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for (const auto& regset : regsets)
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for (const auto& regset : regsets)
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for (const auto& r : regset.regs)
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for (const auto& r : regset.regs)
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@ -889,7 +897,8 @@ TWO_OP_SSE_TEST(PMOVZXDQ, "qword")
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std::string out_name; \
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std::string out_name; \
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std::string size; \
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std::string size; \
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} regsets[] = { \
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} regsets[] = { \
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{32, reg32names, "eax", "dword"}, {64, reg64names, "rax", "qword"}, \
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{32, reg32names, "eax", "dword"}, \
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{64, reg64names, "rax", "qword"}, \
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}; \
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}; \
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for (const auto& regset : regsets) \
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for (const auto& regset : regsets) \
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for (const auto& r : regset.regs) \
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for (const auto& r : regset.regs) \
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@ -921,7 +930,8 @@ VEX_RMR_TEST(BZHI)
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std::string out_name; \
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std::string out_name; \
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std::string size; \
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std::string size; \
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} regsets[] = { \
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} regsets[] = { \
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{32, reg32names, "eax", "dword"}, {64, reg64names, "rax", "qword"}, \
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{32, reg32names, "eax", "dword"}, \
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{64, reg64names, "rax", "qword"}, \
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}; \
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}; \
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for (const auto& regset : regsets) \
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for (const auto& regset : regsets) \
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for (const auto& r : regset.regs) \
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for (const auto& r : regset.regs) \
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@ -952,7 +962,8 @@ VEX_RRM_TEST(ANDN)
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std::string out_name; \
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std::string out_name; \
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std::string size; \
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std::string size; \
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} regsets[] = { \
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} regsets[] = { \
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{32, reg32names, "eax", "dword"}, {64, reg64names, "rax", "qword"}, \
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{32, reg32names, "eax", "dword"}, \
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{64, reg64names, "rax", "qword"}, \
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}; \
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}; \
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for (const auto& regset : regsets) \
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for (const auto& regset : regsets) \
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for (const auto& r : regset.regs) \
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for (const auto& r : regset.regs) \
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@ -981,7 +992,8 @@ VEX_RM_TEST(BLSI)
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std::string out_name; \
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std::string out_name; \
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std::string size; \
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std::string size; \
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} regsets[] = { \
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} regsets[] = { \
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{32, reg32names, "eax", "dword"}, {64, reg64names, "rax", "qword"}, \
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{32, reg32names, "eax", "dword"}, \
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{64, reg64names, "rax", "qword"}, \
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}; \
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}; \
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for (const auto& regset : regsets) \
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for (const auto& regset : regsets) \
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for (const auto& r : regset.regs) \
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for (const auto& r : regset.regs) \
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