x64EmitterTest: Fix linting issues

This commit is contained in:
Sintendo 2018-09-14 23:21:59 +02:00
parent 58a0d0f117
commit 8a93dd0105
1 changed files with 26 additions and 14 deletions

View File

@ -35,7 +35,10 @@ const std::vector<NamedReg> reg8names{
}; };
const std::vector<NamedReg> reg8hnames{ const std::vector<NamedReg> reg8hnames{
{AH, "ah"}, {BH, "bh"}, {CH, "ch"}, {DH, "dh"}, {AH, "ah"},
{BH, "bh"},
{CH, "ch"},
{DH, "dh"},
}; };
const std::vector<NamedReg> reg16names{ const std::vector<NamedReg> reg16names{
@ -306,9 +309,11 @@ TEST_F(x64EmitterTest, CMOVcc_Register)
emitter->CMOVcc(32, RAX, R(R12), cc.cc); emitter->CMOVcc(32, RAX, R(R12), cc.cc);
emitter->CMOVcc(16, RAX, R(R12), cc.cc); emitter->CMOVcc(16, RAX, R(R12), cc.cc);
ExpectDisassembly("cmov" + cc.name + " rax, r12 " ExpectDisassembly("cmov" + cc.name +
" rax, r12 "
"cmov" + "cmov" +
cc.name + " eax, r12d " cc.name +
" eax, r12d "
"cmov" + "cmov" +
cc.name + " ax, r12w"); cc.name + " ax, r12w");
} }
@ -379,9 +384,11 @@ TEST_F(x64EmitterTest, MOVNT_DQ_PS_PD)
emitter->MOVNTDQ(MatR(RAX), r.reg); emitter->MOVNTDQ(MatR(RAX), r.reg);
emitter->MOVNTPS(MatR(RAX), r.reg); emitter->MOVNTPS(MatR(RAX), r.reg);
emitter->MOVNTPD(MatR(RAX), r.reg); emitter->MOVNTPD(MatR(RAX), r.reg);
ExpectDisassembly("movntdq dqword ptr ds:[rax], " + r.name + " " ExpectDisassembly("movntdq dqword ptr ds:[rax], " + r.name +
" "
"movntps dqword ptr ds:[rax], " + "movntps dqword ptr ds:[rax], " +
r.name + " " r.name +
" "
"movntpd dqword ptr ds:[rax], " + "movntpd dqword ptr ds:[rax], " +
r.name); r.name);
} }
@ -576,7 +583,8 @@ TEST_F(x64EmitterTest, BSWAP)
int bits; int bits;
std::vector<NamedReg> regs; std::vector<NamedReg> regs;
} regsets[] = { } regsets[] = {
{32, reg32names}, {64, reg64names}, {32, reg32names},
{64, reg64names},
}; };
for (const auto& regset : regsets) for (const auto& regset : regsets)
for (const auto& r : regset.regs) for (const auto& r : regset.regs)
@ -889,7 +897,8 @@ TWO_OP_SSE_TEST(PMOVZXDQ, "qword")
std::string out_name; \ std::string out_name; \
std::string size; \ std::string size; \
} regsets[] = { \ } regsets[] = { \
{32, reg32names, "eax", "dword"}, {64, reg64names, "rax", "qword"}, \ {32, reg32names, "eax", "dword"}, \
{64, reg64names, "rax", "qword"}, \
}; \ }; \
for (const auto& regset : regsets) \ for (const auto& regset : regsets) \
for (const auto& r : regset.regs) \ for (const auto& r : regset.regs) \
@ -921,7 +930,8 @@ VEX_RMR_TEST(BZHI)
std::string out_name; \ std::string out_name; \
std::string size; \ std::string size; \
} regsets[] = { \ } regsets[] = { \
{32, reg32names, "eax", "dword"}, {64, reg64names, "rax", "qword"}, \ {32, reg32names, "eax", "dword"}, \
{64, reg64names, "rax", "qword"}, \
}; \ }; \
for (const auto& regset : regsets) \ for (const auto& regset : regsets) \
for (const auto& r : regset.regs) \ for (const auto& r : regset.regs) \
@ -952,7 +962,8 @@ VEX_RRM_TEST(ANDN)
std::string out_name; \ std::string out_name; \
std::string size; \ std::string size; \
} regsets[] = { \ } regsets[] = { \
{32, reg32names, "eax", "dword"}, {64, reg64names, "rax", "qword"}, \ {32, reg32names, "eax", "dword"}, \
{64, reg64names, "rax", "qword"}, \
}; \ }; \
for (const auto& regset : regsets) \ for (const auto& regset : regsets) \
for (const auto& r : regset.regs) \ for (const auto& r : regset.regs) \
@ -981,7 +992,8 @@ VEX_RM_TEST(BLSI)
std::string out_name; \ std::string out_name; \
std::string size; \ std::string size; \
} regsets[] = { \ } regsets[] = { \
{32, reg32names, "eax", "dword"}, {64, reg64names, "rax", "qword"}, \ {32, reg32names, "eax", "dword"}, \
{64, reg64names, "rax", "qword"}, \
}; \ }; \
for (const auto& regset : regsets) \ for (const auto& regset : regsets) \
for (const auto& r : regset.regs) \ for (const auto& r : regset.regs) \