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Quick fix to get Monster Hunter Tri working. 

Minor changes resulting from code review comments.

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6004 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
skidau 2010-07-30 16:54:16 +00:00
parent 1fb47e6393
commit 84b5824670
7 changed files with 42 additions and 31 deletions
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28
Source/Core/Core/Src/HW/Memmap.cpp
View File

@ -421,7 +421,13 @@ u32 Read_Instruction(const u32 em_address)
u32 Read_Opcode_JIT(u32 _Address)
{
#ifdef FAST_ICACHE
if (bMMU && !bFakeVMEM && (_Address >> 28) == 0x7)
if (bMMU && !bFakeVMEM &&
(_Address >> 28) != 0x0 &&
(_Address >> 28) != 0x8 &&
(_Address >> 28) != 0x9 &&
(_Address >> 28) != 0xC &&
(_Address >> 28) != 0xD
)
{
_Address = Memory::TranslateAddress(_Address, FLAG_OPCODE);
if (_Address == 0)
@ -634,13 +640,6 @@ u8 *GetPointer(const u32 _Address)
else
return 0;
case 0x7E:
case 0x7F:
if (bFakeVMEM)
return (u8*)(((char*)m_pVirtualFakeVMEM) + (_Address & RAM_MASK));
else
return 0;
case 0xE0:
if (_Address < (0xE0000000 + L1_CACHE_SIZE))
return GetCachePtr() + (_Address & L1_CACHE_MASK);
@ -654,14 +653,17 @@ u8 *GetPointer(const u32 _Address)
case 0xCD:
_dbg_assert_msg_(MEMMAP, 0, "Memory", "GetPointer from IO Bridge doesnt work");
return NULL;
//case 0x47: TODO
case 0x7B:
case 0xFF:
break;
default:
if (bFakeVMEM)
{
return (u8*)(((char*)m_pVirtualFakeVMEM) + (_Address & RAM_MASK));
}
else
{
if (!PanicYesNo("Unknown pointer address prefix %02X, report this to the devs: 0x%08X \n Continue?", (_Address >> 24), _Address))
Crash();
return 0;
}
break;
}
return NULL;

2
Source/Core/Core/Src/HW/Memmap.h
View File

@ -112,7 +112,7 @@ inline u32 ReadFast32(const u32 _Address)
// used by interpreter to read instructions, uses iCache
u32 Read_Opcode(const u32 _Address);
// used by JIT to read instructions, uses iCacheJIT
// used by JIT to read instructions
u32 Read_Opcode_JIT(const u32 _Address);
// used by JIT. uses iCacheJIT. Reads in the "Locked cache" mode
u32 Read_Opcode_JIT_LC(const u32 _Address);

14
Source/Core/Core/Src/HW/MemmapFunctions.cpp
View File

@ -185,7 +185,8 @@ inline void ReadFromHardware(T &_var, u32 em_address, u32 effective_address, Mem
{
_var = bswap((*(const T*)&m_pL1Cache[em_address & L1_CACHE_MASK]));
}
else if (bFakeVMEM && ((em_address &0xF0000000) == 0x70000000))
else if (bFakeVMEM && ((em_address &0xF0000000) == 0x70000000) ||
bFakeVMEM && ((em_address &0xF0000000) == 0x40000000))
{
// fake VMEM
_var = bswap((*(const T*)&m_pFakeVMEM[em_address & FAKEVMEM_MASK]));
@ -286,7 +287,8 @@ inline void WriteToHardware(u32 em_address, const T data, u32 effective_address,
*(T*)&m_pL1Cache[em_address & L1_CACHE_MASK] = bswap(data);
return;
}
else if (bFakeVMEM && ((em_address &0xF0000000) == 0x70000000))
else if (bFakeVMEM && ((em_address &0xF0000000) == 0x70000000) ||
bFakeVMEM && ((em_address &0xF0000000) == 0x40000000))
{
// fake VMEM
*(T*)&m_pFakeVMEM[em_address & FAKEVMEM_MASK] = bswap(data);
@ -324,7 +326,12 @@ u32 Read_Opcode(u32 _Address)
return 0x00000000;
}
if (Core::g_CoreStartupParameter.bMMU && (_Address >> 28) == 0x7)
if (Core::g_CoreStartupParameter.bMMU &&
(_Address >> 28) != 0x0 &&
(_Address >> 28) != 0x8 &&
(_Address >> 28) != 0x9 &&
(_Address >> 28) != 0xC &&
(_Address >> 28) != 0xD)
{
// TODO: Check for MSR instruction address translation flag before translating
u32 tlb_addr = Memory::TranslateAddress(_Address, FLAG_OPCODE);
@ -667,6 +674,7 @@ typedef struct tlb_entry
u8 flags;
} tlb_entry;
// TODO: tlb needs to be in ppcState for save-state purposes.
tlb_entry tlb[NUM_TLBS][TLB_SIZE/TLB_WAYS][TLB_WAYS];
u32 LookupTLBPageAddress(const XCheckTLBFlag _Flag, const u32 vpa, u32 *paddr)

18
Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp
View File

@ -428,7 +428,13 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
if (em_address == 0)
PanicAlert("ERROR : Trying to compile at 0. LR=%08x", LR);
if (Core::g_CoreStartupParameter.bMMU && (em_address >> 28) == 0x7)
if (Core::g_CoreStartupParameter.bMMU &&
(em_address >> 28) != 0x0 &&
(em_address >> 28) != 0x8 &&
(em_address >> 28) != 0x9 &&
(em_address >> 28) != 0xC &&
(em_address >> 28) != 0xD
)
{
if (!Memory::TranslateAddress(em_address, Memory::FLAG_OPCODE))
{
@ -551,13 +557,6 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
if (!ops[i].skip)
{
if (js.memcheck && (opinfo->flags & FL_LOADSTORE))
{
// If a memory exception occurs, the exception handler will read
// from PC. Update PC with the latest value in case that happens.
MOV(32, M(&PC), Imm32(ops[i].address));
}
if (js.memcheck && (opinfo->flags & FL_USE_FPU))
{
//This instruction uses FPU - needs to add FP exception bailout
@ -579,6 +578,9 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
TEST(32, M(&PowerPC::ppcState.Exceptions), Imm32(EXCEPTION_DSI));
FixupBranch noMemException = J_CC(CC_Z);
// If a memory exception occurs, the exception handler will read
// from PC. Update PC with the latest value in case that happens.
MOV(32, M(&PC), Imm32(ops[i].address));
WriteExceptionExit();
SetJumpTarget(noMemException);
}

1
Source/Core/Core/Src/PowerPC/Jit64/Jit.h
View File

@ -80,7 +80,6 @@ private:
bool isLastInstruction;
bool memcheck;
bool broken_block;
int fifoBytesThisBlock;

2
Source/Core/Core/Src/PowerPC/JitCommon/JitCache.cpp
View File

@ -127,7 +127,7 @@ bool JitBlock::ContainsAddress(u32 em_address)
// is full and when saving and loading states.
void JitBlockCache::Clear()
{
Core::DisplayMessage("Cleared code cache.", 3000);
Core::DisplayMessage("Clearing code cache.", 3000);
for (int i = 0; i < num_blocks; i++)
{
DestroyBlock(i, false);

4
Source/Core/Core/Src/PowerPC/PPCCache.cpp
View File

@ -22,8 +22,8 @@
namespace PowerPC
{
u32 plru_mask[8] = {11,11,19,19,37,37,69,69};
u32 plru_value[8] = {11,3,17,1,36,4,64,0};
const u32 plru_mask[8] = {11,11,19,19,37,37,69,69};
const u32 plru_value[8] = {11,3,17,1,36,4,64,0};
InstructionCache::InstructionCache()
{