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Condition guessing please review.. 

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@2868 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
nakeee 2009-04-05 08:59:18 +00:00
parent b19309fdb3
commit 82880f96da
1 changed files with 11 additions and 10 deletions
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21
Source/Plugins/Plugin_DSP_LLE-testing/Src/DSPInterpreter.cpp
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@ -78,10 +78,14 @@ s8 GetMultiplyModifier()
{ {
return(1); return(1);
} }
return(2); return(2);
} }
// 0x02 - overflow????
// 0x04 - Zero bit
// 0x08 - Sign bit
// 0x40 - Logical Zero bit
bool CheckCondition(u8 _Condition) bool CheckCondition(u8 _Condition)
{ {
bool taken = false; bool taken = false;
@ -90,49 +94,46 @@ bool CheckCondition(u8 _Condition)
{ {
case 0x0: //NS - NOT SIGN case 0x0: //NS - NOT SIGN
if ((!(g_dsp.r[R_SR] & 0x02)) && (!(g_dsp.r[R_SR] & 0x08))) if (!(g_dsp.r[R_SR] & 0x08))
taken = true; taken = true;
break; break;
case 0x1: // S - SIGN case 0x1: // S - SIGN
if ((!(g_dsp.r[R_SR] & 0x02)) && (g_dsp.r[R_SR] & 0x08)) if (g_dsp.r[R_SR] & 0x08)
taken = true; taken = true;
break; break;
case 0x2: // G - GREATER case 0x2: // G - GREATER
if (!(g_dsp.r[R_SR] & 0x08)) if ( (!(g_dsp.r[R_SR] & 0x02) || !(g_dsp.r[R_SR] & 0x04)) && !(g_dsp.r[R_SR] & 0x08))
taken = true; taken = true;
break; break;
case 0x3: // LE - LESS EQUAL case 0x3: // LE - LESS EQUAL
if ((g_dsp.r[R_SR] & 0x02) || (g_dsp.r[R_SR] & 0x04) || (g_dsp.r[R_SR] & 0x08)) if ((g_dsp.r[R_SR] & 0x02) || (g_dsp.r[R_SR] & 0x04) || (g_dsp.r[R_SR] & 0x08))
taken = true; taken = true;
break; break;
case 0x4: // NZ - NOT ZERO case 0x4: // NZ - NOT ZERO
if (!(g_dsp.r[R_SR] & 0x04)) if (!(g_dsp.r[R_SR] & 0x04))
taken = true; taken = true;
break; break;
case 0x5: // Z - ZERO case 0x5: // Z - ZERO
if (g_dsp.r[R_SR] & 0x04) if (g_dsp.r[R_SR] & 0x04)
taken = true; taken = true;
break; break;
case 0x6: // L - LESS case 0x6: // L - LESS
if ((g_dsp.r[R_SR] & 0x02) || (g_dsp.r[R_SR] & 0x08))
taken = true;
break; break;
case 0x7: // GE - GREATER EQUAL case 0x7: // GE - GREATER EQUAL
if ( (!(g_dsp.r[R_SR] & 0x02) || (g_dsp.r[R_SR] & 0x04)) && !(g_dsp.r[R_SR] & 0x08))
break; break;
case 0xc: // LNZ - LOGIC NOT ZERO case 0xc: // LNZ - LOGIC NOT ZERO