dsplle - small optimization for my previous commit + some cleaning
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@7589 8ced0084-cf51-0410-be5f-012b33b47a6e
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@ -80,7 +80,7 @@ void DSPEmitter::ClearIRAM()
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void DSPEmitter::ClearIRAMandDSPJITCodespaceReset()
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{
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ResetCodePtr();
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ClearCodeSpace();
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CompileDispatcher();
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stubEntryPoint = CompileStub();
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@ -82,7 +82,6 @@ public:
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void popExtValueToReg();
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void pushExtValueFromMem(u16 dreg, u16 sreg);
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void pushExtValueFromMem2(u16 dreg, u16 sreg);
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void zeroWriteBackLog(const UDSPInstruction opc);
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// Ext commands
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void l(const UDSPInstruction opc);
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@ -957,7 +957,6 @@ void DSPEmitter::inc(const UDSPInstruction opc)
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else
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{
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set_long_acc(dreg);
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Update_SR_Register64_Carry(EAX, tmp1);//why is this still done?
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}
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gpr.putXReg(tmp1);
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#else
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@ -41,24 +41,19 @@ static void ReJitConditional(const UDSPInstruction opc, DSPEmitter& emitter)
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case 0x0: // GE - Greater Equal
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case 0x1: // L - Less
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emitter.MOV(16, R(EDX), R(EAX));
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emitter.SHR(16, R(EDX), Imm8(3)); //SR_SIGN flag
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emitter.SHR(16, R(EAX), Imm8(1)); //SR_OVERFLOW flag
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emitter.SHL(16, R(EDX), Imm8(2));
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emitter.XOR(16, R(EAX), R(EDX));
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emitter.TEST(16, R(EAX), Imm16(1));
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emitter.TEST(16, R(EAX), Imm16(8));
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break;
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case 0x2: // G - Greater
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case 0x3: // LE - Less Equal
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emitter.MOV(16, R(EDX), R(EAX));
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emitter.MOV(16, R(ECX), R(EAX));
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emitter.SHR(16, R(EDX), Imm8(3)); //SR_SIGN flag
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emitter.SHR(16, R(EAX), Imm8(1)); //SR_OVERFLOW flag
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emitter.SHL(16, R(EDX), Imm8(2));
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emitter.XOR(16, R(EAX), R(EDX));
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emitter.NOT(16, R(EAX));
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emitter.SHR(16, R(ECX), Imm8(2)); //SR_ARITH_ZERO
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emitter.NOT(16, R(ECX));
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emitter.AND(16, R(EAX), R(ECX));
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emitter.NOT(16, R(EAX));
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emitter.TEST(16, R(EAX), Imm16(1));
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emitter.SHL(16, R(ECX), Imm8(1));
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emitter.OR(16, R(EAX), R(ECX));
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emitter.TEST(16, R(EAX), Imm16(8));
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break;
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case 0x4: // NZ - Not Zero
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case 0x5: // Z - Zero
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@ -76,14 +71,13 @@ static void ReJitConditional(const UDSPInstruction opc, DSPEmitter& emitter)
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case 0xb: // ?
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emitter.MOV(16, R(EDX), R(EAX));
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emitter.MOV(16, R(ECX), R(EAX));
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emitter.SHR(16, R(EDX), Imm8(4)); //SR_OVER_S32 flag
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emitter.SHR(16, R(EAX), Imm8(5)); //SR_TOP2BITS flag
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emitter.SHR(16, R(EDX), Imm8(1));
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emitter.OR(16, R(EAX), R(EDX));
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emitter.SHR(16, R(ECX), Imm8(2)); //SR_ARITH_ZERO
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emitter.SHL(16, R(ECX), Imm8(2));
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emitter.NOT(16, R(ECX));
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emitter.AND(16, R(EAX), R(ECX));
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emitter.NOT(16, R(EAX));
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emitter.TEST(16, R(EAX), Imm16(1));
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emitter.TEST(16, R(EAX), Imm16(0x10));
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break;
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case 0xc: // LNZ - Logic Not Zero
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case 0xd: // LZ - Logic Zero
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@ -728,35 +728,3 @@ void DSPEmitter::popExtValueToReg() {
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}
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storeIndex2 = -1;
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}
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// This function is being called in the main op after all input regs were read
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// and before it writes into any regs. This way we can always use bitwise or to
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// apply the ext command output, because if the main op didn't change the value
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// then 0 | ext output = ext output and if it did then bitwise or is still the
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// right thing to do
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//this is only needed as long as we do fallback for ext ops
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void DSPEmitter::zeroWriteBackLog(const UDSPInstruction opc)
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{
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const DSPOPCTemplate *tinst = GetOpTemplate(opc);
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// Call extended
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if (!tinst->extended)
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return;
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if ((opc >> 12) == 0x3) {
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if (! extOpTable[opc & 0x7F]->jitFunc)
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{
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gpr.pushRegs();
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ABI_CallFunction((void*)::zeroWriteBackLog);
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gpr.popRegs();
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}
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} else {
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if (! extOpTable[opc & 0xFF]->jitFunc)
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{
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gpr.pushRegs();
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ABI_CallFunction((void*)::zeroWriteBackLog);
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gpr.popRegs();
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}
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}
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return;
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}
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@ -379,7 +379,6 @@ void DSPEmitter::lris(const UDSPInstruction opc)
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// an opcode extension but not do anything. At least according to duddie.
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void DSPEmitter::nx(const UDSPInstruction opc)
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{
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zeroWriteBackLog(opc);
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}
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//----
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@ -479,7 +478,6 @@ void DSPEmitter::sbset(const UDSPInstruction opc)
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// but it's harder to know exactly what effect they have.
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void DSPEmitter::srbith(const UDSPInstruction opc)
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{
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zeroWriteBackLog(opc);
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switch ((opc >> 8) & 0xf)
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{
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// M0/M2 change the multiplier mode (it can multiply by 2 for free).
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