Improve PPCCache lookup table

This commit is contained in:
TheLordScruffy 2023-01-07 07:30:42 -05:00
parent 9d39647f9e
commit 811d942222
2 changed files with 25 additions and 18 deletions

View File

@ -168,11 +168,11 @@ void Cache::Invalidate(u32 addr)
if (valid[set] & (1U << way))
{
if (addrs[set][way] & CACHE_VMEM_BIT)
lookup_table_vmem[((addrs[set][way] >> 5) & 0xfff80) | set] = 0xff;
lookup_table_vmem[(addrs[set][way] >> 5) & 0xfffff] = 0xff;
else if (addrs[set][way] & CACHE_EXRAM_BIT)
lookup_table_ex[((addrs[set][way] >> 5) & 0x1fff80) | set] = 0xff;
lookup_table_ex[(addrs[set][way] >> 5) & 0x1fffff] = 0xff;
else
lookup_table[((addrs[set][way] >> 5) & 0xfff80) | set] = 0xff;
lookup_table[(addrs[set][way] >> 5) & 0xfffff] = 0xff;
valid[set] &= ~(1U << way);
modified[set] &= ~(1U << way);
@ -195,11 +195,11 @@ void Cache::Flush(u32 addr)
memory.CopyToEmu((addr & ~0x1f), reinterpret_cast<u8*>(data[set][way].data()), 32);
if (addrs[set][way] & CACHE_VMEM_BIT)
lookup_table_vmem[((addrs[set][way] >> 5) & 0xfff80) | set] = 0xff;
lookup_table_vmem[(addrs[set][way] >> 5) & 0xfffff] = 0xff;
else if (addrs[set][way] & CACHE_EXRAM_BIT)
lookup_table_ex[((addrs[set][way] >> 5) & 0x1fff80) | set] = 0xff;
lookup_table_ex[(addrs[set][way] >> 5) & 0x1fffff] = 0xff;
else
lookup_table[((addrs[set][way] >> 5) & 0xfff80) | set] = 0xff;
lookup_table[(addrs[set][way] >> 5) & 0xfffff] = 0xff;
valid[set] &= ~(1U << way);
modified[set] &= ~(1U << way);
@ -249,11 +249,11 @@ std::pair<u32, u32> Cache::GetCache(u32 addr, bool locked)
memory.CopyToEmu(addrs[set][way], reinterpret_cast<u8*>(data[set][way].data()), 32);
if (addrs[set][way] & CACHE_VMEM_BIT)
lookup_table_vmem[((addrs[set][way] >> 5) & 0xfff80) | set] = 0xff;
lookup_table_vmem[(addrs[set][way] >> 5) & 0xfffff] = 0xff;
else if (addrs[set][way] & CACHE_EXRAM_BIT)
lookup_table_ex[((addrs[set][way] >> 5) & 0x1fff80) | set] = 0xff;
lookup_table_ex[(addrs[set][way] >> 5) & 0x1fffff] = 0xff;
else
lookup_table[((addrs[set][way] >> 5) & 0xfff80) | set] = 0xff;
lookup_table[(addrs[set][way] >> 5) & 0xfffff] = 0xff;
}
// load
@ -265,6 +265,7 @@ std::pair<u32, u32> Cache::GetCache(u32 addr, bool locked)
lookup_table_ex[(addr >> 5) & 0x1fffff] = way;
else
lookup_table[(addr >> 5) & 0xfffff] = way;
addrs[set][way] = addr;
valid[set] |= (1 << way);
modified[set] &= ~(1 << way);
@ -351,11 +352,11 @@ void Cache::DoState(PointerWrap& p)
if ((valid[set] & (1 << way)) != 0)
{
if (addrs[set][way] & CACHE_VMEM_BIT)
lookup_table_vmem[((addrs[set][way] >> 5) & 0xfff80) | set] = 0xff;
lookup_table_vmem[(addrs[set][way] >> 5) & 0xfffff] = 0xff;
else if (addrs[set][way] & CACHE_EXRAM_BIT)
lookup_table_ex[((addrs[set][way] >> 5) & 0x1fff80) | set] = 0xff;
lookup_table_ex[(addrs[set][way] >> 5) & 0x1fffff] = 0xff;
else
lookup_table[((addrs[set][way] >> 5) & 0xfff80) | set] = 0xff;
lookup_table[(addrs[set][way] >> 5) & 0xfffff] = 0xff;
}
}
}
@ -377,11 +378,11 @@ void Cache::DoState(PointerWrap& p)
if ((valid[set] & (1 << way)) != 0)
{
if (addrs[set][way] & CACHE_VMEM_BIT)
lookup_table_vmem[((addrs[set][way] >> 5) & 0xfff80) | set] = 0xff;
lookup_table_vmem[(addrs[set][way] >> 5) & 0xfffff] = 0xff;
else if (addrs[set][way] & CACHE_EXRAM_BIT)
lookup_table_ex[((addrs[set][way] >> 5) & 0x1fff80) | set] = 0xff;
lookup_table_ex[(addrs[set][way] >> 5) & 0x1fffff] = 0xff;
else
lookup_table[((addrs[set][way] >> 5) & 0xfff80) | set] = 0xff;
lookup_table[(addrs[set][way] >> 5) & 0xfffff] = 0xff;
}
}
}
@ -413,11 +414,11 @@ void InstructionCache::Invalidate(u32 addr)
if (valid[set] & (1U << way))
{
if (addrs[set][way] & CACHE_VMEM_BIT)
lookup_table_vmem[((addrs[set][way] >> 5) & 0xfff80) | set] = 0xff;
lookup_table_vmem[(addrs[set][way] >> 5) & 0xfffff] = 0xff;
else if (addrs[set][way] & CACHE_EXRAM_BIT)
lookup_table_ex[((addrs[set][way] >> 5) & 0x1fff80) | set] = 0xff;
lookup_table_ex[(addrs[set][way] >> 5) & 0x1fffff] = 0xff;
else
lookup_table[((addrs[set][way] >> 5) & 0xfff80) | set] = 0xff;
lookup_table[(addrs[set][way] >> 5) & 0xfffff] = 0xff;
}
}
valid[set] = 0;

View File

@ -23,7 +23,13 @@ constexpr u32 CACHE_VMEM_BIT = 0x20000000;
struct Cache
{
std::array<std::array<std::array<u32, CACHE_BLOCK_SIZE>, CACHE_WAYS>, CACHE_SETS> data{};
// Stores the 32-byte aligned address of the start of each cache block. This consists of the cache
// set and tag. Real hardware only needs to store the tag, but also including the set simplifies
// debugging and getting the actual address in the cache, without changing behavior (as the set
// portion of the address is by definition the same for all addresses in a set).
std::array<std::array<u32, CACHE_WAYS>, CACHE_SETS> addrs{};
std::array<u32, CACHE_SETS> plru{};
std::array<u32, CACHE_SETS> valid{};
std::array<u32, CACHE_SETS> modified{};