Merge pull request #11966 from Dentomologist/convert_xemitter_prefetchlevel_to_enum_class
xEmitter: Convert PrefetchLevel to enum class
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commit
8039d10994
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@ -920,7 +920,7 @@ void XEmitter::UD2()
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void XEmitter::PREFETCH(PrefetchLevel level, OpArg arg)
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void XEmitter::PREFETCH(PrefetchLevel level, OpArg arg)
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{
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{
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ASSERT_MSG(DYNA_REC, !arg.IsImm(), "PREFETCH - Imm argument");
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ASSERT_MSG(DYNA_REC, !arg.IsImm(), "PREFETCH - Imm argument");
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arg.operandReg = (u8)level;
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arg.operandReg = static_cast<u8>(level);
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arg.WriteREX(this, 0, 0);
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arg.WriteREX(this, 0, 0);
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Write8(0x0F);
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Write8(0x0F);
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Write8(0x18);
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Write8(0x18);
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@ -481,12 +481,12 @@ public:
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void BSR(int bits, X64Reg dest, const OpArg& src); // Top bit to bottom bit
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void BSR(int bits, X64Reg dest, const OpArg& src); // Top bit to bottom bit
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// Cache control
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// Cache control
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enum PrefetchLevel
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enum class PrefetchLevel : u8
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{
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{
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PF_NTA, // Non-temporal (data used once and only once)
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NTA = 0, // Non-temporal (data used once and only once)
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PF_T0, // All cache levels
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T0 = 1, // All cache levels
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PF_T1, // Levels 2+ (aliased to T0 on AMD)
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T1 = 2, // Levels 2+ (aliased to T0 on AMD)
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PF_T2, // Levels 3+ (aliased to T0 on AMD)
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T2 = 3, // Levels 3+ (aliased to T0 on AMD)
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};
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};
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void PREFETCH(PrefetchLevel level, OpArg arg);
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void PREFETCH(PrefetchLevel level, OpArg arg);
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void MOVNTI(int bits, const OpArg& dest, X64Reg src);
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void MOVNTI(int bits, const OpArg& dest, X64Reg src);
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@ -380,10 +380,10 @@ BITSEARCH_TEST(TZCNT);
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TEST_F(x64EmitterTest, PREFETCH)
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TEST_F(x64EmitterTest, PREFETCH)
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{
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{
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emitter->PREFETCH(XEmitter::PF_NTA, MatR(R12));
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emitter->PREFETCH(XEmitter::PrefetchLevel::NTA, MatR(R12));
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emitter->PREFETCH(XEmitter::PF_T0, MatR(R12));
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emitter->PREFETCH(XEmitter::PrefetchLevel::T0, MatR(R12));
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emitter->PREFETCH(XEmitter::PF_T1, MatR(R12));
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emitter->PREFETCH(XEmitter::PrefetchLevel::T1, MatR(R12));
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emitter->PREFETCH(XEmitter::PF_T2, MatR(R12));
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emitter->PREFETCH(XEmitter::PrefetchLevel::T2, MatR(R12));
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ExpectDisassembly("prefetchnta byte ptr ds:[r12] "
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ExpectDisassembly("prefetchnta byte ptr ds:[r12] "
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"prefetcht0 byte ptr ds:[r12] "
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"prefetcht0 byte ptr ds:[r12] "
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