DSP JIT reenable nr with a small fix
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5327 8ced0084-cf51-0410-be5f-012b33b47a6e
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@ -310,7 +310,7 @@ const DSPOPCTemplate opcodes_ext[] =
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{"DR", 0x0004, 0x00fc, DSPInterpreter::Ext::dr, &DSPEmitter::dr, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false},
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{"IR", 0x0008, 0x00fc, DSPInterpreter::Ext::ir, &DSPEmitter::ir, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false},
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{"NR", 0x000c, 0x00fc, DSPInterpreter::Ext::nr, NULL /*&DSPEmitter::nr*/, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false},
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{"NR", 0x000c, 0x00fc, DSPInterpreter::Ext::nr, &DSPEmitter::nr, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false},
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{"MV", 0x0010, 0x00f0, DSPInterpreter::Ext::mv, NULL /*&DSPEmitter::mv*/, 1, +2, {{P_REG18, 1, 0, 2, 0x000c}, {P_REG1C, 1, 0, 0, 0x0003}}, false, false},
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{"S", 0x0020, 0x00e4, DSPInterpreter::Ext::s, NULL /*&DSPEmitter::s*/, 1, 2, {{P_PRG, 1, 0, 0, 0x0003}, {P_REG1C, 1, 0, 3, 0x0018}}, false, false},
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@ -31,8 +31,8 @@ using namespace Gen;
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// See http://code.google.com/p/dolphin-emu/source/detail?r=3125
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void DSPEmitter::increment_addr_reg(int reg)
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{
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PUSH(EAX);
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PUSH(ECX);
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// PUSH(EAX);
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// PUSH(ECX);
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// u16 tmb = g_dsp.r[DSP_REG_WR0 + reg];
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MOVZX(32, 16, EAX, M(&g_dsp.r[DSP_REG_WR0 + reg]));
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@ -81,15 +81,15 @@ void DSPEmitter::increment_addr_reg(int reg)
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// g_dsp.r[reg] = tmp;
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MOV(16, M(&g_dsp.r[reg]), R(ECX));
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POP(ECX);
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POP(EAX);
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// POP(ECX);
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// POP(EAX);
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}
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// See http://code.google.com/p/dolphin-emu/source/detail?r=3125
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void DSPEmitter::decrement_addr_reg(int reg)
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{
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PUSH(EAX);
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PUSH(ECX);
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// PUSH(EAX);
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// PUSH(ECX);
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// s16 tmp = g_dsp.r[reg];
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MOVZX(32, 16, EAX, M(&g_dsp.r[reg]));
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@ -113,33 +113,27 @@ void DSPEmitter::decrement_addr_reg(int reg)
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// g_dsp.r[reg] = tmp;
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MOV(16, M(&g_dsp.r[reg]), R(EAX));
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POP(ECX);
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POP(EAX);
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// POP(ECX);
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// POP(EAX);
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}
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// Increase addr register according to the correspond ix register
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void DSPEmitter::increase_addr_reg(int reg)
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{
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// s16 value = (s16)g_dsp.r[DSP_REG_IX0 + reg];
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//FIXME: interpreter uses reg, not IX0+reg?
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MOVSX(32, 16, EDX, M(&g_dsp.r[reg]));
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XOR(32, R(ECX), R(ECX)); // i = 0
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MOVSX(32, 16, EDX, M(&g_dsp.r[DSP_REG_IX0 + reg]));
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XOR(32, R(ESI), R(ESI)); // i = 0
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// if (value > 0)
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CMP(16, R(EDX), Imm16(0));
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//FIXME: those jumps are too far for one byte,
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// and force5bytes = true causes an illegal
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// instruction for me.
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// calling (de|in)crement_addr_reg causes that.
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FixupBranch end = J_CC(CC_Z);
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FixupBranch end = J_CC(CC_Z, true);
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FixupBranch negValue = J_CC(CC_L);
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// for (int i = 0; i < value; i++)
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JumpTarget loop_pos = GetCodePtr();
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increment_addr_reg(reg);
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ADD(32, R(ECX), Imm32(1)); // i++
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CMP(32, R(ECX), R(EDX)); // i < value
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ADD(32, R(ESI), Imm32(1)); // i++
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CMP(32, R(ESI), R(EDX)); // i < value
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J_CC(CC_NE, loop_pos);
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FixupBranch posValue = J();
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@ -153,8 +147,8 @@ void DSPEmitter::increase_addr_reg(int reg)
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JumpTarget loop_neg = GetCodePtr();
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decrement_addr_reg(reg);
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ADD(32, R(ECX), Imm32(1)); // i++
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CMP(32, R(ECX), R(EDX)); // i < -value
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ADD(32, R(ESI), Imm32(1)); // i++
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CMP(32, R(ESI), R(EDX)); // i < -value
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J_CC(CC_NE, loop_neg);
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SetJumpTarget(posValue);
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@ -208,15 +202,29 @@ void DSPEmitter::decrease_addr_reg(int reg)
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void DSPEmitter::ext_dmem_write(u32 dest, u32 src)
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{
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u16 addr = g_dsp.r[dest];
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u16 val = g_dsp.r[src];
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u16 saddr = addr >> 12;
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// u16 addr = g_dsp.r[dest];
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MOVZX(32, 16, EAX, M(&g_dsp.r[dest]));
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if (saddr == 0)
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g_dsp.dram[addr & DSP_DRAM_MASK] = val;
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else if (saddr == 0xf)
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gdsp_ifx_write(addr, val);
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// u16 val = g_dsp.r[src];
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MOVZX(32, 16, ECX, M(&g_dsp.r[src]));
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// u16 saddr = addr >> 12;
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MOVZX(32, 16, ESI, R(EAX));
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SHR(16, R(ESI), Imm16(12));
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// if (saddr == 0)
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CMP(16, R(ESI), Imm16(0));
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FixupBranch ifx = J_CC(CC_NZ);
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// g_dsp.dram[addr & DSP_DRAM_MASK] = val;
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AND(16, R(EAX), Imm16(DSP_DRAM_MASK));
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// MOVZX(32, 16, M);
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FixupBranch end = J();
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// else if (saddr == 0xf)
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SetJumpTarget(ifx);
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// gdsp_ifx_write(addr, val);
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SetJumpTarget(end);
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}
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u16 DSPEmitter::ext_dmem_read(u16 addr)
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