DSP JIT reenable nr with a small fix
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5327 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
parent
a4515490ce
commit
7c35138435
|
@ -310,7 +310,7 @@ const DSPOPCTemplate opcodes_ext[] =
|
||||||
|
|
||||||
{"DR", 0x0004, 0x00fc, DSPInterpreter::Ext::dr, &DSPEmitter::dr, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false},
|
{"DR", 0x0004, 0x00fc, DSPInterpreter::Ext::dr, &DSPEmitter::dr, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false},
|
||||||
{"IR", 0x0008, 0x00fc, DSPInterpreter::Ext::ir, &DSPEmitter::ir, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false},
|
{"IR", 0x0008, 0x00fc, DSPInterpreter::Ext::ir, &DSPEmitter::ir, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false},
|
||||||
{"NR", 0x000c, 0x00fc, DSPInterpreter::Ext::nr, NULL /*&DSPEmitter::nr*/, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false},
|
{"NR", 0x000c, 0x00fc, DSPInterpreter::Ext::nr, &DSPEmitter::nr, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false},
|
||||||
{"MV", 0x0010, 0x00f0, DSPInterpreter::Ext::mv, NULL /*&DSPEmitter::mv*/, 1, +2, {{P_REG18, 1, 0, 2, 0x000c}, {P_REG1C, 1, 0, 0, 0x0003}}, false, false},
|
{"MV", 0x0010, 0x00f0, DSPInterpreter::Ext::mv, NULL /*&DSPEmitter::mv*/, 1, +2, {{P_REG18, 1, 0, 2, 0x000c}, {P_REG1C, 1, 0, 0, 0x0003}}, false, false},
|
||||||
|
|
||||||
{"S", 0x0020, 0x00e4, DSPInterpreter::Ext::s, NULL /*&DSPEmitter::s*/, 1, 2, {{P_PRG, 1, 0, 0, 0x0003}, {P_REG1C, 1, 0, 3, 0x0018}}, false, false},
|
{"S", 0x0020, 0x00e4, DSPInterpreter::Ext::s, NULL /*&DSPEmitter::s*/, 1, 2, {{P_PRG, 1, 0, 0, 0x0003}, {P_REG1C, 1, 0, 3, 0x0018}}, false, false},
|
||||||
|
|
|
@ -31,8 +31,8 @@ using namespace Gen;
|
||||||
// See http://code.google.com/p/dolphin-emu/source/detail?r=3125
|
// See http://code.google.com/p/dolphin-emu/source/detail?r=3125
|
||||||
void DSPEmitter::increment_addr_reg(int reg)
|
void DSPEmitter::increment_addr_reg(int reg)
|
||||||
{
|
{
|
||||||
PUSH(EAX);
|
// PUSH(EAX);
|
||||||
PUSH(ECX);
|
// PUSH(ECX);
|
||||||
|
|
||||||
// u16 tmb = g_dsp.r[DSP_REG_WR0 + reg];
|
// u16 tmb = g_dsp.r[DSP_REG_WR0 + reg];
|
||||||
MOVZX(32, 16, EAX, M(&g_dsp.r[DSP_REG_WR0 + reg]));
|
MOVZX(32, 16, EAX, M(&g_dsp.r[DSP_REG_WR0 + reg]));
|
||||||
|
@ -81,15 +81,15 @@ void DSPEmitter::increment_addr_reg(int reg)
|
||||||
// g_dsp.r[reg] = tmp;
|
// g_dsp.r[reg] = tmp;
|
||||||
MOV(16, M(&g_dsp.r[reg]), R(ECX));
|
MOV(16, M(&g_dsp.r[reg]), R(ECX));
|
||||||
|
|
||||||
POP(ECX);
|
// POP(ECX);
|
||||||
POP(EAX);
|
// POP(EAX);
|
||||||
}
|
}
|
||||||
|
|
||||||
// See http://code.google.com/p/dolphin-emu/source/detail?r=3125
|
// See http://code.google.com/p/dolphin-emu/source/detail?r=3125
|
||||||
void DSPEmitter::decrement_addr_reg(int reg)
|
void DSPEmitter::decrement_addr_reg(int reg)
|
||||||
{
|
{
|
||||||
PUSH(EAX);
|
// PUSH(EAX);
|
||||||
PUSH(ECX);
|
// PUSH(ECX);
|
||||||
|
|
||||||
// s16 tmp = g_dsp.r[reg];
|
// s16 tmp = g_dsp.r[reg];
|
||||||
MOVZX(32, 16, EAX, M(&g_dsp.r[reg]));
|
MOVZX(32, 16, EAX, M(&g_dsp.r[reg]));
|
||||||
|
@ -113,33 +113,27 @@ void DSPEmitter::decrement_addr_reg(int reg)
|
||||||
// g_dsp.r[reg] = tmp;
|
// g_dsp.r[reg] = tmp;
|
||||||
MOV(16, M(&g_dsp.r[reg]), R(EAX));
|
MOV(16, M(&g_dsp.r[reg]), R(EAX));
|
||||||
|
|
||||||
POP(ECX);
|
// POP(ECX);
|
||||||
POP(EAX);
|
// POP(EAX);
|
||||||
}
|
}
|
||||||
|
|
||||||
// Increase addr register according to the correspond ix register
|
// Increase addr register according to the correspond ix register
|
||||||
void DSPEmitter::increase_addr_reg(int reg)
|
void DSPEmitter::increase_addr_reg(int reg)
|
||||||
{
|
{
|
||||||
// s16 value = (s16)g_dsp.r[DSP_REG_IX0 + reg];
|
// s16 value = (s16)g_dsp.r[DSP_REG_IX0 + reg];
|
||||||
//FIXME: interpreter uses reg, not IX0+reg?
|
MOVSX(32, 16, EDX, M(&g_dsp.r[DSP_REG_IX0 + reg]));
|
||||||
MOVSX(32, 16, EDX, M(&g_dsp.r[reg]));
|
XOR(32, R(ESI), R(ESI)); // i = 0
|
||||||
XOR(32, R(ECX), R(ECX)); // i = 0
|
|
||||||
|
|
||||||
// if (value > 0)
|
// if (value > 0)
|
||||||
CMP(16, R(EDX), Imm16(0));
|
FixupBranch end = J_CC(CC_Z, true);
|
||||||
//FIXME: those jumps are too far for one byte,
|
|
||||||
// and force5bytes = true causes an illegal
|
|
||||||
// instruction for me.
|
|
||||||
// calling (de|in)crement_addr_reg causes that.
|
|
||||||
FixupBranch end = J_CC(CC_Z);
|
|
||||||
FixupBranch negValue = J_CC(CC_L);
|
FixupBranch negValue = J_CC(CC_L);
|
||||||
|
|
||||||
// for (int i = 0; i < value; i++)
|
// for (int i = 0; i < value; i++)
|
||||||
JumpTarget loop_pos = GetCodePtr();
|
JumpTarget loop_pos = GetCodePtr();
|
||||||
increment_addr_reg(reg);
|
increment_addr_reg(reg);
|
||||||
|
|
||||||
ADD(32, R(ECX), Imm32(1)); // i++
|
ADD(32, R(ESI), Imm32(1)); // i++
|
||||||
CMP(32, R(ECX), R(EDX)); // i < value
|
CMP(32, R(ESI), R(EDX)); // i < value
|
||||||
J_CC(CC_NE, loop_pos);
|
J_CC(CC_NE, loop_pos);
|
||||||
FixupBranch posValue = J();
|
FixupBranch posValue = J();
|
||||||
|
|
||||||
|
@ -153,8 +147,8 @@ void DSPEmitter::increase_addr_reg(int reg)
|
||||||
JumpTarget loop_neg = GetCodePtr();
|
JumpTarget loop_neg = GetCodePtr();
|
||||||
decrement_addr_reg(reg);
|
decrement_addr_reg(reg);
|
||||||
|
|
||||||
ADD(32, R(ECX), Imm32(1)); // i++
|
ADD(32, R(ESI), Imm32(1)); // i++
|
||||||
CMP(32, R(ECX), R(EDX)); // i < -value
|
CMP(32, R(ESI), R(EDX)); // i < -value
|
||||||
J_CC(CC_NE, loop_neg);
|
J_CC(CC_NE, loop_neg);
|
||||||
|
|
||||||
SetJumpTarget(posValue);
|
SetJumpTarget(posValue);
|
||||||
|
@ -208,15 +202,29 @@ void DSPEmitter::decrease_addr_reg(int reg)
|
||||||
void DSPEmitter::ext_dmem_write(u32 dest, u32 src)
|
void DSPEmitter::ext_dmem_write(u32 dest, u32 src)
|
||||||
{
|
{
|
||||||
|
|
||||||
u16 addr = g_dsp.r[dest];
|
// u16 addr = g_dsp.r[dest];
|
||||||
u16 val = g_dsp.r[src];
|
MOVZX(32, 16, EAX, M(&g_dsp.r[dest]));
|
||||||
u16 saddr = addr >> 12;
|
|
||||||
|
|
||||||
if (saddr == 0)
|
// u16 val = g_dsp.r[src];
|
||||||
g_dsp.dram[addr & DSP_DRAM_MASK] = val;
|
MOVZX(32, 16, ECX, M(&g_dsp.r[src]));
|
||||||
else if (saddr == 0xf)
|
|
||||||
gdsp_ifx_write(addr, val);
|
|
||||||
|
|
||||||
|
// u16 saddr = addr >> 12;
|
||||||
|
MOVZX(32, 16, ESI, R(EAX));
|
||||||
|
SHR(16, R(ESI), Imm16(12));
|
||||||
|
|
||||||
|
// if (saddr == 0)
|
||||||
|
CMP(16, R(ESI), Imm16(0));
|
||||||
|
FixupBranch ifx = J_CC(CC_NZ);
|
||||||
|
|
||||||
|
// g_dsp.dram[addr & DSP_DRAM_MASK] = val;
|
||||||
|
AND(16, R(EAX), Imm16(DSP_DRAM_MASK));
|
||||||
|
// MOVZX(32, 16, M);
|
||||||
|
|
||||||
|
FixupBranch end = J();
|
||||||
|
// else if (saddr == 0xf)
|
||||||
|
SetJumpTarget(ifx);
|
||||||
|
// gdsp_ifx_write(addr, val);
|
||||||
|
SetJumpTarget(end);
|
||||||
}
|
}
|
||||||
|
|
||||||
u16 DSPEmitter::ext_dmem_read(u16 addr)
|
u16 DSPEmitter::ext_dmem_read(u16 addr)
|
||||||
|
|
Loading…
Reference in New Issue