VertexLoaderX64: generate PIC
Address static memory relative to a base register, analog to what we're doing with PPCSTATE in the CPU JIT. This allows executable memory for the vertex loader JIT to be allocated anywhere, not just within 2 GiB of static data. Fixes issue 8180.
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@ -19,6 +19,14 @@ static const X64Reg scratch2 = ABI_PARAM3;
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static const X64Reg scratch3 = ABI_PARAM4;
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static const X64Reg count_reg = R10;
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static const X64Reg skipped_reg = R11;
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static const X64Reg base_reg = RBX;
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static const u8* memory_base_ptr = (u8*)&g_main_cp_state.array_strides;
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static OpArg MPIC(const void* ptr)
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{
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return MDisp(base_reg, (s32)((u8*)ptr - memory_base_ptr));
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}
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VertexLoaderX64::VertexLoaderX64(const TVtxDesc& vtx_desc, const VAT& vtx_att) : VertexLoaderBase(vtx_desc, vtx_att)
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{
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@ -57,9 +65,8 @@ OpArg VertexLoaderX64::GetVertexAddr(int array, u64 attribute)
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CMP(attribute == INDEX8 ? 8 : 16, R(scratch1), Imm8(-1));
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m_skip_vertex = J_CC(CC_E, true);
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}
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// TODO: Move cached_arraybases into CPState and use MDisp() relative to a constant register loaded with &g_main_cp_state.
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IMUL(32, scratch1, M(&g_main_cp_state.array_strides[array]));
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MOV(64, R(scratch2), M(&VertexLoaderManager::cached_arraybases[array]));
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IMUL(32, scratch1, MPIC(&g_main_cp_state.array_strides[array]));
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MOV(64, R(scratch2), MPIC(&VertexLoaderManager::cached_arraybases[array]));
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return MRegSum(scratch1, scratch2);
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}
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else
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@ -136,7 +143,7 @@ int VertexLoaderX64::ReadVertex(OpArg data, u64 attribute, int format, int count
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else
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MOVD_xmm(coords, data);
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PSHUFB(coords, M(&shuffle_lut[format][count_in - 1]));
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PSHUFB(coords, MPIC(&shuffle_lut[format][count_in - 1]));
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// Sign-extend.
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if (format == FORMAT_BYTE)
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@ -193,13 +200,13 @@ int VertexLoaderX64::ReadVertex(OpArg data, u64 attribute, int format, int count
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CVTDQ2PS(coords, R(coords));
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if (dequantize && scaling_exponent)
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MULPS(coords, M(&scale_factors[scaling_exponent]));
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MULPS(coords, MPIC(&scale_factors[scaling_exponent]));
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switch (count_out)
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{
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case 1: MOVSS(dest, coords); break;
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case 2: MOVLPS(dest, coords); break;
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case 3: MOVUPS(dest, coords); break;
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case 1: MOVSS(dest, coords); break;
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case 2: MOVLPS(dest, coords); break;
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case 3: MOVUPS(dest, coords); break;
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}
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return load_bytes;
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@ -353,10 +360,9 @@ void VertexLoaderX64::ReadColor(OpArg data, u64 attribute, int format)
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void VertexLoaderX64::GenerateVertexLoader()
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{
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BitSet32 xmm_regs;
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xmm_regs[XMM0+16] = true;
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xmm_regs[XMM1+16] = !cpu_info.bSSSE3;
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ABI_PushRegistersAndAdjustStack(xmm_regs, 8);
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BitSet32 regs = {src_reg, dst_reg, scratch1, scratch2, scratch3, count_reg, skipped_reg, base_reg};
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regs &= ABI_ALL_CALLEE_SAVED;
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ABI_PushRegistersAndAdjustStack(regs, 0);
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// Backup count since we're going to count it down.
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PUSH(32, R(ABI_PARAM3));
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@ -364,6 +370,8 @@ void VertexLoaderX64::GenerateVertexLoader()
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// ABI_PARAM3 is one of the lower registers, so free it for scratch2.
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MOV(32, R(count_reg), R(ABI_PARAM3));
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MOV(64, R(base_reg), R(ABI_PARAM4));
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if (m_VtxDesc.Position & MASK_INDEXED)
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XOR(32, R(skipped_reg), R(skipped_reg));
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@ -493,7 +501,7 @@ void VertexLoaderX64::GenerateVertexLoader()
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// Get the original count.
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POP(32, R(ABI_RETURN));
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ABI_PopRegistersAndAdjustStack(xmm_regs, 8);
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ABI_PopRegistersAndAdjustStack(regs, 0);
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if (m_VtxDesc.Position & MASK_INDEXED)
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{
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@ -516,5 +524,9 @@ void VertexLoaderX64::GenerateVertexLoader()
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int VertexLoaderX64::RunVertices(DataReader src, DataReader dst, int count)
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{
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m_numLoadedVertices += count;
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return ((int (*)(u8* src, u8* dst, int count))region)(src.GetPointer(), dst.GetPointer(), count);
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return ((int (*)(u8*, u8*, int, const void*))region)(
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src.GetPointer(),
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dst.GetPointer(),
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count,
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memory_base_ptr);
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}
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