JIT: make fprf conditional in fcmp, just like the other instructions
Missed in the FPRF merge (it didn't break anything, but it's probably a bit slower and not consistent with the others).
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parent
0217fb2008
commit
7929f2f033
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@ -242,10 +242,12 @@ void Jit64::fcmpx(UGeckoInstruction inst)
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int a = inst.FA;
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int b = inst.FB;
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int crf = inst.CRFD;
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bool fprf = Core::g_CoreStartupParameter.bEnableFPRF && js.op->wantsFPRF;
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fpr.Lock(a,b);
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fpr.BindToRegister(b, true);
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if (fprf)
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AND(32, M(&FPSCR), Imm32(~FPRF_MASK));
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// Are we masking sNaN invalid floating point exceptions? If not this could crash if we don't handle the exception?
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UCOMISD(fpr.R(b).GetSimpleReg(), fpr.R(a));
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@ -270,12 +272,14 @@ void Jit64::fcmpx(UGeckoInstruction inst)
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}
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MOV(64, R(RAX), Imm64(PPCCRToInternal(CR_EQ)));
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if (fprf)
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OR(32, M(&FPSCR), Imm32(CR_EQ << FPRF_SHIFT));
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continue1 = J();
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SetJumpTarget(pNaN);
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MOV(64, R(RAX), Imm64(PPCCRToInternal(CR_SO)));
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if (fprf)
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OR(32, M(&FPSCR), Imm32(CR_SO << FPRF_SHIFT));
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if (a != b)
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@ -284,11 +288,13 @@ void Jit64::fcmpx(UGeckoInstruction inst)
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SetJumpTarget(pGreater);
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MOV(64, R(RAX), Imm64(PPCCRToInternal(CR_GT)));
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if (fprf)
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OR(32, M(&FPSCR), Imm32(CR_GT << FPRF_SHIFT));
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continue3 = J();
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SetJumpTarget(pLesser);
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MOV(64, R(RAX), Imm64(PPCCRToInternal(CR_LT)));
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if (fprf)
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OR(32, M(&FPSCR), Imm32(CR_LT << FPRF_SHIFT));
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}
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