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Added code to invalidate the JIT cache on dcbf. This fixes Monster House and Scooby Doo: Mystery Mayhem.

This commit is contained in:
skidau 2011-10-29 17:21:20 +11:00
parent e03fd9a942
commit 78b74101b0
5 changed files with 24 additions and 16 deletions
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4
Source/Core/Core/Src/HW/MemmapFunctions.cpp
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@ -273,8 +273,7 @@ inline void WriteToHardware(u32 em_address, const T data, u32 effective_address,
((em_address & 0xF0000000) == 0xD0000000) || ((em_address & 0xF0000000) == 0xD0000000) ||
((em_address & 0xF0000000) == 0x10000000)) ((em_address & 0xF0000000) == 0x10000000))
{ {
// Should we invalidate jit blocks in exram? PowerPC::ppcState.iCache.InvalidateBlock(em_address);
//PowerPC::ppcState.iCache.InvalidateBlock(em_address);
*(T*)&m_pEXRAM[em_address & EXRAM_MASK] = bswap(data); *(T*)&m_pEXRAM[em_address & EXRAM_MASK] = bswap(data);
return; return;
} }
@ -287,6 +286,7 @@ inline void WriteToHardware(u32 em_address, const T data, u32 effective_address,
(bFakeVMEM && ((em_address &0xF0000000) == 0x40000000))) (bFakeVMEM && ((em_address &0xF0000000) == 0x40000000)))
{ {
// fake VMEM // fake VMEM
PowerPC::ppcState.iCache.InvalidateBlock(em_address);
*(T*)&m_pFakeVMEM[em_address & FAKEVMEM_MASK] = bswap(data); *(T*)&m_pFakeVMEM[em_address & FAKEVMEM_MASK] = bswap(data);
} }
else else

14
Source/Core/Core/Src/PowerPC/Interpreter/Interpreter_LoadStore.cpp
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@ -363,16 +363,24 @@ void Interpreter::dcbf(UGeckoInstruction _inst)
{ {
NPC = PC + 12; NPC = PC + 12;
}*/ }*/
// Invalidate the icache on dcbf
if (jit)
{
u32 address = Helper_Get_EA_X(_inst);
jit->GetBlockCache()->InvalidateICache(address & ~0x1f);
}
} }
void Interpreter::dcbi(UGeckoInstruction _inst) void Interpreter::dcbi(UGeckoInstruction _inst)
{ {
// Removes a block from data cache. Since we don't emulate the data cache, we don't need to do anything. // Removes a block from data cache. Since we don't emulate the data cache, we don't need to do anything to the data cache
// Seen used during initialization. // However, we invalidate the icache on dcbi
u32 address = Helper_Get_EA_X(_inst);
if (jit) if (jit)
{
u32 address = Helper_Get_EA_X(_inst);
jit->GetBlockCache()->InvalidateICache(address & ~0x1f); jit->GetBlockCache()->InvalidateICache(address & ~0x1f);
} }
}
void Interpreter::dcbst(UGeckoInstruction _inst) void Interpreter::dcbst(UGeckoInstruction _inst)
{ {

10
Source/Core/Core/Src/PowerPC/Jit64/Jit64_Tables.cpp
View File

@ -210,12 +210,12 @@ static GekkoOPTemplate table31[] =
{824, &Jit64::srawix}, //"srawix", OPTYPE_INTEGER, FL_OUT_A | FL_IN_B | FL_IN_S | FL_RC_BIT}}, {824, &Jit64::srawix}, //"srawix", OPTYPE_INTEGER, FL_OUT_A | FL_IN_B | FL_IN_S | FL_RC_BIT}},
{24, &Jit64::slwx}, //"slwx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_B | FL_IN_S | FL_RC_BIT}}, {24, &Jit64::slwx}, //"slwx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_B | FL_IN_S | FL_RC_BIT}},
{54, &Jit64::Default}, //"dcbst", OPTYPE_DCACHE, 0, 4}}, {54, &Jit64::DoNothing}, //"dcbst", OPTYPE_DCACHE, 0, 4}},
{86, &Jit64::DoNothing}, //"dcbf", OPTYPE_DCACHE, 0, 4}}, {86, &Jit64::Default}, //"dcbf", OPTYPE_DCACHE, 0, 4}},
{246, &Jit64::Default}, //"dcbtst", OPTYPE_DCACHE, 0, 1}}, {246, &Jit64::DoNothing}, //"dcbtst", OPTYPE_DCACHE, 0, 1}},
{278, &Jit64::Default}, //"dcbt", OPTYPE_DCACHE, 0, 1}}, {278, &Jit64::DoNothing}, //"dcbt", OPTYPE_DCACHE, 0, 1}},
{470, &Jit64::Default}, //"dcbi", OPTYPE_DCACHE, 0, 4}}, {470, &Jit64::Default}, //"dcbi", OPTYPE_DCACHE, 0, 4}},
{758, &Jit64::Default}, //"dcba", OPTYPE_DCACHE, 0, 4}}, {758, &Jit64::DoNothing}, //"dcba", OPTYPE_DCACHE, 0, 4}},
{1014, &Jit64::dcbz}, //"dcbz", OPTYPE_DCACHE, 0, 4}}, {1014, &Jit64::dcbz}, //"dcbz", OPTYPE_DCACHE, 0, 4}},
//load word //load word

2
Source/Core/Core/Src/PowerPC/Jit64IL/JitIL.cpp
View File

@ -494,7 +494,7 @@ void JitIL::Trace()
} }
#endif #endif
NOTICE_LOG(DYNA_REC, "JITIL PC: %08x SRR0: %08x SRR1: %08x CRfast: %02x%02x%02x%02x%02x%02x%02x%02x FPSCR: %08x MSR: %08x LR: %08x %s %s", DEBUG_LOG(DYNA_REC, "JITIL PC: %08x SRR0: %08x SRR1: %08x CRfast: %02x%02x%02x%02x%02x%02x%02x%02x FPSCR: %08x MSR: %08x LR: %08x %s %s",
PC, SRR0, SRR1, PowerPC::ppcState.cr_fast[0], PowerPC::ppcState.cr_fast[1], PowerPC::ppcState.cr_fast[2], PowerPC::ppcState.cr_fast[3], PC, SRR0, SRR1, PowerPC::ppcState.cr_fast[0], PowerPC::ppcState.cr_fast[1], PowerPC::ppcState.cr_fast[2], PowerPC::ppcState.cr_fast[3],
PowerPC::ppcState.cr_fast[4], PowerPC::ppcState.cr_fast[5], PowerPC::ppcState.cr_fast[6], PowerPC::ppcState.cr_fast[7], PowerPC::ppcState.fpscr, PowerPC::ppcState.cr_fast[4], PowerPC::ppcState.cr_fast[5], PowerPC::ppcState.cr_fast[6], PowerPC::ppcState.cr_fast[7], PowerPC::ppcState.fpscr,
PowerPC::ppcState.msr, PowerPC::ppcState.spr[8], regs, fregs); PowerPC::ppcState.msr, PowerPC::ppcState.spr[8], regs, fregs);

10
Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Tables.cpp
View File

@ -212,12 +212,12 @@ static GekkoOPTemplate table31[] =
{824, &JitIL::srawix}, //"srawix", OPTYPE_INTEGER, FL_OUT_A | FL_IN_B | FL_IN_S | FL_RC_BIT}}, {824, &JitIL::srawix}, //"srawix", OPTYPE_INTEGER, FL_OUT_A | FL_IN_B | FL_IN_S | FL_RC_BIT}},
{24, &JitIL::slwx}, //"slwx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_B | FL_IN_S | FL_RC_BIT}}, {24, &JitIL::slwx}, //"slwx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_B | FL_IN_S | FL_RC_BIT}},
{54, &JitIL::Default}, //"dcbst", OPTYPE_DCACHE, 0, 4}}, {54, &JitIL::DoNothing}, //"dcbst", OPTYPE_DCACHE, 0, 4}},
{86, &JitIL::DoNothing}, //"dcbf", OPTYPE_DCACHE, 0, 4}}, {86, &JitIL::Default}, //"dcbf", OPTYPE_DCACHE, 0, 4}},
{246, &JitIL::Default}, //"dcbtst", OPTYPE_DCACHE, 0, 1}}, {246, &JitIL::DoNothing}, //"dcbtst", OPTYPE_DCACHE, 0, 1}},
{278, &JitIL::Default}, //"dcbt", OPTYPE_DCACHE, 0, 1}}, {278, &JitIL::DoNothing}, //"dcbt", OPTYPE_DCACHE, 0, 1}},
{470, &JitIL::Default}, //"dcbi", OPTYPE_DCACHE, 0, 4}}, {470, &JitIL::Default}, //"dcbi", OPTYPE_DCACHE, 0, 4}},
{758, &JitIL::Default}, //"dcba", OPTYPE_DCACHE, 0, 4}}, {758, &JitIL::DoNothing}, //"dcba", OPTYPE_DCACHE, 0, 4}},
{1014, &JitIL::dcbz}, //"dcbz", OPTYPE_DCACHE, 0, 4}}, {1014, &JitIL::dcbz}, //"dcbz", OPTYPE_DCACHE, 0, 4}},
//load word //load word
{23, &JitIL::lXzx}, //"lwzx", OPTYPE_LOAD, FL_OUT_D | FL_IN_A0 | FL_IN_B}}, {23, &JitIL::lXzx}, //"lwzx", OPTYPE_LOAD, FL_OUT_D | FL_IN_A0 | FL_IN_B}},