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dsp/jit - super super tiny speed up 

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@7655 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
Marko Pusljar 2011-06-30 17:31:48 +00:00
parent 913ca56e03
commit 78529e2eb6
2 changed files with 11 additions and 15 deletions
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12
Source/Core/Core/Src/DSP/Jit/DSPJitBranch.cpp
View File

@ -48,11 +48,10 @@ static void ReJitConditional(const UDSPInstruction opc, DSPEmitter& emitter)
case 0x2: // G - Greater case 0x2: // G - Greater
case 0x3: // LE - Less Equal case 0x3: // LE - Less Equal
emitter.MOV(16, R(EDX), R(EAX)); emitter.MOV(16, R(EDX), R(EAX));
emitter.MOV(16, R(ECX), R(EAX));
emitter.SHL(16, R(EDX), Imm8(2)); emitter.SHL(16, R(EDX), Imm8(2));
emitter.XOR(16, R(EAX), R(EDX)); emitter.XOR(16, R(EAX), R(EDX));
emitter.SHL(16, R(ECX), Imm8(1)); emitter.SHR(16, R(EDX), Imm8(1));
emitter.OR(16, R(EAX), R(ECX)); emitter.OR(16, R(EAX), R(EDX));
emitter.TEST(16, R(EAX), Imm16(8)); emitter.TEST(16, R(EAX), Imm16(8));
break; break;
case 0x4: // NZ - Not Zero case 0x4: // NZ - Not Zero
@ -70,12 +69,11 @@ static void ReJitConditional(const UDSPInstruction opc, DSPEmitter& emitter)
case 0xa: // ? case 0xa: // ?
case 0xb: // ? case 0xb: // ?
emitter.MOV(16, R(EDX), R(EAX)); emitter.MOV(16, R(EDX), R(EAX));
emitter.MOV(16, R(ECX), R(EAX));
emitter.SHR(16, R(EDX), Imm8(1)); emitter.SHR(16, R(EDX), Imm8(1));
emitter.OR(16, R(EAX), R(EDX)); emitter.OR(16, R(EAX), R(EDX));
emitter.SHL(16, R(ECX), Imm8(2)); emitter.SHL(16, R(EDX), Imm8(3));
emitter.NOT(16, R(ECX)); emitter.NOT(16, R(EDX));
emitter.AND(16, R(EAX), R(ECX)); emitter.AND(16, R(EAX), R(EDX));
emitter.NOT(16, R(EAX)); emitter.NOT(16, R(EAX));
emitter.TEST(16, R(EAX), Imm16(0x10)); emitter.TEST(16, R(EAX), Imm16(0x10));
break; break;

14
Source/Core/Core/Src/DSP/Jit/DSPJitMultiplier.cpp
View File

@ -56,24 +56,28 @@ void DSPEmitter::multiply()
// Clobbers RDX // Clobbers RDX
void DSPEmitter::multiply_add() void DSPEmitter::multiply_add()
{ {
#ifdef _M_X64
// s64 prod = dsp_get_long_prod() + dsp_get_multiply_prod(a, b, sign); // s64 prod = dsp_get_long_prod() + dsp_get_multiply_prod(a, b, sign);
multiply(); multiply();
MOV(64, R(RDX), R(RAX)); MOV(64, R(RDX), R(RAX));
get_long_prod(); get_long_prod();
ADD(64, R(RAX), R(RDX)); ADD(64, R(RAX), R(RDX));
// return prod; // return prod;
#endif
} }
// Returns s64 in RAX // Returns s64 in RAX
// Clobbers RDX // Clobbers RDX
void DSPEmitter::multiply_sub() void DSPEmitter::multiply_sub()
{ {
#ifdef _M_X64
// s64 prod = dsp_get_long_prod() - dsp_get_multiply_prod(a, b, sign); // s64 prod = dsp_get_long_prod() - dsp_get_multiply_prod(a, b, sign);
multiply(); multiply();
MOV(64, R(RDX), R(RAX)); MOV(64, R(RDX), R(RAX));
get_long_prod(); get_long_prod();
SUB(64, R(RAX), R(RDX)); SUB(64, R(RAX), R(RDX));
// return prod; // return prod;
#endif
} }
// Only MULX family instructions have unsigned/mixed support. // Only MULX family instructions have unsigned/mixed support.
@ -82,6 +86,7 @@ void DSPEmitter::multiply_sub()
// Returns s64 in RAX // Returns s64 in RAX
void DSPEmitter::multiply_mulx(u8 axh0, u8 axh1) void DSPEmitter::multiply_mulx(u8 axh0, u8 axh1)
{ {
#ifdef _M_X64
// s64 result; // s64 result;
// if ((axh0==0) && (axh1==0)) // if ((axh0==0) && (axh1==0))
@ -153,6 +158,7 @@ void DSPEmitter::multiply_mulx(u8 axh0, u8 axh1)
SetJumpTarget(noMult2); SetJumpTarget(noMult2);
gpr.putReg(DSP_REG_SR, false); gpr.putReg(DSP_REG_SR, false);
// return prod; // return prod;
#endif
} }
//---- //----
@ -168,17 +174,9 @@ void DSPEmitter::multiply_mulx(u8 axh0, u8 axh1)
// direct use of prod regs by AX/AXWII (look @that part of ucode). // direct use of prod regs by AX/AXWII (look @that part of ucode).
void DSPEmitter::clrp(const UDSPInstruction opc) void DSPEmitter::clrp(const UDSPInstruction opc)
{ {
#ifdef _M_X64
// g_dsp.r[DSP_REG_PRODL] = 0x0000;
// g_dsp.r[DSP_REG_PRODM] = 0xfff0;
// g_dsp.r[DSP_REG_PRODH] = 0x00ff;
// g_dsp.r[DSP_REG_PRODM2] = 0x0010;
//64bit move to memory does not work. use 2 32bits //64bit move to memory does not work. use 2 32bits
MOV(32, M(((u32*)&g_dsp.r.prod.val)+0), Imm32(0xfff00000U)); MOV(32, M(((u32*)&g_dsp.r.prod.val)+0), Imm32(0xfff00000U));
MOV(32, M(((u32*)&g_dsp.r.prod.val)+1), Imm32(0x001000ffU)); MOV(32, M(((u32*)&g_dsp.r.prod.val)+1), Imm32(0x001000ffU));
#else
Default(opc);
#endif
} }
// TSTPROD // TSTPROD