PPCAnalyst: Apply "bitexact" analysis to fprIsSingle
This lets us set fprIsSingle to true in more cases.
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@ -979,6 +979,18 @@ u32 PPCAnalyzer::Analyze(u32 address, CodeBlock* block, CodeBuffer* buffer, std:
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op.fprIsStoreSafeBeforeInst = fprIsStoreSafe;
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if (op.fregOut >= 0)
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{
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BitSet32 bitexact_inputs;
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if (op.opinfo->flags &
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(FL_IN_FLOAT_A_BITEXACT | FL_IN_FLOAT_B_BITEXACT | FL_IN_FLOAT_C_BITEXACT))
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{
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if (op.opinfo->flags & FL_IN_FLOAT_A_BITEXACT)
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bitexact_inputs[op.inst.FA] = true;
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if (op.opinfo->flags & FL_IN_FLOAT_B_BITEXACT)
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bitexact_inputs[op.inst.FB] = true;
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if (op.opinfo->flags & FL_IN_FLOAT_C_BITEXACT)
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bitexact_inputs[op.inst.FC] = true;
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}
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if (op.opinfo->type == OpType::SingleFP)
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{
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fprIsSingle[op.fregOut] = true;
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@ -989,6 +1001,11 @@ u32 PPCAnalyzer::Analyze(u32 address, CodeBlock* block, CodeBuffer* buffer, std:
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fprIsSingle[op.fregOut] = true;
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fprIsDuplicated[op.fregOut] = true;
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}
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else if (bitexact_inputs)
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{
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fprIsSingle[op.fregOut] = (fprIsSingle & bitexact_inputs) == bitexact_inputs;
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fprIsDuplicated[op.fregOut] = false;
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}
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else if (op.opinfo->type == OpType::PS || op.opinfo->type == OpType::LoadPS)
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{
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fprIsSingle[op.fregOut] = true;
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@ -1007,20 +1024,10 @@ u32 PPCAnalyzer::Analyze(u32 address, CodeBlock* block, CodeBuffer* buffer, std:
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// So, discard all information we have.
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fprIsStoreSafe = BitSet32(0);
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}
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else if (op.opinfo->flags &
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(FL_IN_FLOAT_A_BITEXACT | FL_IN_FLOAT_B_BITEXACT | FL_IN_FLOAT_C_BITEXACT))
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else if (bitexact_inputs)
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{
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// If the instruction copies bits between registers (without flushing denormals to zero
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// or turning SNaN into QNaN), the output is store-safe if the inputs are.
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BitSet32 bitexact_inputs;
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if (op.opinfo->flags & FL_IN_FLOAT_A_BITEXACT)
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bitexact_inputs[op.inst.FA] = true;
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if (op.opinfo->flags & FL_IN_FLOAT_B_BITEXACT)
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bitexact_inputs[op.inst.FB] = true;
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if (op.opinfo->flags & FL_IN_FLOAT_C_BITEXACT)
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bitexact_inputs[op.inst.FC] = true;
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fprIsStoreSafe[op.fregOut] = (fprIsStoreSafe & bitexact_inputs) == bitexact_inputs;
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}
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else
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